Abstract: A semiconductor device includes a die, a plurality of dielectric layers over the die, a via and at least one ring. The dielectric layers include a plurality of first surfaces facing the die. The via penetrates through the plurality of dielectric layers and includes at least one second surface facing the die. The ring surrounds the via and is disposed in at least one of the plurality of dielectric layers. The ring includes a third surface facing the die, wherein the third surface of the at least one ring is inserted between the at least one second surface of the via and the first surface of the at least one of the plurality of dielectric layers.

Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes an insulator layer arranged over a substrate. Further, an upper routing structure is arranged over the insulator layer and is made of a semiconductor material. A lower optical routing structure is arranged below the substrate and is embedded in a lower dielectric structure. The integrated chip further includes an anti-reflective layer that is arranged below the substrate and directly contacts the substrate.

Abstract: An APD includes a photoconverter and at least one avalanche amplifier of the photocurrent, the amplifier having two layers—a contact layer and a multiplication layer, wherein the multiplication layer is formed on top of the entire conductive wafer, while the contact layer of at least one avalanche amplifier is formed on top of a certain area of the multiplication layer. Meanwhile, outside the contact layer, the multiplication layer functions as a photoconverter. This makes it possible for photocarriers to get into the avalanche amplifier effectively and unimpeded. In order to mitigate the influence of parasite near-surface charge carriers on the avalanche amplifier, its multiplication region is deepened in relation to the upper surface of the photoconverter region. The proposed APD embodiment with less dark current seeping from peripheral areas of the instrument provides higher threshold sensitivity that allows it be on par with state of the art.

Abstract: A device and method for fabricating the same is disclosed. For example, the device includes a sensor having a front side and a back side, a metal interconnect layer formed on the front side of the sensor, an anti-reflective coating formed on the back side of the sensor, a composite etch stop mask layer formed on the anti-reflective coating wherein the composite etch stop mask layer includes a hydrogen rich layer and a compressive high density layer, and a light filter formed on the composite etch stop mask layer.

Abstract: An embodiment avalanche photodiode includes a substrate, an n-type contact layer, a buffer layer, a multiplication layer, a field-control layer, an absorption layer, and a p-type contact layer. A conductive layer is formed in a central part of the buffer layer. The substrate is constituted of a semiconductor with a higher thermal conductivity than InP such as SiC, and the n-type contact layer is constituted of a same semiconductor as the substrate and is made n-type.

Abstract: A semiconductor device includes an interposer having a first side and a second side opposite to the first side, at least one active chip mounted on the first side within a chip mounting area through a plurality of first bumps, at least one dummy chip mounted on the first side within a peripheral area being adjacent to the chip mounting area, a molding compound disposed on the first side. The molding compound covers the at least one active chip and the at least one dummy chip. A plurality of solder bumps is mounted on the second side.

Abstract: Methods of manufacturing memory devices having memory cells and corresponding selectors, and associated systems and devices, are disclosed herein. In one embodiment, a method of manufacturing a memory device includes (a) removing a protection layer formed over the memory cells and (b) forming a cap layer over the memory cells before forming a conductive via through the memory device. The cap layer is configured to protect the memory cells during operation and can comprise a resistive material. The protection layer can be more efficiently removed with improved process margin and less device health impact using a polishing process before the conductive via is formed, thus increasing the manufacturing margin of the memory device.

Abstract: A display device includes a substrate; an active pattern disposed on the substrate; a first insulating layer; a first conductive layer disposed on the first insulating layer and having a driving gate electrode; a second insulating layer; a second conductive layer disposed on the second insulating layer and having a first storage electrode; a third insulating layer; a third conductive layer disposed on the third insulating layer and having a second storage electrode; and a light-emitting element disposed on the third conductive layer, wherein the second storage electrode overlaps the first storage electrode via the third insulating layer to form a first capacitor, the first storage electrode overlaps the driving gate electrode via the second insulating layer to form a second capacitor, and the driving gate electrode, the first storage electrode, and the second storage electrode at least partially overlap each other.

Abstract: Disclosed are an organic light emitting device and a display device using the same in which a light emitting layer includes a host and a plurality of dopants. In the light emitting layer, energy is transferred from a host and other dopants to one dopant by energy transfer system, thus it is possible to increase luminous efficacy of a single color and to increase lifetime of emission.

Abstract: A light emitting device and a displaying device. The light emitting device includes a first electrode, a second electrode, and a light emitting unit located between the first electrode and the second electrode, and the light emitting unit includes a doped electron-barrier layer, a blue-light host layer and a doped blue-light host layer that are stacked; the doped electron-barrier layer includes an electron-barrier host material and a first guest material that is doped in the electron-barrier host material; the blue-light host layer includes a first blue-light host material; the doped blue-light host layer includes a second blue-light host material and a second guest material that is doped in the second blue-light host material; and a singlet-state energy level of the first blue-light host material is higher than a singlet-state energy level of the first guest material and a singlet-state energy level of the second guest material.

Abstract: An imaging apparatus includes a first electrode, a second electrode, and a photoelectric conversion layer located between the first electrode and the second electrode. The photoelectric conversion layer contains a first material, a second material, and a third material. The first material is a fullerene or a fullerene derivative. The second material is a donor-like organic semiconductor material. The average absorption coefficient in the visible light wavelength range of the third material is less than the average absorption coefficient in the visible light wavelength range of the first material.

Abstract: A method of manufacturing a semiconductor device, including: providing a substrate including a first cell and a second cell, the first cell and the second cell are arranged in a first direction; forming a plurality of first metal strips arranged in a second direction and extending in the first direction on a first plane; forming a first trench over a boundary between the first cell and the second cell, a bottom surface of the first trench is located on a second plane over the first plane; filling the first trench with a non-conductive material, resulting in a separating wall extending in the first direction; and fort plurality of second metal strips extending in the second direction on a third plane over the second plane and including a first second metal strip and a second second metal strip separated by the separating wall.

Abstract: Provided is a parent substrate that includes a central region and an edge region. The edge region surrounds the central region. A detachment layer is formed in the central region. The detachment layer extends parallel to a main surface of the parent substrate. The detachment layer includes modified substrate material. A groove is formed in the edge region. The groove laterally encloses the central region. The groove runs vertically and/or tilted to the detachment layer.

Abstract: A method of manufacturing a light emitting module is provided. A plurality of light-emitting diodes are aligned on an elongated base board. By a dispenser, an uncured paste of sealing material is continuously applied on a plurality of light-emitting diodes aligned on the elongated base board. The applied paste of sealing material is cured.

Abstract: The present disclosure relates to a method for preparing a semiconductor device with air gaps between conductive lines (e.g., bit lines). The method includes forming a first dielectric structure and a second dielectric structure over a semiconductor substrate, and forming a conductive material over the first dielectric structure and the second dielectric structure. The conductive material extends into a first opening between the first dielectric structure and the second dielectric structure. The method also includes partially removing the conductive material to form a first bit line and a second bit line in the first opening and forming a sealing dielectric layer over the first bit line and the second bit line such that an air gap is formed between the sealing dielectric layer and the semiconductor substrate.

Abstract: A method to produce a light-emitting device package includes mounting junctions on pads of a metalized substrate, where the junctions are at least partially electrically insulated from each other, and forming wavelength converters, where each wavelength converter is located over a different junction and separated by a gap from neighboring wavelength converters.

Abstract: The present application discloses a method for fabricating the semiconductor device. The method for fabricating a semiconductor device includes providing a substrate having a first lattice constant and forming a first word line positioned in the substrate and a plurality of stress regions positioned adjacent to lower portions of sidewalls of the first word line. The plurality of stress regions have a second lattice constant, the second lattice constant of the plurality of stress regions is different from the first lattice constant of the substrate.

Abstract: A semiconductor device includes an n-type semiconductor layer; a first metal layer provided on the n-type semiconductor layer, the first metal layer including first atoms capable of being n-type impurities in the n-type semiconductor layer; a second metal layer provided on the first metal layer, the second metal layer including titanium atoms; a third metal layer provided on the second metal layer; and a second atom capable of being a p-type impurity in the n-type semiconductor layer. The second atom and a part of the titanium atoms are included in a vicinity of an interface between the first metal layer and the second metal layer.

Abstract: A semiconductor structure and a method of fabricating the same is disclosed. The semiconductor device includes a conductive structure that comprises: an upper conductive line arranged above and in electrical connection with a circuit component in a lower device layer through a via plug, wherein the upper conductive line extends laterally over the via plug; an interposing layer having a substantially uniform thickness arranged between the via plug and the upper conductive line, and extending laterally beyond a planar projection of the via plug, wherein the upper conductive line is in electrical connection with the via plug through the interposing layer; and an overlayer is disposed over the upper conductive line.

Abstract: The present embodiment provide a method for evaluating anion permeability of a graphene-containing membrane and also to provide a photoelectric conversion device employing a graphene-containing membrane having controlled anion permeability.