Abstract: A method for providing power through a USB port of an electronic device includes connecting a power supply to a USB port of an electronic device, emulating a personal computer (PC) host system such that the electronic device believes that the power supply is a PC host system, retrieving at least one descriptor from the electronic device, identifying the electronic device from the at least one descriptor, and setting a charging voltage based upon the identity of the electronic device.

Abstract: According to an embodiment, an information processing device includes a memory device, one or more peripheral devices, a processor, and a state controller. The processor is able to change between a first state, in which a command is executed, and a second state, in which an interrupt is awaited. When the processor enters the second state and if an operation for data transfer is being performed between at least one of the peripheral devices and the memory device, the state controller switches the information processing device to a third state in which power consumption is lower as compared to the first state. If the operation for data transfer is not being performed between any of the peripheral devices and the memory device, the state controller switches the information processing device to a fourth state in which power consumption is lower as compared to the third state.

Abstract: Embodiments of a multi-processor system and method for synchronization and event scheduling of multiple processing elements are generally described herein. In some embodiments, timing marks are provided to the processing elements and a start-timer command is broadcasted to the processing elements after an initial timing mark. The start-timer command instructs the processing elements to initiate an internal time reference after receipt of a next timing mark. Each of the processing elements maintains a copy of the internal time reference which may be used for synchronized event scheduling.

Abstract: The invention introduces a method for dynamically selecting a booting OS (Operating System), executed by a micro-controller of an apparatus, which contains at least the following steps. The micro-controller detects a selection signal output from a selection unit, and determines which one of two ROMs (Read-Only Memories) is to be activated accordingly. After a CS (Chip Select) signal of the determined ROM is asserted, a firmware stored in the determined ROM is loaded and executed, and an OS corresponding to the firmware, which is stored in a storage device, is loaded and executed.

Abstract: The present invention solves a problem that the phases of clocks obtained by frequency-dividing PLL clocks output from local PLL circuits cannot be made the same in a plurality of data transfer blocks. A local PLL circuit outputs a PLL clock obtained by multiplying a common external clock. A frequency divider outputs a feedback clock obtained by frequency-dividing the PLL clock to the local PLL circuit. An FIFO buffer temporarily holds data input from the outside. The FIFO buffer outputs the held data on the basis of a frequency-divided PLL clock. A clock generator generates a frequency-divided PLL clock obtained by frequency-dividing the PLL clock. The clock generator controls the phase of the frequency-divided PLL clock on the basis of a common start signal.

Abstract: A computer-implemented method, system, and/or computer program product controls downloading of an application to a mobile device based on power consumption of the application. A server identifies a first power consumption level requirement of a first application and a second power consumption level requirement of a second application, a first priority rating of the first application and a second priority rating of the second application, a power descriptor that identifies an amount of power available to a mobile device, and a set of application downloading rules. The set of application downloading rules includes a soft rule, a hard rule, and a medium rule. The server then selectively uploads, to the mobile device, the first application or the second application based on a selected rule.

Abstract: A system and method for controlling clock generation. A system includes a processor configured to execute instructions retrieved from memory, and a clock generation system coupled to the processor. The clock generation system is configured to generate a clock signal that the processor applies to execute the instructions. The clock generation system includes a plurality of configuration registers and selection circuitry. Each of the configuration registers includes fields that control a frequency of the clock signal. The selection circuitry selects which of the plurality of configuration registers determines the frequency at a given time.

Abstract: A processing system with multiple processing units may support separate operating systems (OSs) in separate partitions. During an initialization process, a preboot manager in the processing system may copy software to a sequestered area of memory in the processing system. The preboot manager may also configure the processing system to hide the sequestered area of memory from a first partition of the processing system. Also, the preboot manager may use a first processing unit in the processing system to boot an OS on the first partition, and the preboot manager may transmit a boot trigger from the first processing unit to a second processing unit in the processing system. The boot trigger may cause the second processing unit to use the software in the sequestered area of memory to boot a second partition of the processing system. Other embodiments are described and claimed.

Abstract: Desktop power use behavior may be detected while a portable information handling system or any other type of battery powered information handling system is operating on external power such as an AC adapter. The desktop power use behavior may be detected by monitoring one or more power usage parameters to detect usage characteristics that indicate a battery powered information handling system is being operated in a manner that is similar to operation of a desktop information handling system. Upon detection of desktop behavior, one or more processing devices of the information handling system may respond by taking one or more desktop use response actions.

Abstract: A director node of a plurality of nodes determines a plurality of data arrays, where the plurality of data arrays have been discovered at boot time. The director node determines global metadata information, based on reading boot sectors of at least one of the plurality of data arrays discovered at boot time. A determination is made from the global metadata information as to how many data arrays had been previously configured. In response to determining that the plurality of data arrays discovered at boot time is not equal in number to the previously configured data arrays, the director node determines that all configured data arrays have not been discovered.

Abstract: Described is an apparatus which comprises: an Intellectual Property (IP) block; control logic operable to send a first command to the IP block to cause the first IP block to enter a first power state from a second power state; and a communicating fabric coupled to the IP block and to the control logic, the communicating fabric to send multiple packets with a first header from the IP block to the control logic after the first command is processed by the IP block, wherein the multiple packets are associated with multiple registers which are identified as registers whose contents are to be saved.

Abstract: A server arrangement wherein 480 volt alternating current voltage is converted to a direct current voltage in a single step. The server arrangement includes a plurality of cabinets configured with a plurality of rack units, wherein each rack unit is configured to accept a component. The server arrangement further includes a plurality of components located within the rack units. A plurality of power buses are located above the plurality of cabinets and are electrically coupled to cabinets within rows of cabinets. The server arrangement also includes a plurality of rectifier units. Each rectifier unit is configured to convert 480 volt alternating current voltage to a direct current voltage to supply to one or more components.

Abstract: The present disclosure discloses a method and system for non-uniform intensity mapping using a high performance enterprise computing system with enhanced precision cooling, enabling extended over-clocking and over-voltage operation. A Kalman filter embedded in the processor predicts and corrects the input data flux for real-time use by taking care of over-clocking and over-voltage.

Abstract: A computing system comprises one or more multicore processor(s) comprising a set of multiple processing units each operable at a variable frequency, and a main memory operable at a variable frequency. A feedback controller is configured to control the frequency of each processing unit of the set and the frequency of the main memory dependent on a measure representative of a current performance of an application running on one or more of the multiple processing units of the set.

Abstract: Systems and methods for waking up waiting processing streams in a manner that reduces the number of spurious wakeups. An example method may comprise: assigning a first identifier of a sequence of identifiers to a processing stream in a waiting state; receiving a wakeup signal associated with a second identifier of the sequence of identifiers; comparing, by a processing device, the first identifier with the second identifier; and waking the processing stream responsive to determining, in view of comparing, that the processing stream began waiting prior to an initiation of the wakeup signal.

Abstract: The present disclosure provides a storage device for accelerating a booting procedure. The storage device includes a non-volatile storage medium, a volatile cache memory and a storage controller. The non-volatile storage medium stores booting data and is configured to output the booting data according to a read instruction. The storage controller is configured to store the booting data to the volatile cache memory by executing the following steps: reading a booting data table including non-physical addresses of the booting data; generating a read instruction according to the booting data table, in which the read instruction indicates the physical addresses of the booting data in the non-volatile storage medium; storing the booting data from the non-volatile storage medium to the volatile cache memory; and associating the non-physical addresses of the booting data with the cache addresses of the booting data in the volatile cache memory.

Abstract: Provided is a method and apparatus for reducing an amount of power consumed in an electronic device. The electronic device includes a first processor and a second processor. The second processor bypasses at least one of a user input and a screen output with respect to the first processor, and stores screen data input from the first processor in a frame buffer, while the second processor executes a bypass operation. The first processor processes at least one of a user input and a screen output, through the second processor that executes the bypass operation, and when a specified power-saving operation entry condition is satisfied, the first processor changes the second processor into a processing operation and changes into a sleep operation. The second processor processes at least one of a user input and a screen output using screen data stored in the frame buffer during the processing operation.

Abstract: A Bluetooth filter driver sends non-native, Bluetooth configuration data via a USB port to a Bluetooth controller by commanding a Bluetooth USB driver to change the state of the USB port to a power-up state in a Bluetooth-enabled, wireless mobile device.

Abstract: An integrated circuit (IC) is disclosed herein for adaptive power multiplexing with a power distribution network. In an example aspect, the integrated circuit includes a first power rail, a second power rail, and a load power rail. The integrated circuit also includes multiple power-multiplexer tiles and power-multiplexer control circuitry. The multiple power-multiplexer tiles are coupled in series in a chained arrangement and configured to jointly perform a power-multiplexing operation. Each power-multiplexer tile is configured to switch between coupling the load power rail to the first power rail and coupling the load power rail to the second power rail. The power-multiplexer control circuitry is configured to control a direction of current flow to prevent cross-conduction between the first power rail and the second power rail during the power-multiplexing operation.

Abstract: In accordance with embodiments of the present disclosure, a method may include, during boot of an information handling system, determining a first amount of energy required by the information handling system to flush a cache integral to the information handling system to memory integral to the information handling system in response to a power loss of one or more power supplies for supplying electrical energy to the information handling system, determining whether a second amount of energy available for hold-up of one or more power supplies in response to the power loss exceeds the first amount of energy, and responsive to determining whether the second amount of energy exceeds the first amount of energy, configuring the cache.