Abstract: A user/PC interface system is described which enables the creation and performance of a synchronized audio/visual story on the PC. The interface enables the initial storage of a plurality of visual images. Then, it enables the creation of an audio presentation which includes labels and time indications, certain of which are employed for synchronization purposes. The system is responsive to a label to execute a predetermined command upon the appearance of the label in the audio presentation. The PC is then operated to perform the audio presentation, that performance automatically causing the display of visual images upon the occurrence of labels and time indications. A table-based authoring system is also described for preparation of both the above noted audio and visual presentations. The system relies upon columnar presentations of a tabular form, each column indicating a separate control function (or comment) relating to the audio/visual presentation.

Abstract: Standard patterns are formed from specific shapes making different inclination angles with a plane of projection, projected onto that plane of projection and then stored in a memory of a known CAD system. Subsequently, at least one standard pattern is called and displayed at an arbitrary position on a screen of a displaying apparatus. Then, a required standard pattern among the standard patterns called on the above-mentioned screen of CAD system is manipulated and copied at a predetermined position. The standard pattern is magnified or reduced by multiplying the copied standard pattern by the ratio of a required dimension to be displayed to a standard dimension. A predetermined shape is drawn as a cubic view by repeating this work. The above-mentioned standard patterns include principally straight lines and ellipses. The straight line has a multiplication ratio corresponding to the inclination angle made by the standard shapes to the standard dimension.

Abstract: A scan-conversion processor converts a graphic primitive defined by its outline to pixel data by storing edge data blocks containing the y-coordinates of the vertices of each edge, the x-coordinate of the lower vertex, and x-coordinate increment data. The edge blocks are linked in ascending order of teir minimum y-coordinate values into edge chains representing consecutive series of upward- or downward-inclined edges. Information indicating the edge inclination can also be stored in each edge data block, to support use of the non-zero-winding algorithm to discriminate between the interior and exterior of the graphic primitive. since it requires relatively little memory space, the scan-conversion processor, including its memory, can be implemented as a single integrated circuit on a semiconductor chip.

Abstract: A method for forming a computer model of a modified bounded volume representing a portion of a bounded volume on a cutting surface and to a first side of the cutting surface. After signed distances are calculated, either (1) the first face is modified by deleting the first edge from the first face of the bounded volume, (2) the first edge on the first face is retained, or (3) the first edge of the first face is modified by interpolation. The above steps are repeated for each of the remaining edges of the bounded volume. If the first face has been modified and is missing an edge, then (1) a first cut-face edge is generated for the first face, (2) the first cut face is stored, and (3) the first face is modified by adding the first cut-face edge to the first face. If the first face has been modified, then the first face is stored as modified. Otherwise, the unmodified face is stored. The above steps following the generation of the list of edges is repeated for each of the remaining faces of the bounded volume.

Abstract: Apparatus for a pipe-lined raster image processor (RIP), that is capable of driving a printing engine at a high rate illustratively for use in an image management system. Specifically, this RIP contains a bus and a number of separate image processing components such as a scaler, a decompressor and various interface circuits. Each of these components is connected to the bus and is capable of undertaking a respective image processing task substantially in parallel with those undertaken by other of these image processing components. In addition, a arbiter is also connected to the bus. The arbiter, typically a microcomputer system, receives a request, from any one of the image processing components (the source component), for service, from another one of the image processing components (the destination component).

Abstract: Method and apparatus for processing on-line operands A, B and C to produce the arithmetic expression S=(A.times.B)+C. In general, the apparatus includes an input processing unit, an on-line multiplication unit, and an on-line serial addition unit. The input processing unit is sequentially introducing the digits of operands, A, B and C into the apparatus, where each digit is represented in a redundant binary number format. The multiplication unit multiplies the sequence of digits of the operands A and B to produce the n-th product digit p.sub.n of the product P=A.times.B, with the most significant digit p.sub.o being computed first. The on-line addition unit adds the n-th product digit to the n-th digit of on-line operand C, so as to produce the n-th digit s.sub.n of the arithmetic expression S=(A.times.B)+C, with the most significant digit s.sub.o being produced first.

Abstract: An electronic filter for filtering an electrical signal. Signal processing circuitry therein includes a logarithmic filter having a series of filter stages with inputs and outputs in cascade and respective circuits asGOVERNMENT SUPPORTThis invention was made with U.S. Government support under Veterans Administration Contract VA KV 674P857 and National Aeronautics and Space Administration (NASA) Research Grant No. NAG10-0040. The U.S. Government has certain rights in this invention.

Abstract: A data transfer apparatus comprises first and second memories each having a plurality of sectors each having the storage capacity of each sector in a storage disk. First and second memory access circuits are respectively associated with the first and second memories for successively specifying sectors of the associated one of the memories, writing data from the disk into the specified sectors and reading a copy of data from the associated one of the memories onto the system bus. A read/write control circuit controls the first and second memories to alternately operate in read and write modes when data is transferred between the disk and a system bus and causes one of the first and second memories to operate in a read mode when an error is detected in the transferred data.

Abstract: A data input apparatus having a keyboard with a plurality of character keys and a memory for storing first, second and third control tables. The first control table contains a first key arrangement with an internal code train that is input by depressing a corresponding key on the keyboard, the second control table contains a second key arrangement with a logic structure different from the first control table and stored in a rewritable memory, and the third control table identifies which of the keys of the keyboard in the second key arrangement are assigned to corresponding to the internal code train input by depressing a corresponding key. Data in the second control table corresponding to the internal code train in the third control table can be edited and one of the first and second control tables in the memory can be selected for performing key input data conversion.

Abstract: An apparatus for computing the discrete Fourier transform of a linear array variable f(j) of length N or of a planar array variable f(j,k) of dimensions N.times.M, wherein both N and M are even positive integers. The computation is divided into three parts, each suitable for computation via a multiprocessor array. Firstly, each element of the linear array f(j) is multiplied by the corresponding element of a first array constant. The resultant array is circularly convolved with a second array constant in the second step. The circular convolution may be computed in a straight forward manner or the second array constant may be resolved into N-1 simple array constants which are successively convolved. Lastly, each element of the resultant array after convolution is multiplied by the corresponding element of a third array constant. The invention is applied to a planar array by loading the planar array f(j,k) into corresponding elements of a planar array of processor elements.

Abstract: A computer input system for Chinese and Japanese characters. The different strokes for composing the characters are classified into different groups, each identified by a code number. The strings of code numbers are stored in memory where the strings contain only as many code numbers as are necessary to identify the characters. Strings for two or more characters used together as compounds are also stored. When a code number entered by an operator matches a string stored, a controller causes the shape of the actual character to be fetched from memory and displayed. For some characters, partial characters are also stored and are fetched and displayed when the string of code numbers for such partial characters matches the code numbers entered to aid beginners. The string of code numbers representing each character follows exactly a traditional; writing sequence of the character from the very first stroke to the end of the string of code numbers.

Abstract: A method and apparatus for flattening a three-dimensional surface into a two-dimensional pattern piece extracts a three-dimensional mesh from the surface to define surface elements and maps these elements in groups to a flat plane where they are reassembled. The position of data points in the flat plane are recursively adjusted in order to cancel error and to provide an optimum solution. Tools are provided to the user to determine the correctness of the flattening process and to insert darts into, and make other modifications to, the resulting flat pattern in order to further optimize the result.

Abstract: The digital filter includes a plurality of parallel adders, each whereof has a first input, a second input and an output; the parallel output of each adder is connected to the first input of the successive adder across a respective delay element. The second input of each adder is connected in parallel to the output of one of a plurality of memory banks, each whereof comprises a plurality of addressable memory cells, the addressing inputs whereof can be driven by a sampled digital signal to be filtered, and the memory cells of each bank contain a digital value which is equal to the product of a preset coefficient by the address of the cell itself.

Abstract: A sum-of-products calculating circuit includes a bit extension circuit, wherein the most significant bit of an intermediate result of the multiplication effected by a multiplier is extended from an order one bit of the order higher than that of the most significant bit of the intermediate result of the multiplication to the sign bit of addition input data to an adder, by using the most significant bit of each of two intermediate results of the multiplication effected by a multiplier and the sign bit of each of multiplication input data to the multiplier. The data having the extended data bits are inputted to an adder as addition data for the addition performed therein. Thereby, the number of bits used for representing output data of the multiplier can be equalized with that of bits used for representing input data of the adder by a simple logic circuit without the addition of dummy bits to the addition data. Thus, the component elements of the calculating circuit is substantially reduced in number.

Abstract: A method and apparatus for performing SRT division, in which Gray coded quotient bit signals are generated during each iteration from a divisor signal having Gray coded bits, and a dividend signal. Preferably, only the two most significant bits of the divisor signal are encoded into Gray code at the start of the division process, and the Gray coded quotient bit signals are decoded after each iteration, or after the final iteration, for use in generating the final quotient. In a preferred embodiment, the invention is a circuit capable of performing both single-precision and double-precision operations, and includes a pair of alternately operating divider block circuits each for generating a pair of quotient bits during each iteration cycle.

Abstract: A device for generating parallel and perspective projections of 3-D voxel-based images, viewed along arbitrary viewing directions. The method involves using retrieval parameters to retrieve voxels of the 3-D voxel-based image from discrete 3-D voxel space. Then, the 3-D voxel-based image is viewed along an arbitrary viewing direction specified by viewing parameters in a manner independent of the retrieval parameters. Apparatus is also provided using a 3-D voxel-based image viewed along an arbitrary viewing direction specified by viewing parameters in a manner independent of the retrieval parameters. Apparatus is also provided utilizing a 3-D memory storage device organized in accordance with a 3-D skewed memory storage scheme, and providing for conflict-free retrieval of voxel-based retrieval rays along a retrieval direction of the memory storage device.

Abstract: A computer system which has a display memory for storing information to be presented on an output display, and a full screen bitmapped window identification memory for storing information regarding window position on an output display, and uses circuitry for comparing incoming information with information stored in the window identification memory to determine whether the incoming information should appear in a particular window of the output display, and also includes a second full screen bitmapped memory normally utilized for storing information indicative of other than window position on an output display and utilizes circuitry for selectively storing information in the second memory regarding window position on the output display when additional windows are required.

Abstract: A system for printing data on a prescribed record form, which is repetitively inserted into and removed from a printing device, that includes a printing unit for printing the print data on the prescribed record form, a feed control unit for feeding the record form automatically in a prescribed printing position direction, a detection unit for detecting angular misalignment of the record form from a prescribed printing position each time the record form is inserted into the printing device, a print data computation processing unit for computing a corrected printing position from the position data of the detected angular misalignment, and a print control unit for controlling the printing unit to print the print data according to the corrected printing position.

Abstract: An operation apparatus and method receive a dividend and a divisor as the input values of a divide operation processing, repeat a subtractive operation when the dividend and divisor are determined as being equal in sign to each other, and progress the repetition of an additive operation when the dividend and divisor are determined as being different in sign from each other. When the most significant bit of a quotient is calculated as having a negative number upon the sign equality of the dividend and divisor and when the most significant bit of the quotient is calculated as having a negative number upon the sign inequality of the dividend and divisor, an overflow is repeated at a time the other quotient bit conincides with the most significant bit of the quotient to detect it during a portion of the operation process.

Abstract: With a digital volume of data representing a non-destructive investigation conducted on a body, an operation is made for the segmentation of objects contained in this digital volume, as well as an operation to display a view of this object from a given viewpoint. To perform the segmentation, the digital volume is explored according to a mode of exploration by which a parameter is assigned to each volume element, of the volume under examination, which belongs to the segmented object. Subsequently, by acting on this parameter, it is possible to modify the segmentation criterion and, hence, the criterion for determining the segmented object, only at certain places in this object. Thus, the legibility of the displayed images is improved.