Abstract: An Interactive Audiovisual Control Mechanism (IACM) which, by exploiting recent advances in CD technology which permit rapid random access of discrete audio information (such as an individual sound or utterance), provides for the first time an interactive computer system in which large amounts of high quality audio and video are presented to the user simultaneously. In the preferred embodiment, this is accomplished via random access to both CD/ROM and VD devices, wherein individual visual frames of the VD are displayed on the system's display monitor for specified periods of time while discrete sounds and utterances from the CD/ROM are played through the system's speaker. Audio from the VD and computer's CPU may also be accessed at the same time, as well as computer graphic still images and animation (due to a well-known "GENLOCK" device).

Abstract: A graphic display system comprising a plurality of graphic display units which are connected to a host processor through a common bus and providing useful quick response characteristics as a man-machine interface for process control, wherein a common memory of two ports, one of which is connected to the common bus and the other is connected to an internal bus, is provided in each graphic display unit and a part of the common memory is used for transmission of high level command/data with the host processor and comprises a FIFO (i.e. first in first out) buffer.

Abstract: A picture processing apparatus inputs window data (W) to look-up tables (TBL) in which operators (G or F) to be applied to pixel data (x) are stored in correlation to the locations of the pixel data. By switching between the operators (G or F) contained in the look-up tables (TBL), window processing corresponding to a data address (i,j) is performed on input pixel data (x.sub.ij).

Abstract: In a computer human interface an adjustable "window" enables the user to view a portion of an abstract, device-independent "picture" description of information. More than one window can be opened at a time. Each window can be sized independently of another, regardless of the applications running on them. The human interface creates a separate "object" (represented by a process) for each active picture and for each active window. The pictures are completely independent of each other. That is, none is aware of the existence of any other, and any picture can be updated without reference to, and without affect upon, any other. The same is true of windows. Thus the visual entity seen on a user's screen is represented by two objects: a window (distinguished by its frame title, icons, etc.) and a picture which is (partially) visible within the boundaries of the window's frame.

Abstract: An image processing method in a color scanner which includes an original base adapted to receive therein an original cassette that accomodate a color original, a light source for linearly radiating the original cassette as received in the original base, image sensors for color separating a transmitting or reflected light in a linear region of the color original into R, G and B for detection, a signal processing section for processing RGB image signals outputted from the image sensors by linearly scanning the color original to output four color image data such as C, M, Y and black, a color monitor connected to the signal processing section for displaying images of the four color image data, a data input device for inputting data required for the signal processing section and for designating a position where the color monitor displays and an output device for half-toning the four color image data to prepare a printing color separating block, which comprises the steps of: preparing a density cumulated histogram

Abstract: A programmable digital gain accumulator is provided with a digital accumulator having approximately the same number of significant bits as the input data stream. The most significant bit of the input data stream is a sign bit coupled to a series cascade of flip-flops providing a selectable plurality of flip-flop delay times. The carry output of the accumulator is coupled to an input up/down counter having its output coupled to a multiplexor capable of selecting one of the carry outputs of the input up/down counter. The up or down count is controlled by the sign bit input from the sign bit delay circuit. The output of the multiplexor is inputted to an output up/down counter whose parallel output is the parallel synchronous digital gain command signal for direct use by a utilization device. The up or down count of the output up/down counter is controlled by a delayed sign input from the sign bit delay circuit.

Abstract: A parallel multiplier utilizing arrays of logic cells. A first circuit logic array forms and sums partial products of the most significant bits of the multiplicand with the multiplier. A second logic array forms and sums partial products of the least significant bits of the multiplier. A third circuit logic array which adds results of the partial product addition performed in parallel by the first and second circuit logic arrays. Since the first and second logic groups execute, respectively, the partial product addition in parallel, the number of adding steps is reduced as a whole and the operation speed is improved. The third logic array is disposed between the first and second logic arrays, resulting in a reasonable structure for circuit integrations and further improving system speed.

Abstract: A masked compare circuit for comparing a first N-bit dataword to a second N-bit dataword, the circuit including a decoder for receiving an M-bit mask code and generating an output signal identifying a bit position, K, derived from the M-bit mask code, M and K being positive integers; and a comparator module responsive to the decoder output signal for comparing the N-K+1 most significant bits of the first dataword to corresponding bits of the second dataword, the comparator module generating an output signal having a first value when all of the compared bits are the same and having a second value when any of the compared bits are different.

Abstract: A mathematical function-generating device for producing, in an electronic musical instrument, functional values from an accumulation of first digital data. A digital data-generating circuit generates first digital data. A digital value string-generating circuit generates a bit-reversed digital value which increments a predetermined amount each time a first digital data unit is generated and which corresponds to a predetermined number of least significant bits in said first digital data unit. An adder is provided for adding the first digital data to a digital value comprising an accumulated value truncated to a predetermined number of least significant bits and having the bit reversed digital data concatenated thereto, thereby producing a new accumulated value. A memory is provided for storing and truncating each new accumulated value. The memory also supplies the adder with the new accumulated value.

Abstract: A cubic equation calculation apparatus calculates f(n) of a function when a cubic equation variable T=n is defined by f(T)=AT.sup.3 +BT.sup.2 +CT+D where A, B, C and D are constants. The apparatus includes a first calculation circuit using a process where variable T is incremented by 1 from 1, for calculating coefficient data A.sub.n, B.sub.n, C.sub.n and D.sub.n when T=n (n=1, 2, . . . ) in accordance with A.sub.n =A.sub.n-1 ; B.sub.n =3A.sub.n-1 +B.sub.n-1 ; C.sub.n =3A.sub.n-1 +2B.sub.n-1 +C.sub.n-1 ; D.sub.n =A.sub.n-1 +B.sub.n-1 +C.sub.n-1 +D.sub.n-1 ; and using coefficient data A.sub.1, B.sub.1, C.sub.1 and D.sub.1 when T=1 being such that A.sub.1 =A, B.sub.1 =B, C.sub.1 =C and D.sub.1 =D, and using coefficient data A.sub.n-1, B.sub.n-1, C.sub.n-1 and D.sub.n-1 when T=n-1. The apparatus also includes a second calculation circuit for calculating f(n) in accordance with f(n)=A.sub.n +B.sub.n +C.sub.n +D.sub.n when T=n.

Abstract: Method and apparatus for rendering a smooth-shaded graphics primitive vertical series of horizontal pixel spans which extend between beginning and trailing edges of the primitive, the pixel locations being spaced from each other by selected distances dX and dY. The apparatus produces X and Y addresses of the first and last pixels in the beginning span of the primitive and the number of spans in the primitive. Also produced are step values (dX/dY) indicating the slopes of the beginning and trailing edges, and a beginning intensity value for the first pixel in the beginning span. DX is added to the X address of each pixel in each span to determine the X address of the next pixel in that span and one of the step values is added to the X address of the first pixel in each span to calculate the X address of the first pixel in the next span of the primitive.

Abstract: A method and apparatus for updating the copies of state table values of a video data path chip set for a computer graphics system is provided. The apparatus uses off screen bitmap memory or other dual-ported memory in a frame buffer to store a shadow copy of the state that is stored in the video data path chips. The state tables include such things as color lookup tables, window definitions and cursors. A semaphore is used to prevent screen glitches caused by updating state tables from the copy of state table values that are partially modified. The state tables are loaded into the chips during vertical retrace, when the screen is being blanked. Before the CPU begins to update the shadow copy in the frame buffer, it claims the semaphore. If a vertical retrace occurs before the CPU has completed updating the frame buffer, the chips are not loaded during that vertical retrace. Before the chips start loading, a system timing chip claims the semaphore.

Abstract: A speech recognition device for recognizing a speech by analyzing an input speech characteristic portion extracted from the input speech and comparing the extracted characteristic portion with speech dictionary templates, the device including a speech holding unit for receiving and storing the received input speech, a speech division detection unit connected with the speech holding unit for detecting divisions of the speech read from the speech holding unit, and an instruction signal supply unit for supplying an instruction for recognizing the speech read from the speech holding unit, wherein the instruction signal supply unit is operated after an input of a speech to be recognized, and based on the operation of the instruction signal supply unit, a recognition processing of only a correct input speech is carried out.

Abstract: A method and apparatus for real time speech recognition with and without speaker dependency which includes the following steps. Converting the speech signals into a series of primitive sound spectrum parameter frames; detecting the beginning and ending of speech according to the primitive sound spectrum parameter frame, to determine the sound spectrum parameter frame series; performing non-linear time domain normalization on the sound spectrum parameter frame series using sound stimuli, to obtain speech characteristic parameter frame series with predefined lengths on the time domain; performing amplitude quantization normalization on the speech characteristic parameter frames; comparing the speech characteristic parameter frame series with the reference samples, to determine the reference sample which most closely matches the speech characteristic parameter frame series; and determining the recognition result according to the most closely matched reference sample.

Abstract: A graphics system uses a programmable tile size and shape supported by a frame buffer memory organization wherein (X, Y) pixel addresses map into regularly offset permutations on groups of RAM address and data line assignments. This allows one RAM in each group to be accessed with a memory cycle in unison with one RAM in each other group, up to the number of groups. During such a memory cycle each RAM can receive a different address. A tile is the collection of pixel locations associated with a collection of addresses sent to the RAMs. Because of the regular nature of the permutations these locations may be regions bounded by a single boundary that may be rectangular and of varying size and shape. Changing the mapping of (X, Y) pixel addresses to RAM addresses for the groups changes the size and shape of the tiles. Tiles are cached. Tiles for RGB pixel values are cached in an RGB cache, while Z values are cached in a separate cache.

Abstract: In the proposed geometric processing system geometry and space are partitioned into a plurality of subspaces by virtual partitioning lines passing characteristic points of the geometry and geometric sides. Pointers are respectively set for the characteristic points on the left and right side of each subspace. These two pointers set in one subspace point to each other. Each subspace is represented by such a pair of pointers. Based on the above-mentioned partition method, a plurality of subspaces are then adjacent to each characteristic point. Pointers for each characteristic point are grouped so that they correspond to each characteristic point on a one to one basis. This geometric processing system includes a data base comprising data grouped in such a way. The proposed geometric/graphic data structure enables high-speed geometric processing for a wide range of applications including LSI/VLSI design.

Abstract: A digital loop filter translates a multi-bit phase error input into a high resolution control signal utilizable as an advance-retard control for a multi-phase clock generator. The digital filter couples the multi-bit phase error input to the clock generator via a pulse density modulation (PDM) accumulator, providing multi-phase adjustment in a single sample clock cycle based on the overflow or underflow of the PDM accumulator. Variable PDM cycles are used to control loop filter bandwidth, permitting adjustable capture sequences. Thus, real proportional control of the multi-phase clock generator is limited only by the word size of the phase error input.

Abstract: A circuit for preserving sign information in a computer system. The computer system is capable of comparing and operating on the absolute value of two operands utilizing a pipelined architecture. Sign information is preserved through the use of a first plurality of stages corresponding to stages of the pipeline for storing sign information of a first operand and a second plurality of stages corresponding to stages of the pipeline for storing sign information of a second operand. Sign information is piped through the first and second plurality of stages under common control with the control for the pipeline. Upon completion of the comparison operation, the sign information for the operands is available. Further, the sign information for the first and second operands are coupled as inputs to a multiplexor.

Abstract: A synthesizer capable of generating a multiplicity of output frequency signals with 1 hertz resolution utilizing binary mathematics in a binary circuit. The apparatus includes providing to an accumulator a stable reference input signal having a frequency value of K, a defined value of 2.sup.N where N is an integer, a rollover value R equal to 2.sup.N minus the synthesizer modulus M and a desired output frequency signal having a value V selected from the range of integer values between 1 and K. The accumulator, at the rate of K, periodically increments the accumulator contents A by the value V, until the accumulated value exceeds 2.sup.N -1. The accumulator's content A is then set at the next cycle of the reference input signal K to a value of A-2.sup.N +R+V. A convertor converts the values of A into an output signal. In the preferred embodiment, the accumulator includes digital circuitry having 2.sup.N capacity and performs binary arithmetic to accomplish the accumulations.

Abstract: The present invention processes an independent body of speech during an enrollment process and creates a set of speaker specific enrollment parameters for normalizing analysis parameters including the speaker's pitch, the frequency spectrum of the speech as a function of time, and certain measurements of the speech signal in the time-domain. A particular objective of the invention is to make these analysis parameters have the same meaning from speaker to speaker. Thus after the pre-processing performed by this invention, the parameters would look much the same for the same word independent of speaker. In this manner, variations in the speech signal caused by the physical makeup of a speaker's throat, mouth, lips, teeth, and nasal cavity would be, at least in part, reduced by the pre-processing.