Patents Examined by Gayathri Sampath
  • Patent number: 10416706
    Abstract: Disclosed is a calibration unit for calibrating an oscillator of a device comprises a counting and comparing unit and a control circuit. The counting and comparing unit is configured to determine a number of periods of a clock signal lying between a starting instance and an ending instance. Therein, the clock signal is generated by the oscillator. The counting and comparing unit is further configured to determine a deviation of the number of periods from a reference number. The control circuit is configured to adjust the oscillator depending on the deviation.
    Type: Grant
    Filed: July 11, 2015
    Date of Patent: September 17, 2019
    Assignee: Synopsys, Inc.
    Inventors: Carlos Azeredo Leme, Adam Burns, Dino Toffolon
  • Patent number: 10353453
    Abstract: A controller may be communicatively coupled to a power supply and may be configured to receive a status signal indicative of whether a level of power delivered by the power supply exceeds a threshold power level. The controller may also be configured to, in response to the status signal indicating the level of power delivered by the power supply exceeds the threshold power level, cause a module power limit of at least one of a plurality of modules disposed in a chassis to decrease, wherein the module power limit of a module defines a maximum amount of power the module may consume from the power supply. The controller may also be configured to, in response to the status signal indicating the level of power delivered by the power supply does not exceed the threshold power level, cause the module power limit to increase.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: July 16, 2019
    Assignee: Dell Products L.P.
    Inventors: Shawn Joel Dube, Dan Rao, Joyce Gil Metevier
  • Patent number: 10345879
    Abstract: Devices and methods for detecting the plug-in of an accessory device by a host device are provided. A host device includes a power switch coupled between a battery and a processor. The host device is turned off by a power button coupled to the power switch. A capacitive sensing circuit is coupled to a signal line of a host device port, and is configured to detect a plug-in of the accessory device by monitoring an input capacitance of the signal line. A logic circuit is coupled to an output of the power button and to an output of the capacitive sensing circuit, and the logic circuit turns on the power switch if the power button is in an on position or if the capacitive sensing circuit detects a plug-in of the accessory device.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: July 9, 2019
    Assignee: DISH TECHNOLOGIES L.L.C.
    Inventor: Arun Pulasseri Kalam
  • Patent number: 10345889
    Abstract: In an embodiment, a processor includes multiple cores and a power controller. The power controller may include a hardware duty cycle (HDC) logic to cause at least one logical processor of one of the cores to enter into a forced idle state even though the logical processor has a workload to execute. In addition, the HDC logic may cause the logical processor to exit the forced idle state prior to an end of an idle period if at least one other logical processor is prevented from entry into the forced idle state. Other embodiments are described and claimed.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: July 9, 2019
    Assignee: Intel Corporation
    Inventors: Eliezer Weissmann, Yoni Aizik, Doron Rajwan, Nir Rosenzweig, Efraim Rotem, Barnes Cooper, Paul S. Diefenbaugh, Guy M. Therien, Michael Mishaeli, Nadav Shulman, Ido Melamed, Niv Tokman, Alexander Gendler, Arik Gihon, Yevgeni Sabin, Hisham Abu Salah, Esfir Natanzon
  • Patent number: 10338670
    Abstract: Voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method of determining operating voltages for a processing device includes executing a voltage adjustment process to determine at least one input voltage for the processing device lower than a manufacturer specified operating voltage. During the voltage adjustment process, the method includes applying incrementally adjusted input voltages to the processing device, operating the processing device according to a functional test that exercises the processing device in context with associated system elements of a computing assembly, and monitoring for operational failures of at least the processing device during application of each of the incrementally adjusted input voltages.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: July 2, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: William Paul Hovis, Garrett Douglas Blankenburg, Peter Anthony Atkinson, Robert James Ray, Andres Felipe Hernandez Mojica, Samy Boshra-Riad, Erng-Sing Wee, Brian Keith Langendorf
  • Patent number: 10324767
    Abstract: An electronic device, a method of providing battery information of an electronic device, and a storage medium for storing the method are provided. The electronic device includes a storage unit that stores an application use history; and a controller that partitions an entire battery capacity into at least one or more logical batteries, and allocates at least one or more applications to each of the at least one or more logical batteries according to the application use history.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: June 18, 2019
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Seok-Weon Seo, Jong-Bum Choi, Sang-Ho Kim, Bo-Seok Moon
  • Patent number: 10324507
    Abstract: Methods, systems, and apparatus for enabling a power path between a power source and a host device via an accessory. A host device may send, to an accessory arranged within the power path, via a first data pin arranged in the host device, a request for an accessory identifier. The accessory identifier identifies the accessory. The host device may then determine whether the accessory identifier is received from the accessory within a specified period of time or whether a received accessory identifier is valid. If the accessory identifier is not received from the accessory within the specified period of time, or a received accessory identifier is not valid, the host device sends a new request for the accessory identifier to the accessory via a second data pin different than the first data pin.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: June 18, 2019
    Assignee: APPLE INC.
    Inventors: Scott Mullins, Alexei Kosut, Jeffrey J. Terlizzi
  • Patent number: 10317981
    Abstract: A data processing device includes a load circuit including a central processing unit and operated by supplied electric power, a step-down power supply circuit stepping down an external power supply voltage and including an output node coupled to the load circuit, the step-down power supply circuit including a first step-down unit stepping down the external power supply voltage, and a bias current control circuit controlling a magnitude of bias current flowing through an auxiliary path from the output node to a ground, the auxiliary path is separate from a path to the load circuit, and a control circuit increasing the magnitude of the bias current, prior to a change of an operation state of the load circuit by which a relatively large change occurs to an amount of current consumed by the load circuit.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: June 11, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Soichi Kobayashi, Akira Oizumi, Yoshihiko Yasu, Hiromi Notani
  • Patent number: 10310581
    Abstract: An approach is provided for operating a mobile device having first and second operating systems (OSs) installed. While executing the first OS but not the second OS and based on battery power remaining in the mobile device being less than a threshold and the mobile device consuming less power if executing the second OS but not the first OS, execution of the first OS is terminated and the second OS is executed. While executing the second OS, and in response to a determination of a likelihood of the mobile device being subject to an external security attack in a geographic region in which the mobile device is located and a determination that the mobile device is more secure against the external security attack while executing the first OS than while executing the second OS, execution of the second OS is terminated and the first OS is executed.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: June 4, 2019
    Assignee: International Business Machines Corporation
    Inventors: Blaine H. Dolph, Miku K. Jha, Sandeep R. Patil, Gandhi Sivakumar, Riyazahamad M. Shiraguppi
  • Patent number: 10310572
    Abstract: Thermal reduction and voltage adjustment techniques for computing systems and processing devices are presented herein. In a first example, a method of operating a voltage control system for a processing device includes operating the processing device in a computing assembly at a selected performance level, the processing device supplied with at least one input voltage at a first voltage level. The method includes monitoring thermal information associated with the computing assembly, and when the thermal information indicates a temperature associated with the computing assembly exceeds a threshold temperature, adjusting the at least one input voltage level supplied to the processing device to a second voltage level lower than the first voltage level and continuing to operate the processing device at the selected performance level.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: June 4, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: William Paul Hovis, Garrett Douglas Blankenburg, Peter Anthony Atkinson, Robert James Ray, Andres Felipe Hernandez Mojica, Samy Boshra-Riad, Erng-Sing Wee, Brian Keith Langendorf
  • Patent number: 10289427
    Abstract: A Power over Ethernet (PoE) system that includes a power source, an Ethernet transmission line, a powered device and a reset device is provided. The power source is configured to generate an electric power signal having a power level. The powered device is configured to receive the electric power signal through the Ethernet transmission line. The reset device includes a power terminal and a reset circuit. The power terminal is electrically coupled to the Ethernet transmission line. The reset circuit is electrically coupled between the power terminal and a ground terminal. Upon receiving a control signal, the reset circuit is configured to vary a voltage level of the electric power signal from the power level to a non-zero reset level for a predetermined time period to reset the powered device.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: May 14, 2019
    Assignee: SENAO NETWORKS, INC.
    Inventors: Ming-Tao Chang, Pi-Kuang Ku, Wen-Tang Lee
  • Patent number: 10275001
    Abstract: Disclosed herein is a computing device configured to implement thermal throttling of a component of the computing device. The computing device includes an electronic component and a temperature sensor thermally coupled to the electronic component. The computing device also includes a thermal management controller to receive a temperature measurement from the temperature sensor and generate a throttling factor for the electronic component. If the temperature measurement is greater than a specified threshold, the throttling factor is to reduce performance of the electronic component to be at least the performance guarantee for the electronic component.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: April 30, 2019
    Assignee: Intel Corporation
    Inventors: Timothy Y. Kam, Sandeep Ahuja, Rajat Agarwal, Avinash Sodani, Jinho Suh, Meenakshisundaram Chinthamani
  • Patent number: 10261565
    Abstract: An approach is provided for operating a mobile device having first and second operating systems (OSs) installed. While the mobile device is executing the first OS but not the second OS, (1) based in part on battery power remaining in the mobile device being less than a threshold and a lower power consumption of the mobile device if executing the second OS but not the first OS, execution of the first OS is terminated and the second OS is executed in the mobile device; and/or (2) based in part on (a) the mobile device being currently located in the first geographic region which has a greater likelihood of attack on the mobile device, and (b) the mobile device being more secure while operating the second OS but not the first OS, execution of the first OS is terminated and the second OS is executed in the mobile device.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: April 16, 2019
    Assignee: International Business Machines Corporation
    Inventors: Blaine H. Dolph, Miku K. Jha, Sandeep R. Patil, Gandhi Sivakumar, Riyazahamad M. Shiraguppi
  • Patent number: 10254809
    Abstract: An information processing apparatus which is capable of properly supplying power to an image processing unit and an image output unit from respective different power supplies without using a control instruction. The image processing unit obtains data from an external apparatus. A type of the obtained data is determined, and supply of power to the image processing unit and the image output unit is controlled based on the determined type of the data.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: April 9, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Yoshitaka Oba
  • Patent number: 10242652
    Abstract: Power gating a portion of a graphics processor may be used to improve performance or to achieve a power budget. A processor granularity, such as a slice or subslice, may be gated.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: March 26, 2019
    Assignee: Intel Corporation
    Inventors: Nikos Kaburlasos, Eric C. Samson
  • Patent number: 10242418
    Abstract: Power gating a portion of a graphics processor may be used to improve performance or to achieve a power budget. A processor granularity, such as a slice or subslice, may be gated.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: March 26, 2019
    Assignee: Intel Corporation
    Inventors: Nikos Kaburlasos, Eric C. Samson
  • Patent number: 10228751
    Abstract: Examples of the disclosure are directed to a method of, after hitting a UVLO threshold, rebooting an electronic device in a low power mode having a lower UVLO threshold, such that the device can continue to be used past the first UVLO threshold. For example, in a high power mode, the device may be capable of a number of functionalities of a modern portable electronic device, such as network access, the ability to run applications, Bluetooth connections, etc. In a low power mode, the device may only be able to check and display a current time, play an alarm sound at a predefined time, perform near field communication (NFC) transactions/payments, among other possibilities described herein. The limited functionality and reduced usage of peripherals in the low power mode may prevent the battery from experiencing peaks in current level that may be problematic at relatively low levels of voltage.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: March 12, 2019
    Assignee: Apple Inc.
    Inventors: Jonathan J. Andrews, Cyril De La Cropte De Chanterac, Eugene Kim
  • Patent number: 10222823
    Abstract: The present disclosure describes embodiments of apparatuses and methods related to a computing apparatus with a real time clock (RTC) coupled to a bus, where the RTC does not have a backup power source to maintain time and date of the RTC. The computing apparatus may have firmware coupled to the bus, and the firmware may contain boot logic with network time protocol (NTP) logic. The computing apparatus may have persistent memory coupled to the bus with configuration parameters. The computing apparatus may have a controller coupled to the bus, where the controller is to retrieve the configuration parameters from the persistent memory and processes the boot logic with the NTP logic using the configuration parameters to transmit an NTP request over the bus and receives a coordinated universal time (UTC) over the bus and stores the UTC in the RTC.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: March 5, 2019
    Assignee: Intel Corporation
    Inventors: Thane M. Larson, Ramamurthy Krithivas, Chris Ruffin
  • Patent number: 10209762
    Abstract: A layered network (10; 11; 12) to provide offload of data in a communication processor (100; 110; 120). The layered network (10; 11; 12) includes a first set (S1) of network elements at a first layer (L1) and a second set (S2) of one or more network elements at a second layer (L2). The network elements of the first set (S1) are configured for processing incoming data and the network elements of the second set (S2) of one or more network elements at the second layer (L2) are configured to process intermediate data received from the first set (S1) of network elements. The network elements of a particular subset (Si1) of the network elements of the first set (Si1) of network elements are connected to only a particular network element (Ei2) of the second set (S2) to transfer the incoming data processed by the network elements of the particular subset (Si1) to the particular network element (Ei2) of the second set (S2).
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: February 19, 2019
    Assignee: NXP USA, Inc.
    Inventors: Eran Glickman, Ron Bar, Benny Michalovich
  • Patent number: 10209911
    Abstract: Various embodiments are generally directed to an apparatus, method and other techniques for determining when a communications port is in a first low power state, determining that a coupled device entered a low power state and enabling a second low power state based on the determination that the device has entered the low power state, the second low power state to use less power than the first low power state.
    Type: Grant
    Filed: September 16, 2014
    Date of Patent: February 19, 2019
    Assignee: INTEL CORPORATION
    Inventors: Jennifer Chin, Su Wei Lim, Poh Thiam Teoh, Ting Lok Song, Sun Zheng E, Say Cheong Gan