Patents Examined by Giovanni Astacio-Oquendo
  • Patent number: 11360129
    Abstract: Provided a method including applying a Fourier Transform to an AC current waveform measured to perform conversion thereof to a frequency domain; adjusting entire phase components of frequency spectra obtained as a result of the Fourier Transform, such that a phase component of an AC power supply frequency becomes zero; and applying an inverse Fourier Transform to the frequency spectra with the entire phase components thereof adjusted to obtain a current waveform in a time domain.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: June 14, 2022
    Assignee: NEC CORPORATION
    Inventors: Shingo Takahashi, Shigeru Koumoto, Ryota Suzuki, Murtuza Petladwala
  • Patent number: 11360128
    Abstract: Provided are a failure diagnosis method and apparatus for open circuit failure of a power tube of a three-phase rectifier based on a current signal, relating to a failure diagnosis technique for power electronic equipment and capable of quickly and accurately diagnosing on an open circuit failure of the power tube of the three-phase rectifier without adding a hardware component. The failure diagnosis method only requires a sampled current existing in the control system of the rectifier and some intermediate computing signals and is therefore simple and requires little computing resource. A distorted current after the open circuit failure occurs in the power tube of the rectifier and a positive/negative half cycle where the current is present when the failure occurs serve as diagnostic variables. By analyzing the sampled current, a quick diagnosis on the power tube having the open circuit failure is provided. Thus, the invention is highly applicable.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: June 14, 2022
    Assignee: WUHAN UNIVERSITY
    Inventors: Yigang He, Chunsong Sui, Hui Zhang, Bolun Du, Zhaorong Zeng, Mingyun Chen
  • Patent number: 11360139
    Abstract: A method for testing a power module includes connecting an output capacitor of the power module to a load meter; inputting an input signal, an enable signal, a PowerGood signal, and an output signal of the power module to first, second, third, and fourth channels of an oscillometer, respectively; adjusting the load meter to a no-load state, and capturing and storing the power-on waveforms and power-off waveforms of four channels of signals of the power module; adjusting the load meter to a full-load state, and capturing and storing the power-on waveforms and power-off waveforms of the four channels of signals of the power module; and determining whether the power-on sequence, power-off sequence, overshoot voltage value, and undershoot voltage value of the power module are normal based on the power-on waveforms and power-off waveforms of the four channels of signals stored by the load meter under the no-load and full-load states.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: June 14, 2022
    Assignee: ZHENGZHOU YUNHAI INFORMATION TECHNOLOGY CO., LTD.
    Inventor: Xin Sui
  • Patent number: 11353481
    Abstract: A circuit for sensing the driving current of a motor, the circuit comprising: a driver configured to generate a driving current for each phase of a multiple-phase motor, the instantaneous sum of all the driving currents being zero; a current sensor for each phase of the multiple-phase motor, each current sensor configured to measure the driving current of that phase and comprising a plurality of current sensor elements arranged with respect to each other such that each current sensor element has the same magnitude of driving current systematic error due to magnetic fields external to the driving current to be measured; and a controller configured to, for each phase of the multiple-phase motor, generate an estimate of the driving current of that phase to be the measured driving current of that phase minus 1/n of the total of the measured driving currents for all phases, n being the number of phases of the multiple-phase motor.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: June 7, 2022
    Assignee: CMR SURGICAL LIMITED
    Inventors: Paul Christopher Roberts, Edward John Mottram
  • Patent number: 11349434
    Abstract: Electrical component location is provided. Employed location techniques may include providing a signal, having components to be located sense the signal and report back the sensed signal, and determining relative locations for one or more of the components using the sensed signals reported by the components.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: May 31, 2022
    Assignee: SunPower Corporation
    Inventors: Fernando Rodriguez, Patrick L. Chapman, Jonathan Ehlmann
  • Patent number: 11346869
    Abstract: A calibration setup for measuring a signal generator is provided. The calibration setup includes a calibration unit, a comb generator configured to output a comb signal and the signal generator to be measured that is configured to output an output signal. The comb signal has a higher bandwidth than the output signal. The comb signal has equidistant discrete frequency lines. The output signal has discrete frequency lines. Each of the equidistant discrete frequency lines of the comb signal is different to the discrete frequency lines of the output signal with regard to frequency. The calibration unit is configured to mix the comb signal with the output signal, thereby obtaining a mixed signal.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: May 31, 2022
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventor: Johannes Schoeller
  • Patent number: 11340309
    Abstract: Provided is a method for performing a testing procedure of an electrical power system for a wind turbine by means of a power supply unit, wherein the method includes connecting the power supply unit to a low voltage distribution system of the wind turbine. The method further includes closing a low voltage circuit breaker so that electrical connection is provided between the low voltage distribution system and an auxiliary transformer. Electrical power to a power converter is provided from the power supply unit via the low voltage distribution system thereby energizing a direct current link of the power converter. The power converter is synchronized with an electrical grid, and a main transformer switchgear unit is closed, such that electrical connection is provided between a main transformer and the electrical grid.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: May 24, 2022
    Inventors: Jonay Armendariz Lekumberry, Miguel Ángel Sepúlveda Gonzalez
  • Patent number: 11342210
    Abstract: Embodiments disclose herein include a sensor wafer. In an embodiment, the sensor wafer comprises a substrate, wherein the substrate comprises a first surface, a second surface opposite the first surface, and an edge surface between the first surface and the second surface. In an embodiment, the sensor wafer further comprises a plurality of sensor regions formed along the first surface, wherein the sensor regions comprise self-referencing capacitive sensors. In an embodiment, the sensor wafer further comprises a vibration sensor embedded within the substrate.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: May 24, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Charles G. Potter, Terrance Allen Neal
  • Patent number: 11333531
    Abstract: A device for sensing the relative rotary position of first and second parts about a rotation axis, the device comprising a follower constrained to move on a first track fast with the first part and on a second track fast with the second part, the first track being linear and the second track comprising a plurality of circular arcs and at least one transition section connecting one of the circular arcs to another, the tracks being arranged so as to convert relative rotation of the parts into linear motion of the follower, wherein the second track is generally spiral, each circular arc is of constant radius about the rotation axis and the first track is perpendicular to the rotation axis.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: May 17, 2022
    Assignee: CMR Surgical Limited
    Inventors: Keith Marshall, Christopher James Roach, Paul Christopher Roberts, Steven James Randle
  • Patent number: 11336468
    Abstract: A circuit for a Synthetic Physically Unclonable Function, acronym SPUF, in a computer device, wherein the circuit is configured to receive data from a plurality of hardware sensors and/or actuators accessible in the computer device; to determine deviations in the data; to determine a multivariate distribution of the deviations and to determine an identifier from the multivariate distribution. In described developments, deviations comprise random errors, statistical moments in data originating from sensors and/or actuators amongst accessible ones in the computer device can be selected, and entropy can be maximized. Computer program product embodiments are described.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: May 17, 2022
    Assignee: SECURE-IC SAS
    Inventors: Philippe Nguyen, Robert Nguyen, Youssef Souissi, Sylvain Guilley, Jean-Luc Danger, Adrien Facon
  • Patent number: 11327112
    Abstract: According to an embodiment, a semiconductor device comprises a first monitoring pad and a second monitoring pad; a test circuit including an NMOS transistor having a drain and source coupled between a first voltage terminal and a common node, a PMOS transistor having a drain and source coupled between the common node and a second voltage terminal, a first switching element having a first terminal coupled to the common node via a first resistor and a second terminal coupled to the first monitoring pad, and a second switching element having a third terminal coupled to the common node via a second resistor and a fourth terminal coupled to the second monitoring pad; and a test control circuit suitable for controlling the test circuit.
    Type: Grant
    Filed: January 12, 2021
    Date of Patent: May 10, 2022
    Assignee: SK hynix Inc.
    Inventor: Yun Seok Hong
  • Patent number: 11327107
    Abstract: A method of testing a semiconductor device may include preparing a semiconductor substrate in which the semiconductor substrate includes a test element group including first and second test circuits, measuring first and second leakage currents in the first and second test circuits, respectively, and calculating leakage components by comparing the first and second leakage currents. Each of the first and second test circuits may include an active region, which is an upper portion of the semiconductor substrate, a gate electrode, which is configured to cross the active region and to extend in a first direction, and an active contact, which is on the active region, is spaced apart from the gate electrode, and extends in the first direction. The second test circuit may further include a first gate contact that is connected to the gate electrode and overlaps the active region in a vertical direction perpendicular to the substrate.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: May 10, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Juhun Park, Juhyun Kim, Deokhan Bae, Myungyoon Um
  • Patent number: 11320489
    Abstract: According to the embodiment, a field winding interlayer short-circuit detection apparatus comprises: a field winding resistance calculator to calculate, for a field winding of a rotating electrical machine, a field winding resistance calculated value from a detected value of a field winding current and a detected value of a field winding voltage; a determiner to determine presence or absence of an interlayer short-circuit in the field winding by using a comparison result between the field winding resistance calculated value and the reference resistance value.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: May 3, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Toshio Hirano, Yoshihiro Taniyama, Masafumi Fujita, Koji Ando, Yoshinori Torii
  • Patent number: 11313900
    Abstract: An on chip leakage-current detection device including a first inverter where the magnitude of delay of the output signal of the first inverter is determined by a leakage current of a target device. The leakage-current detection device further includes: a capacitor that is charged by the output signal of the first inverter; a second inverter coupled to capacitor that switches states when the capacitor is charged to a switching level; an odd number of additional inverters coupled in a sequence with a second-inverter output. The output of the leakage-current detection device has a frequency proportional to the leakage of the target device.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: April 26, 2022
    Assignee: STMICROELECTRONICS INTERNATIONAL N.V.
    Inventors: Pravesh Kumar Saini, Shashwat
  • Patent number: 11315453
    Abstract: An electronic device includes a substrate having a top surface, a bottom surface and a side surface between the top surface and the bottom surface, and a test circuit disposed on the substrate. The test circuit extends from the top surface to the bottom surface through the side surface of the substrate and has a current terminal for an ammeter and a voltage terminal for a voltmeter, both of which are disposed on the bottom surface.
    Type: Grant
    Filed: November 8, 2020
    Date of Patent: April 26, 2022
    Assignee: InnoLux Corporation
    Inventor: Shuhei Hosaka
  • Patent number: 11313989
    Abstract: The present disclosure is related to a detecting device which includes a fixing component, a sensing component, and a terminal. The fixing component is fixed to an object under test and generates a first magnetic field. The sensing component includes a driving module and a reference module. The driving module generates a second magnetic field, and the driving module further generates a sensing signal according to an electromagnetic induction produced by the first magnetic field and the second magnetic field. The reference module is spaced from the driving module by a distance, such that the reference module is outside of the second magnetic field and generates a reference signal. The terminal produces detection information according to the sensing signal and the reference signal.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: April 26, 2022
    Assignee: National Central University
    Inventors: Min-Chun Pan, Wei-Hao Lee, Po-Chin Chang, Tsung-Hsuan Su
  • Patent number: 11307224
    Abstract: A measuring rod for an electric meter and an electric meter assembly using the same are disclosed, wherein the device to be detected disposed around the front end of at least one of the test probes allows the electric meter to determine the type of currently inserted test probes and whether the test probes are suitable for use under a current operation mode of the electric meter in a situation when the device to be detected is inserted into the electric meter; and the measuring socket corresponding to the device to be detected is disposed with a determination mechanism for allowing the electric meter to determine whether the abovementioned test probes or test probes of different types are suitable for use under a current operation mode of the electric meter.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: April 19, 2022
    Assignee: APPA TECHNOLOGY CORP.
    Inventors: Shan-Wen Chang, Shou-Hua Lin
  • Patent number: 11300613
    Abstract: A method of assessing the ability of one or more multi-die circuit elements to tolerate the presence of jitter in intra-package. The method includes: providing a first die having a set of transmitters for digital communications, the set of transmitters comprising a first transmitter and a second transmitter; providing a second die having a set of receivers for digital communications; providing a performance monitor; coupling, using an intra-package trace, a first transmit signal from the first transmitter to a receiver of the set of receivers; coupling a second transmit signal from the second transmitter to an external pin; supplying an input signal that induces jitter in the first and second transmit signals; measuring jitter in the second transmit signal via the external pin; and determining, using the performance monitor, a performance characteristic of the second die.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: April 12, 2022
    Assignee: Credo Technology Group Limited
    Inventors: Arshan Aga, Haoli Qian, Junqing Sun, James Bartenslager
  • Patent number: 11300463
    Abstract: A rotary angle sensor for an electric power assisted steering system of a motor vehicle, wherein the rotary angle sensor comprises an optical sensor unit with a light source, optical components and a photodetector and a disc with an optical pattern, wherein the optical sensor unit and the disc are configured to rotate relative to each other around a rotary axis, and wherein the optical sensor unit is configured such that light reflected from the optical pattern is measured by the photodetector, wherein the optical pattern comprises steps and spaces separating the steps, such that light reflected by steps and spaces destructively interferes leading to an intensity modulation of the reflected light according to an optical pattern which encodes a binary type code for the rotary angle of the disc.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: April 12, 2022
    Assignees: THYSSENKRUPP PRESTA AG, THYSSENKRUPP AG
    Inventor: Gergely Racz
  • Patent number: 11293992
    Abstract: There are disclosed fault detection circuits and methods for an N-to-1 Dickson topology hybrid DC-DC power converter. A short circuit fault detection circuit comprises: first and second measuring circuits configured to measure first and second voltages, Vsw1, Vsw2, at the switching node in the first and second state; first and second calculation circuits configured to calculate first and second absolute error voltage as an absolute difference of the respective first and second voltages in one operating cycle (Vsw1[n?1], Vsw2[n?1]) and in a next subsequent operating cycle (Vsw1[n], Vsw2[n]); and first and second fault circuits configured to provide first and second fault outputs indicative of a fault in response to the respective first or second absolute error voltage exceeding a short-circuit-trip level. Open circuit fault detection circuits and methods are also disclosed.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: April 5, 2022
    Assignee: NXP B.V.
    Inventors: Mojtaba Ashourloo, Venkata Raghuram Namburi, Gerard Villar Piqué, John Pigott, Olivier Trescases, Hendrik Bergveld, Alaa Eldin Y El Sherif