Abstract: A fingerprint signal processing system for a fingerprint sensor includes a calibration control circuit, a register circuit, a decode circuit and a normalization circuit. The calibration control circuit is configured to receive a background calibration control signal and an image signal from the fingerprint sensor, and convert the image signal into a plurality of digital signals according to a plurality of offsets. When the background calibration control signal is at a high level, the calibration control circuit is configured to read a plurality of calibration parameters from the register circuit.

Abstract: A method of determining the orientation of a device having disposed therein, in part, an inertia measurement unit, a phased array receiver, and a controller, includes, in part, detecting the difference between phases of an RF signal received by at least a pair of receive elements of the phased array receiver, determining the angle of incidence of the RF signal from the phase difference, using the angle of incidence to determine the projection of a vector on a plane of an array of transmitters transmitting the RF signal, and determining the yaw of the device from the projection of the vector. The vector is a three-dimensional vector representative of the orientation of the plane of the phased array receivers relative to the plane of the array of transmitters transmitting the RF signal.

Abstract: A power supply monitor includes a delta-sigma modulator including an input receiving a binary number and an output providing a pulse-density modulated signal, the delta-sigma modulator operable to scale the pulse-density modulated signal based on the binary number. A fast droop detector circuit includes a level shifter providing the modulated signal referenced to a clean supply voltage. A lowpass filter is coupled between the level shifter and a comparator. The comparator produces a droop detection signal at said output responsive to a monitored supply voltage dropping below a predetermined level relative to the filtered signal.

Abstract: A test arrangement for adjusting a setup of testing a device under test (DUT) includes a main device that generates an RF signal and processes an incoming RF signal in a first frequency range; a frontend component generates an RF signal and processes an incoming RF signal in a second frequency range. The frontend component measures a signal level in a sub-range within the first frequency range; a connection cable connects the main device with the frontend component; and an analyzer predicts a behavior of the connection cable in a rest portion of the first frequency range that is different from the sub-range within the first frequency range.

Abstract: The invention: determines if the duration of the conducting state of the semiconductors in a first cycle of the pulse width modulation is upper than a predetermined duration, measures, during the conducting state of the semiconductors at a second cycle, the voltage provided to the load, sequentially disables the conduction of each semiconductor during a part of the duration of the conducting state of the semiconductors in a third cycle and measures the voltage provided to the load, determines the differences between the voltage measured during the second cycle and each voltage measured during the third cycle, orders the differences according to their value, checks if the determined order is identical to an order stored in a memory of the device and determines that one connection of one semiconductor is deteriorated if the order is changed.

Abstract: An electronic panel includes a base substrate having a first area, a second area adjacent to the first area, and a third area adjacent to the second area, a plurality of pixels in the second area, a plurality of pixel signal lines in the third area and connected to the pixels, a crack detecting pattern spaced apart from the pixels and in the first area, a first line spaced apart from the pixel signal lines, in the third area, and connected to a portion of the crack detecting pattern, and a second line spaced apart from the pixel signal lines, in the third area, connected to another portion of the crack detecting pattern, and spaced apart from the first line. The crack detecting pattern has a line-symmetrical shape with respect to a symmetry axis passing through a center of the first area.

Abstract: A testing apparatus comprises a tester base, a supporting member, a frame, one or more electrical connectors and an upper cover. Each electrical connector includes a set of contact members that are positioned on a substrate and having first and second arm portions made of an electrically conductive material. The one or more electrical connectors are mounted on top of ribs in the supporting members and each of the electrical connectors is separated from an adjacent electrical connector by a respective pair of protrusions formed on opposite sides of the frame. Each of the second arm portions of the set of contact members of each electrical connector are disposed in a respective through hole formed in a panel of the supporting member.

Abstract: A fail-safe device is disclosed for ensuring compatibility and reliable operation of a Voltage Indicator System (VIS) for a medium- or high-voltage apparatus in presence of a monitoring system with: a first and second fail-safe device terminal; the first terminal being connectable to an output terminal of a coupler, the coupler being provided in a medium- or high voltage portion of the apparatus, and the second terminal being connectable to an input terminal of the VIS, which is provided in the low-voltage portion; a third and fourth fail-safe device terminal, wherein the third and fourth terminals being electrically connectable to first and second input/output terminals of the monitoring system; and an electrical circuit connecting the first and second fail-safe device terminal and being adapted to compensate for electrical failure modes of the monitoring system such, that the VIS is operable in case the electrical failure modes occur.

Abstract: A method and a photovoltaic inverter for determining the insulation resistance of a photovoltaic system relative to ground are provided. The voltage required for the measurement can be provided by an intermediate circuit in the form of an intermediate circuit voltage and a measuring device is designed to actuate an input short-circuit switch for short-circuiting a DC input with an AC disconnector open, as a result of which the intermediate circuit voltage can be applied to the DC input in the reverse direction. The measuring device is configured to record measured voltages with a switch of a voltage divider open and closed, and to determine the insulation resistance from the measured values of the two measured voltages recorded with the switch of the voltage divider open and closed.

Abstract: A method includes placing a semiconductor device package in a test handler, the semiconductor device package having leads of a first portion of a package substrate extending from a mold compound and leads of a second portion isolated from the first portion extending from the mold compound; contacting the first portion with a first and a second conductive slug; contacting the second portion with a third and a fourth conductive slug; contacting a first surface of the mold compound with a first plunger having a conductive plate and an insulating tip; contacting an opposite second surface of the mold compound with a second plunger having a conductive plate and an insulating tip; and placing a high voltage on the first conductive slug while placing approximately half the high voltage on the conductive plate of the first plunger, and placing a ground voltage on the third conductive slug.

Abstract: A power estimation method is implemented in a three-phase electricity meter, and includes the steps of: detecting a fraud falsifying a first voltage measurement on a first phase; acquiring a second voltage measurement on a second phase, the second voltage measurement not being falsified by the fraud; estimating a first phase shift between the first phase voltage and a first phase current, by using a first phase shift estimation between the first phase voltage and the second phase voltage; estimating at least one first electrical power consumed on the first phase from a first current measurement on the first phase, of the second voltage measurement, and of the first phase shift.

Abstract: In order to provide a piezo valve in which it is possible to accurately predict the remaining lifespan of a piezo actuator, there are provided a valve seat, a valve body that is able to move between a fully closed position in contact with the valve seat and a fully open position, a piezo actuator that drives the valve body, a drive circuit that receives an input signal, and outputs to the piezo actuator a corresponding drive voltage, and a leakage current detector that, when the drive circuit outputs a voltage equal to or greater than a maximum rated voltage that drives the valve body to the fully closed/open position, detects leakage current from the piezo actuator. When the leakage current is detected or in a state immediately prior to detection, a fluid is flowing between the valve seat and the valve body.

Abstract: Embodiments of the present disclosure include a system for determining an error associated with an electrode disposed on a medical device. The system comprises a processor and a memory storing instructions on a non-transitory computer-readable medium. The instructions are executable by the processor to receive an electrode signal from the electrode disposed on the medical device. The instructions are further executable by the processor to receive a plurality of other electrode signals from a plurality of other electrodes disposed on the medical device. The instructions are further executable by the processor to determine that the electrode signal received from the electrode disposed on the medical device is an outlier in relation to the plurality of other electrode signals from the plurality of other electrodes disposed on the medical device, based on a comparison between the electrode signal and the plurality of other electrode signals.

Abstract: The accuracy of an impedance tuner may be improved and the size may be reduced by using linear actuators instead of rotary motors. The linear actuator may be integrated with position sensors to allow very small size, and implemented with a servo system for best accuracy and speed. Spring loaded arms holding the mismatch probes allow the tuner to operate in any orientation to further fit into small spaces. The small size reduces losses by allowing direct connection to wafer probes for on-wafer measurement systems.

Abstract: An apparatus and method for analyzing phase noise in a signal. A plurality of signal samples, each signal sample representing a value of phase noise in a signal-under-test at a corresponding offset frequency, and filter data representing filter characteristics on a first side of a spectrum boundary, are used to derive filtered signal samples. A measure of noise is derived from the filtered signal samples. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.

Abstract: The present disclosure relates to systems and methods to conduct a fuzzer test on a device under test and configured for use in an electric power system. In one embodiment, a system may include a configuration subsystem to receive a parameter of the device under test. A fuzzer subsystem in communication with the configuration subsystem may be configured to conduct a fuzzer test on the device under test. The fuzzer subsystem may include a fuzzer state machine to generate input data to deliver to the device under test, a packet buffer to store input data generated by the fuzzer state machine, and a packet regulator to deliver input data generated by the fuzzer state machine based the parameter. A physical interface in communication with the packet regulator may transmit input data to the device under test based on the parameter.

Abstract: Abstract of Disclosure A method for testing radiation susceptibility includes transmitting radiation wave to a device under test, measuring the device under test to generate a first voltage according to the radiation wave, outputting a reference voltage to a coupling device so that the coupling device generates a second voltage according to the reference voltage, adjusting the reference voltage so that the second voltage approximates the first voltage, storing the adjusted reference voltage, outputting the second voltage to the device under test according to the adjusted reference voltage to simulate an impact of the radiation wave to the device under test, the device under test accordingly transmitting a control signal to the coupling device after receiving the second voltage, and determining a status of the device under test according to the control signal.

Abstract: The present disclosure provides a high-frequency magnetoimpedance testing apparatus and method. A testing platform in the apparatus is arranged within a Helmholtz coil and connected to a modulating electric current source and a high-frequency impedance analyzer, respectively; the Helmholtz coil is connected to a DC power source; a processor is connected to the high-frequency impedance analyzer and the DC power source separately; the testing platform includes a first double-sided copper-clad plate, and mode transition switches and connection terminals that are arranged on the first double-sided copper-clad plate; one end of the first double-sided copper-clad plate is connected to the high-frequency impedance analyzer, while the other end of the same is connected to a load; the mode transition switches are connected to the modulating electric current source.

Abstract: Embodiments of the present disclosure relate to a monitoring circuit and a semiconductor device, and particularly, to a monitoring circuit including an oscillation circuit configured to generate an oscillation signal having a rising characteristic or a falling characteristic according to a threshold voltage level and a counter configured to count the number of rises or the number of falls of the oscillation signal, and a semiconductor device including the monitoring circuit.

Abstract: An integrated circuit chip is attached to a support that includes first conductive elements. First conductive pads are located on the integrated circuit chip and are electrically coupled to the first conductive elements by conductive wires. The integrated circuit chip further includes a conductive track. A switch circuit is provided to selectively electrically connect each first conductive pad to the conductive track. To test the conductive wires, a group of first conductive pads are connected by their respective switch circuits to the conductive track and current flow between corresponding first conductive elements is measured.