Patents Examined by Hafizur Rahman
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Patent number: 11444592Abstract: A filter circuit includes a pass band filter portion configured to pass signals in a first frequency spectrum and attenuate or block signals in a second frequency spectrum. The first frequency spectrum and the second frequency spectrum do not overlap. The pass band filter portion is configured to cause a return loss of more than 10 decibels (dB) in the first frequency spectrum.Type: GrantFiled: July 24, 2020Date of Patent: September 13, 2022Assignee: PPC BROADBAND, INC.Inventors: Erdogan Alkan, Raymond W. Palinkas
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Patent number: 11437971Abstract: Embodiments relate to a transformer-based impedance matching network that may dynamically change its characteristic impedance by engaging different inductor branches on a primary side and optionally, on the secondary side. A primary side transformer circuit includes a primary inductor (311) and secondary inductor (321) configured to provide impedance matching over a first frequency band. One or more additional inductor branches (314A, 314B, are switchably coupled to either or both of the primary and secondary inductors to modify the impedance matching characteristics over additional operating frequencies. One or more LC filter branches (321, 322, 326, 327, 336, 330) can be included at the output of the secondary side to filter harmonic frequencies in each of the operating frequency bands.Type: GrantFiled: June 27, 2018Date of Patent: September 6, 2022Assignee: INTEL CORPORATIONInventors: Chuanzhao Yu, Maximilian Eschbaumer
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Patent number: 11437977Abstract: A bulk-acoustic resonator includes: a substrate; a first electrode disposed on the substrate; a piezoelectric layer at least partially covering the first electrode, and including a flat portion disposed in a central region, and an extension portion disposed outside the flat portion and having at least one step portion; an insertion layer disposed on the extension portion; and a second electrode disposed on upper portions of the insertion layer and the piezoelectric layer. The extension portion includes at least one first surface and at least one second surface disposed below an upper surface of the flat portion, and a connection surface connecting an upper surface of the flat portion to the at least one first surface or the at least one second surface, or connecting first surfaces among the at least one first surface to each other or second surfaces among the at least one second surface to each other.Type: GrantFiled: October 24, 2019Date of Patent: September 6, 2022Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Tae Yoon Kim, Won Han, Moon Chul Lee
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Patent number: 11431304Abstract: A radio-frequency circuit includes a power amplifying circuit configured to amplify a first radio-frequency signal having a first channel bandwidth and a second radio-frequency signal having a second channel bandwidth greater than the first channel bandwidth. The power amplifying circuit is configured to amplify the first radio-frequency signal in an amplifying mode according to an envelope tracking method, and to amplify the second radio-frequency signal in an amplifying mode according to an average power tracking method.Type: GrantFiled: June 23, 2020Date of Patent: August 30, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Shinya Hitomi, Hidenori Obiya, Hirotsugu Mori
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Patent number: 11424720Abstract: A power amplifier provides reduction of click and pop in audio applications. The power amplifier includes a first amplifier and an auxiliary amplifier. The auxiliary amplifier is used to ramp the power amplifier output from ground to an offset voltage to reduce the “click and pop” sound. The first amplifier and the auxiliary amplifier having a shared feedback loop. An output of the first amplifier and an output of the auxiliary amplifier may be switchably coupled to the shared feedback loop. A wave generator controls a switch to couple the first amplifier output or the auxiliary amplifier output to the shared feedback loop.Type: GrantFiled: March 23, 2020Date of Patent: August 23, 2022Assignee: QUALCOMM IncorporatedInventors: Pradeep Silva, Ramkumar Sivakumar, Qubo Zhou, Xinwang Zhang, Hanil Lee, Dongyang Tang, Vijayakumar Dhanasekaran
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Patent number: 11418151Abstract: Provided is a power amplifier circuit that reduces the effect of intermodulation distortion without necessarily increase in the circuit size. The power amplifier circuit includes a first amplifier that amplifies a first signal and output a second signal, an extraction circuit that extracts a second-harmonic wave included in the second signal, a phase adjustment circuit that adjusts the phase of the extracted second-harmonic wave, and a power combiner that combines the second-harmonic wave of the adjusted phase with a third signal and output the first signal.Type: GrantFiled: July 14, 2020Date of Patent: August 16, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Masatoshi Hase
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Patent number: 11418156Abstract: A low noise amplifier that includes a first cascode, a second cascode, an input circuit, an output node, a first switch, and a second switch. A source of a first common gate transistor and a drain of a first common source transistor of the first cascode are coupled to a first node of the low noise amplifier. The output node is coupled to a drain of the first common gate transistor, and to a drain of a second common gate transistor of the second cascode, thereby coupling the first cascode and the second cascode to a power supply via a load. The first switch is coupled between a gate of the first common gate transistor and the power supply. The second switch is coupled between the first node and the power supply. The first switch is configured to be open and the second switch is configured to be closed when the low noise amplifier operates at a first operational node.Type: GrantFiled: August 31, 2020Date of Patent: August 16, 2022Assignee: DSP GROUP LTD.Inventor: Sergey Anderson
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Patent number: 11411536Abstract: Exemplary aspects are directed to a power-amplification circuit including multiple in-parallel circuit paths, each including a power amplifier driving an immittance converter. Current from each output of the respective immittance converters is combined for delivery to a load. In a more specific example, a control circuit may be used to modulate, such as by enabling or disabling power delivered from, one or more of the power amplifiers for fast, coarse resetting of the overall power delivered to the load, and/or to modulate one or more of the modulate immittance converters (e.g., via a phase or signal-timing adjustment) to finely tune the resetting of the overall power delivered to the load. Using the control circuit for providing both the coarse adjustment and the fine adjustment, and fast acting precise delivery of overall power delivered to a load may be realized for any of a variety of applications.Type: GrantFiled: July 17, 2020Date of Patent: August 9, 2022Assignee: The Board of Trustees of the Leland Stanford Junior UniversityInventors: Kawin Surakitbovorn, Juan Rivas-Davila, Lei Gu
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Patent number: 11405005Abstract: A radio frequency amplifier circuit is provided. A matching circuit is configured on a radio frequency path of an input end or an output end of an amplifier. An inductance-capacitance resonance circuit and the matching circuit share an inductor included in the matching circuit to generate a corresponding resonance frequency. The matching circuit provides an input impedance or an output impedance matching two fundamental tones in a radio frequency signal at a first frequency and a second frequency. The inductance-capacitance resonance circuit provides a filtering path for filtering a signal component outside a frequency band formed by the first frequency and the second frequency in the radio frequency signal.Type: GrantFiled: August 13, 2020Date of Patent: August 2, 2022Assignee: RichWave Technology Corp.Inventor: Cheng-Min Lin
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Patent number: 11405015Abstract: A surface acoustic wave device includes a quartz layer, a piezoelectric layer, and an Inter Digital Transducer. A rotation in a right-screw direction is assumed as a +-rotation. A three-dimensional coordinate system formed by an x1-axis, a y1-axis, and a z1-axis respectively matching an X-axis, a Y-axis, and a Z-axis as crystallographic axes of a quartz-crystal is rotated from +125.25° in a range of ±3° with the x1-axis as a rotation axis. Subsequently, the three-dimensional coordinate system is rotated from +45° in a range of ±2° with the z1-axis as the rotation axis. Subsequently, the three-dimensional coordinate system is rotated from ?45° in a range of ±2° with the x1-axis as the rotation axis. The quartz layer is cut along a surface as a sectional plane perpendicular to the z1-axis. The quartz layer has a propagation direction of the surface acoustic wave in a direction parallel to the x1-axis.Type: GrantFiled: February 18, 2019Date of Patent: August 2, 2022Assignee: NDK SAW Devices Co., Ltd.Inventors: Yuya Hiratsuka, Kazuhiro Hirota
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Patent number: 11394348Abstract: A power amplifier circuit includes a first amplifier including two amplifiers connected in series with a matching circuit interposed therebetween, a first power supply circuit that supplies a first power supply voltage to a former amplifier of the first amplifier, and a second power supply circuit that supplies a second power supply voltage to a latter amplifier of the first amplifier.Type: GrantFiled: April 21, 2020Date of Patent: July 19, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Kiichiro Takenaka
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Patent number: 11394354Abstract: A digital power amplifier for a signal, the digital power amplifier comprising: a first activatable amplifier; a second activatable amplifier; and an output network, wherein an output of the first amplifier and an output of the second amplifier are coupled to the output network, and wherein the amplifiers and/or the output network are configured such that four output levels are obtainable at an output of the output network, and said output levels are configured to optimise a linearity of the digital power amplifier for said signal.Type: GrantFiled: June 29, 2020Date of Patent: July 19, 2022Assignee: Kabushiki Kaisha ToshibaInventor: Gavin Tomas Watkins
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Patent number: 11387791Abstract: Spatial power-combining devices with reduced dimensions are disclosed. Spatial power-combining devices are provided that employ a hybrid structure including both a planar splitter/combiner and an antipodal antenna array. Planar splitters may be arranged to divide an input signal while antipodal antenna arrays may be arranged to combine amplified signals. In other applications, the order may be reversed such that antipodal antenna arrays are arranged to divide an input signal while a planar combiner is arranged to combine amplified signals. Advantages of such spatial power-combining devices include reduced size and weight while maintaining suitable performance for operation in desired frequency bands.Type: GrantFiled: March 17, 2020Date of Patent: July 12, 2022Assignee: QORVO US, INC.Inventors: Soack Dae Yoon, Dana Jay Sturzebecher, Patrick Courtney
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Patent number: 11387796Abstract: A power amplifier circuit includes a lower-stage transistor having a first power supply voltage supplied to a first terminal, a second terminal connected to ground, and a first signal supplied to a third terminal; an upper-stage transistor having a second power supply voltage supplied to a first terminal, a second signal obtained by amplifying the first signal being output from the first terminal, a second terminal connected to the first terminal of the lower-stage transistor via a first capacitor, and a third terminal connected to ground via a ground path; an inductor that connects the second terminal of the upper-stage transistor to ground; and an adjustment circuit that adjusts impedance seen from the third terminal of the upper-stage transistor. The adjustment circuit includes a second capacitor and at least one resistance element connected in series with the ground path between the third terminal of the upper-stage transistor and ground.Type: GrantFiled: December 10, 2019Date of Patent: July 12, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Satoshi Tanaka, Kazuo Watanabe, Norio Hayashi, Makoto Itou
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Patent number: 11387790Abstract: The disclosed technology relates generally to semiconductor devices, and more particularly to power semiconductor devices in which effects of charge trapping are compensated. A radio frequency (RF) power transmitter system comprises a RF power semiconductor device that outputs a time-varying gain characteristic from a RF signal input waveform originating from a digital input, wherein the time-varying gain characteristic includes a gain error associated with charge-trapping events having a memory effect on the RF power semiconductor device lasting longer than 1 microsecond. The RF power transmitter system further comprises circuitry configured to apply an analog gate bias waveform to the RF power semiconductor device based on the time-varying gain characteristic to reduce the gain error.Type: GrantFiled: January 14, 2020Date of Patent: July 12, 2022Assignee: Analog Devices International Unlimited CompanyInventors: Mark Cope, Patrick Joseph Pratt
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Patent number: 11381217Abstract: A radio frequency circuit includes a multilayer substrate, series arm circuits in a first path connecting the input/output terminals (T1 and T2) on the multilayer substrate, a parallel arm circuit in a second path connecting a node on the first path and a ground, a wiring A on the multilayer substrate connected to the input/output terminal (T1) as a part of the first path, a wiring B on the multilayer substrate connected to the input/output terminal (T2) as a part of the first path, and a wiring C on the multilayer substrate as a part of the second path. The parallel arm circuit includes an impedance variable circuit, the wiring A and the wiring B in a layer different from the multilayer substrate. When viewed in a plan view, the wiring C does not overlap with the wiring A and the wiring B.Type: GrantFiled: April 22, 2020Date of Patent: July 5, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Hirotsugu Mori, Hideki Tsukamoto, Taizo Hisano
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Patent number: 11374539Abstract: A package (1) includes first and second input terminals (2,3) which are adjacent to each other, and first and second output terminals (4,5) which are adjacent to each other. A first input matching circuit (6), a first delay circuit (7), a second input matching circuit (8), a first amplifier (9), and a first output matching circuit (10) are sequentially connected between the first input terminal (2) and the first output terminal (4) inside the package (1). A third input matching circuit (11), a second amplifier (12), a second output matching circuit (13), a second delay circuit (14), and a third output matching circuit (15) are sequentially connected between the second input terminal (3) and the second output terminal (5) inside the package (1). First to fourth matching circuits (16-19) are respectively connected to the first input terminal (2), the second input terminal (3), the first output terminal (4) and the second output terminal (5) outside the package (1).Type: GrantFiled: August 20, 2018Date of Patent: June 28, 2022Assignee: Mitsubishi Electric CorporationInventor: Katsuya Kato
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Patent number: 11374549Abstract: Acoustic filters and methods of fabrication are disclosed. A filter device includes a substrate and a single-crystal piezoelectric plate, a back surface of the piezoelectric plate attached to a surface of the substrate. The filter device includes a plurality of acoustic resonators including one or more shunt resonators and one or more series resonators. Each of the plurality of acoustic resonators includes an interdigital transducer (IDT) formed on the front surface of the piezoelectric plate, interleaved fingers of the IDT disposed on a respective diaphragm formed by a respective portion of the piezoelectric plate that spans a respective cavity in the substrate. A divided frequency setting layer is formed on at least some of the one or more shunt resonators but not on the one or more series resonators.Type: GrantFiled: October 27, 2020Date of Patent: June 28, 2022Assignee: Resonant Inc.Inventor: Ventsislav Yantchev
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Patent number: 11362625Abstract: A balanced-to-Doherty (B2D) mode-reconfigurable power amplifier (PA) has the capability of maintaining high linearity and high efficiency against load mismatch. The reconfigurable PA includes a switch to alternatively connect to a pre-determined resistive load or a pre-determined pure reactive load (jX), i.e., short, open, or finite reactance between an output quadrature coupler and ground. The biasing of Doherty mode is adaptive dependent on the value of reactive loading (jX). The Doherty operation of this PA is based on an architecture configured from a balanced amplifier, e.g., a quasi-balanced amplifier.Type: GrantFiled: May 29, 2020Date of Patent: June 14, 2022Assignee: University of Central FloridaInventor: Kenle Chen
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Patent number: 11356077Abstract: Acoustic resonator devices and filters. An acoustic resonator includes a substrate and a lithium niobate plate. A back surface of the lithium niobate plate faces the substrate. A portion of the lithium niobate plate forms a diaphragm that spans a cavity in the substrate. An interdigital transducer (IDT) is on a front surface of the lithium niobate plate such that interleaved fingers of the IDT are on the diaphragm. The IDT and the lithium niobate plate are configured such that a radio frequency signal applied to the IDT excites a shear primary acoustic mode within the diaphragm. Euler angles of the lithium niobate plate are [0°, ?, 0° ], where ? is greater than or equal to 40° and less than or equal to 70°.Type: GrantFiled: August 27, 2021Date of Patent: June 7, 2022Assignee: Resonant Inc.Inventor: Bryant Garcia