Abstract: A computer-implemented method for event matching in a complex event processing system includes receiving, with a computer processing device, a stream of event data; receiving, with a computer processing device, an event list and an access predicate list, wherein the event list includes one or more event data pairs; and identifying, with a graphical processing device, patterns in the stream of event data.

Abstract: Systems and methods can be used to store data in a temporal voxel buffer. A first voxel array is stored in association with a first voxel in a voxel grid. The first voxel array includes a plurality of time values. A parameter value is stored in association with each time value of the first voxel array. A second voxel array is stored in association with a second voxel in the voxel grid. The second voxel array stores at least one time value. At least one parameter value is stored in association with the at least one time value of the second voxel array. At least one of the time values stored in the first voxel array is different from each of the at least one time value included in the second voxel array.

Abstract: Systems and methods for decompressing compressed data that has been compressed by way of a lossless compression algorithm are described herein. In a general embodiment, a graphics processing unit (GPU) is programmed to receive compressed data packets and decompress such packets in parallel. The compressed data packets are compressed representations of an image, and the lossless compression algorithm is a Rice compression algorithm.

Abstract: Methods and apparatus for caching neighbor data in a block processing pipeline that processes blocks in knight's order with quadrow constraints. Stages of the pipeline may maintain two local buffers that contain data from neighbor blocks of a current block. A first buffer contains data from the last C blocks processed at the stage. A second buffer contains data from neighbor blocks on the last row of a previous quadrow. Data for blocks on the bottom row of a quadrow are stored to an external memory at the end of the pipeline. When a block on the top row of a quadrow is input to the pipeline, neighbor data from the bottom row of the previous quadrow is read from the external memory and passed down the pipeline, each stage storing the data in its second buffer and using the neighbor data in the second buffer when processing the block.

Abstract: A block processing pipeline in which blocks are input to and processed according to row groups so that adjacent blocks on a row are not concurrently at adjacent stages of the pipeline. A stage of the pipeline may process a current block according to neighbor pixels from one or more neighbor blocks. Since adjacent blocks are not concurrently at adjacent stages, the left neighbor of the current block is at least two stages downstream from the stage. Thus, processed pixels from the left neighbor can be passed back to the stage for use in processing the current block without the need to wait for the left neighbor to complete processing at a next stage of the pipeline. In addition, the neighbor blocks may include blocks from the row above the current block. Information from these neighbor blocks may be passed to the stage from an upstream stage of the pipeline.

Abstract: Disclosed are apparatus and methods for rendering using a graphics processing component (GPC). A computing device can receive instructions for a GPC, including an instruction IA associated with a first portion of a canvas. An insertion position in an instruction buffer for instruction IA can be determined by: determining an instruction IB in the instruction buffer that is associated with a second portion of the canvas. If the first and second portions overlap, the insertion position can be based on an overlapping-instruction position of IB in the instruction buffer. Otherwise, if instructions IA and IB are similar, then the insertion position can be based on a second position of IB in the instruction buffer. Otherwise, the insertion position can be determined based on an ending position of the instruction buffer. Instruction IA can be inserted in the instruction buffer at the insertion position.

Abstract: A graphics processing unit includes a set of geometry processing units each configured to process graphics primitives in parallel with one another. A given geometry processing unit generates one or more graphics primitives or geometry objects and buffers the associated vertex data locally. The geometry processing unit also buffers different sets of indices to those vertices, where each such set represents a different graphics primitive or geometry object. The geometry processing units may then stream the buffered vertices and indices to global buffers in parallel with one another. A stream output synchronization unit coordinates the parallel streaming of vertices and indices by providing each geometry processing unit with a different base address within a global vertex buffer where vertices may be written. The stream output synchronization unit also provides each geometry processing unit with a different base address within a global index buffer where indices may be written.

Abstract: Systems and methods can be used to render an animated scene using a temporal voxel buffer. A voxel buffer including a plurality of voxel arrays is received. A voxel array includes at least one time value associated with a voxel and at least one parameter value associated with each time value. For each pixel of an image to rendered, a plurality of rays are cast through the voxel grid. A time value is associated with each ray. A parameter value is sampled at each voxel along a ray at the time associated with the ray. A pixel value is determined based on the sampled parameter values for the plurality of rays.

Abstract: A GPU may determine, based on a visibility stream, whether to execute instructions stored in an indirect buffer. The instructions include instructions for rendering primitives associated with a bin of a plurality of bins and include one or more secondary operations. The visibility stream indicate if one or more of the primitives associated with the bin will be visible in a finally rendered scene. The GPU may, responsive to determining not to execute the instructions stored in the indirect buffer, execute one or more secondary operations stored in a shadow indirect buffer. The GPU may, responsive to determining to execute the instructions stored in the indirect buffer, execute the instructions for rending the primitives associated with the bin of the plurality of bins and executing the one or more secondary operations stored in the indirect buffer.

Abstract: A reconfigurable computation device for image processing, the device including a neighborhood-based computation matrix, generating pairing sub-scores between pairs of pixels resulting from a first series of operations configurable via a configuration register; a flexible reduction tree, carrying out a second series of operations configurable via the configuration register, on neighborhoods of pixels configurable via the configuration register; and an analysis matrix, carrying out computations configurable via the configuration register on the results arising from the flexible reduction tree.

Abstract: Various disclosed embodiments include methods, systems, and computer-readable media for generating a 3-dimensional (3D) panorama. A method includes receiving images of a 3D scene. The method includes reconstructing geometry of a plurality of 3D bubble-views from the images. Reconstructing includes using a structure from motion framework for camera localization, generating a 3D surface mesh model of the scene using multi-view stereo via cylindrical surface sweeping for each bubble-view, and registering multiple 3D bubble-views in a common coordinate system. The method includes displaying the surface mesh model.

Abstract: Methods and systems which may implement buffer swapping are provided. The methods include rendering, onto screen locations of a display screen, data from a memory having a first buffer and a second buffer, each buffer having respective buffer memory locations which correspond to the screen locations of the display screen. The methods can include: rendering first data from the first buffer onto the display screen; writing, to the second buffer, second data based on at least some of the first data from the first buffer by performing at least one of transforming at least some first data and changing corresponding screen locations of at least some first data from the first buffer, by writing at most once to each buffer memory location of the second buffer; and rendering the second data from the second buffer onto the display screen.

Abstract: A graphics system may include one or more processing units for processing a current display frame, each processing unit including a plurality of parameter registers for storing parameter settings used in processing the current display frame. A parameter buffer in the graphics system may store frame packets, with each frame packet containing information corresponding to parameter settings to be used for at least one display frame. A control circuit coupled to the buffer and to the one or more processing units may retrieve and process a top frame packet from the parameter buffer to update one or more of the parameter registers according to the contents of the top frame packet. The control circuit may issue DMA requests to fill the parameter buffer with frame packets transferred from system memory, where the frame packets may be written by an application (or software) executing on a central processing unit.

Abstract: A graphics card is provided. The graphics card comprises: a Graphics Processing Units (GPU) for data computing; and a wireless controller for wirelessly receiving data from other graphic cards or sending data to the other graphics cards, and communicating with the GPU by bus. The graphic card able provided by the present invention can provide a low-cost solution with more powerful computing capabilities to meet the demands for computing complex problems in the fields of commerce, industry, and science.

Abstract: This disclosure describes techniques for performing memory transfer operations with a graphics processing unit (GPU) based on a selectable memory transfer mode, and techniques for selecting a memory transfer mode for performing all or part of a memory transfer operation with a GPU. In some examples, the techniques of this disclosure may include selecting a memory transfer mode for performing at least part of a memory transfer operation, and performing, with a GPU, the memory transfer operation based on the selected memory transfer mode. The memory transfer mode may be selected from a set of at least two different memory transfer modes that includes an interleave memory transfer mode and a sequential memory transfer mode. The techniques of this disclosure may be used to improve the performance of GPU-assisted memory transfer operations.

Abstract: Devices and methods for providing an indication of an active frame start, while reducing a number of line buffers utilized by conventional systems are provided herein. By way of example, an electronic display panel may include a host device (e.g., a processor) that provides an indication of a pending active frame start. The indication may be provided at a predetermined and fixed time/line interval before the active frame start. Next, a timing controller of the display circuitry may generate a vertical start pulse during vertical blanking based upon the indication and the fixed time/line interval. The vertical start pulse may be used to drive multi-clock integrated row driver circuits.

Abstract: A system, method, and computer program product are provided for a display multiplier. First image data is received for a first display device and second image data is received for a second display device, where the second display device has fewer scan lines than the first display device. A scan line of the second image data is duplicated and a display multiplier output stream is generated that includes a first scan line of the first image data, the scan line of the second image data, a second scan line of the first image data, and the duplicated scan line of the second image data.

Abstract: A method and apparatus for creating, updating, and using guest physical address (GPA) to host physical address (HPA) shadow translation tables for translating GPAs of graphics data direct memory access (DMA) requests of a computing environment implementing a virtual machine monitor to support virtual machines. The requests may be sent through a render or display path of the computing environment from one or more virtual machines, transparently with respect to the virtual machine monitor. The creating, updating, and using may be performed by a memory controller detecting entries sent to existing global and page directory tables, forking off shadow table entries from the detected entries, and translating GPAs to HPAs for the shadow table entries.

Abstract: One embodiment of the present invention sets forth a technique for specifying scene programs, where the effect of executing a particular scene program is to generate a sequence of graphics commands. The application programming interface is extended to include calls used to specify a high-level scene program. Upon receiving a high-level scene program, the graphics driver generates a machine code scene program. When an application program emits a call to execute one or more machine code scene programs, the graphics driver transmits corresponding scene programs execution commands to the graphics pre-processing unit. For each scene program execution command, the graphics pre-processing unit processes instructions, programmatically reconfigures the graphics pipeline based on the execution of the machine code scene program, and launches one or more parallel threads that execute commands within the graphics pipeline.

Abstract: A system and method are disclosed is to prevent the screen tearing in a video display system with self-refresh features while limiting space used for memory size in the self-refreshing sink device. A flexible method is utilized to manage a frame buffer and control self-refresh display timing to prevent screen tearing. The sink device has capabilities including one or more of self-refreshing and applying single frame updates as well as burst single frame updates while self-refresh is active. The memory utilized by the frame buffer during self-refresh is limited to less than that needed to store two full frames of video.