Abstract: An illuminated needle device for performing a heart valve repair includes an outer member and an inner member. The outer member includes a body that has a proximal end and a distal end. The body of the outer member defines a lumen therethrough and the distal end of the body includes a needle. The inner member is slidably disposed within the lumen of the outer member. The inner member includes a distal end that has a radiation emitting element. The illuminated needle device is characterized by the outer and inner members together forming a flexible, elongate shaft, and the inner member being configured to emit radiation from the radiation emitting element from a location proximate to the distal end of the outer member.

Abstract: A programming method for a memory device is disclosed. The programming method comprises moving a plurality of first charge carriers at a shallow energy level to a channel in a substrate layer before a fine programming operation for a first word line, wherein the plurality of first charge carriers at the shallow energy level correspond to a memory cell to be programmed.

Abstract: Stochastic or near-stochastic physical characteristics of resistive switching devices are utilized for generating data distinct to those resistive switching devices. The distinct data can be utilized for applications related to electronic identification. As one example, data generated from physical characteristics of resistive switching devices on a semiconductor chip can be utilized to form a distinct identifier sequence for that semiconductor chip, utilized for verification applications for communications with the semiconductor chip or utilized for generating cryptographic keys or the like for cryptographic applications.

Abstract: A method of operating a memory device is provide. A clock signal is received. Each clock cycle of the clock signal initiates a write operation or a read operation in a memory device. A power nap period is then determined. The power nap period is compare with a clock cycle period to determine that the power nap period is less that the clock cycle period of the clock signal. A header control signal is generated in response to determining that the power nap period is less than the clock cycle period. The header control signal turns off a header of a component of the memory device.

Abstract: A semiconductor storage device includes a memory cell unit which includes memory cell arrays including a plurality of memory cells; a peripheral circuit which performs voltage transmission control including a write operation, a read operation, and an erasing operation with respect to the memory cell unit; and signal lines which connect the peripheral circuit to the memory cell unit, and at least a portion of the signal lines is formed in a non-facing region, the non-facing region being a region where the memory cell unit does not face the peripheral circuit, the non-facing region being in a peripheral region formed around a periphery of the memory cell arrays of the memory cell unit.

Abstract: An electronic device is provided. A memory device controls a signal for setting a voltage level of a bit line. The memory device includes a plurality of memory cells, a peripheral circuit configured to perform a plurality of program loops for programming selected memory cells among the plurality of memory cells, and a sense signal controller configured to determine, during a program operation on a first memory cell among the selected memory cells, a bit line set-up time of a bit line coupled to the first memory cell based on at least one of a state of second memory cells adjacent to the first memory cell and a number of program loops performed on the first memory cell, the first memory cell having a threshold voltage higher than a pre-verify voltage and lower than a main verify voltage.

Abstract: Provided herein is a semiconductor memory device and a method of operating the same. The semiconductor memory device includes a memory block, a peripheral circuit, and a control logic. The memory block includes a plurality of sub-blocks coupled to a plurality of source select lines, respectively. The peripheral circuit performs a program operation on the memory block. The control logic is configured to control the peripheral circuit to increase a voltage of a common source line that is coupled to the memory block, increase a voltage of at least one source select line, among the plurality of source select lines, to a first voltage level, and set a voltage of a bit line that is coupled to the memory block and increase the voltage of at least one source select line from the first voltage level to a second voltage level.

Abstract: A non-volatile memory device includes a data generation circuit and a reconfiguration processing circuit. The data generation circuit generates: third response data that is different from the first response data (PUF registration mode), when the reconfiguration writing is executed by the reconfiguration processing circuit and the first type of challenge data is obtained again after the reconfiguration writing is executed, after the first response data is generated; and fourth response data that is identical to the second response data (permanent PUF registration mode), when the reconfiguration writing is executed by the reconfiguration processing circuit and the second type of challenge data is obtained again after the reconfiguration writing is executed, after the second response data is generated.

Abstract: An apparatus, system, and method for neurostimulation by high frequency ultrasound. In one embodiment, an apparatus includes a pulse generator, an ultrasound transducer coupled to the pulse generator, and an implantable stimulator. The implantable stimulator may include a piezoelectric element configured to convert ultrasound signals from the ultrasound transducer into electrical signals, a rectifier configured to convert alternating current from the piezoelectric element to a monophasic current, a capacitor coupled to the rectifier, and a first electrode and a second electrode coupled to the rectifier and capacitor and configured to transmit the monophasic current to body tissue. In addition, the apparatus may include a current-limiting circuit configured to limit the amount of current transmitted to the body tissue.

Abstract: A transducer array (10) is disclosed comprising a plurality of CMUT cells (100, 100, 100?), each CMUT cell comprising a first electrode (110) supported by a substrate (101) and a second electrode (120) supported by a membrane suspended over a cavity (105) between the first electrode and the second electrode, the plurality of CMUT cells comprising a first group of CMUT cells (100) each having a membrane comprising a first layer stack (130); and a second group of CMUT cells (100?) each having membrane comprising a second layer stack (130?), the second layer stack including a layer (135) of a material having a higher density than any of the layers in the first layer stack. Also disclosed is a device comprising such a transducer array, an ultrasound imaging system including such a transducer array and a method of operating such an ultrasound imaging system.

Abstract: Systems and methods for electromagnetic distortion detection are disclosed. In one aspect, the system includes an electromagnetic (EM) sensor configured to generate an EM sensor signal in response to detection of the EM field. The system may also include a processor configured to calculate a baseline value of a metric indicative of a position of the EM sensor at a first time and calculate an updated value of the metric during a time period after the first time. The processor may be further configured to determine that a difference between the updated value and the baseline value is greater than a threshold value and determine that the EM field has been distorted in response to the difference being greater than the threshold value.

Abstract: A semiconductor storage device of an embodiment includes a control circuit configured to execute a writing sequence in which a loop including a program operation that writes data to memory cells and a program verify operation that verifies the data written in the memory cells is repeated a plurality of times by increasing a program voltage by a predetermined step-up voltage each time, the control circuit being capable of executing reading verify that verifies the data written in the memory cells in the writing sequence, and the control circuit detects characteristic variation of a characteristic that causes disturbance, and determines whether to perform the reading verify based on a result of the detection.

Abstract: A waveguide that is configured to focus ballistic shockwaves by harnessing the propagation speed of an acoustic wave through different materials by controlling the geometry and the materials forming the waveguide through which the ballistic shockwave is travelling so as to focus the ballistic shockwaves at a focal zone.

Abstract: The invention consists of an electronic system for controlled and independent treatment of fractures, bone, muscle and tendon injuries, post-surgery pain and osteonecrosis, composed by a portable ultrasound generator, electronic prescription, centralised web services platform and computer program for ultrasonic treatment both within and outside the sanitary field, in the fields of human and veterinary medicine. The method controls the treatment applied, the charge prescribed by healthcare professionals by means of an electronic prescription, which can be administered by the patients themselves or by non-healthcare professionals independently, under the control of a computer program and a web platform used to activate the therapeutic equipment, write and delete the electronic prescription, transfer data stored in the therapeutic equipment to the web services platform to analyse the quantity and quality of the treatments, and update the program.

Abstract: A memory device including a memory cell area having a plurality of memory cells, and a peripheral circuit area including peripheral circuits configured to control the memory cells, the peripheral circuits connected to the memory cells by at least a portion of bit lines, word lines, and select lines may be provided. The peripheral circuits may include a reference voltage generator configured to output at least one reference voltage in response to control data of a control logic. The reference voltage generator may include a first resistor chain including first resistors connected in series between a first power node and a second power node, a second resistor chain including second resistors connected in series between the first power node and the second power node, and a plurality of decoders connected to the first resistor chain and the second resistor chain.

Abstract: Provided is an ultrasound therapy system for treating a joint by providing a focused ultrasound wave to a bone surface as an affected part, and which has a temperature monitoring function for controlling irradiation intensity. The ultrasound therapy system includes a focused ultrasound wave providing unit provided on skin and configured to radiate the focused ultrasound wave to the affected part, and a temperature detecting unit configured to measure a temperature of the affected part. The temperature detecting unit includes an electromagnetic wave measuring unit configured to measure intensity of an electromagnetic wave radiated from the bone surface, and an analyzing unit configured to analyze change of the electromagnetic wave of the electromagnetic wave measuring unit to provide the temperature of the affected part.

Abstract: A storage device according to an embodiment is for storing weights being continuous values. The storage device includes: a shift register, an initialization circuit, an update control circuit, and a readout control circuit. The shift resistor includes a plurality of cells, each being arranged in series and storing information. A position of each of the plurality of cells corresponds to the weight. The initialization circuit writes the information to a cell in the shift register. The update control circuit shifts a position of the cell storing the information in a direction corresponding to a sign of an update amount by a number of cells corresponding to an absolute value of the update amount. The readout control circuit reads out the information and outputs an output value according to the weight corresponding to the position of the cell storing the information.

Abstract: Devices, systems and methods for improving the performance of a memory device are described. An example method includes obtaining a plurality of cell counts for each of a plurality of read voltages applied to the memory device, generating, based on the plurality of cell counts and the plurality of read voltages, at least one ones count, at least one checksum, and a plurality of samples corresponding to a distribution function of at least one read voltage of the plurality of read voltages, determining an updated value for the at least one read voltage based on an output of a deep neural network whose input comprises the at least one ones count, the at least one checksum, and the plurality of samples, and applying the updated value of the at least one read voltage to the memory device to retrieve information from the memory device.

Abstract: There is provided a system architecture including a PPG hardware module and a MEMS hardware module. The PPG hardware module processes PPG raw data, which is generally composed of analog signals or digital signals. The PPG hardware module filters the raw data for later digital calculation to, for example, find out frequency signals with higher peak values. The PPG hardware module then outputs the selected frequency signals to an MCU for heart rate calculation. The MEMS hardware module receives MEMS raw data from a motion detector made of MEMS elements. The MEMS raw data represents motion status of a user that could possibly affect the heart rate determination result. The MEMS hardware module filters the raw data for later digital calculation to find out frequency signals with higher peak values caused by motion.

Abstract: A method for generating a transcranial magnetic stimulation (TMS) coil pose atlas based on electromagnetic simulating calculation includes: constructing coil array positions and orientations of a scalp in a standard Montreal Neurological Institute (MNI) space and matching the coil array positions and orientations of the scalp to a brain space of an individual to obtain coil array positions and orientations of the brain space of the individual; using a finite element calculation method to simulate the coil array positions of the brain space of the individual to obtain induced electric field distributions of brain tissue in different coil orientations; obtaining optimal regulation effects based on the induced electric field distributions of the brain tissue; and obtaining a coil position and orientation corresponding to each optimal regulation effect as an optimal coil pose of each divided brain area of the individual, and constructing a TMS coil pose atlas of the individual.