Abstract: An optoelectronic component, includes a carrier, a metallic mirror layer arranged on the carrier, a first passivation layer arranged on a region of the metallic mirror layer, a semiconductor layer that generates an active region during electrical operation arranged on the first passivation layer, a second passivation layer including two regions, wherein the first region is arranged on a top face of the semiconductor layer, and the second region which is free of the semiconductor layer is arranged on the metallic mirror layer, and wherein the first and second regions are separated from one another by a region which surrounds the first passivation layer and which is free of the second passivation layer.

Abstract: In a CMOS circuit formed on a substrate 100, a subordinate gate wiring line (a first wiring line) 102a and main gate wiring line (a second wiring line) 113a are provided in an n-channel TFT. The LDD regions 107a and 107b overlap the first wiring line 102a and not overlap the second wiring line 113a. Thus, applying a gate voltage to the first wiring line forms the GOLD structure, while not applying forms the LLD structure. In this way, the GOLD structure and the LLD structure can be used appropriately in accordance with the respective specifications required for the circuits.

Abstract: A method for electrically coupling an anti-tamper mesh to an electronic module or device using wire bonding equipment and a device made from the method. Stud bumps or free air ball bonds are electrically coupled to conductive mesh pads of an anti-tamper mesh. Respective module pads have a conductive epoxy disposed thereon for the receiving of the stud bumps or free air ball bonds, each of which are aligned and bonded together to electrically couple the anti-tamper mesh to predetermined module pads.

Abstract: The invention relates to an organic optoelectronic device, such as a display, lighting or signalling device, that is protected from the ambient air by a sealed encapsulation in the form of a thin film, and to a method for encapsulating such a device. An optoelectronic device (1) according to the invention is coated with a sealed multi-layer encapsulation structure (20) comprising alternating inorganic layers (21a to 26a) and organic layers (21b to 25b). According to the invention, the device is such that at least one of said organic layers consists of a crosslinked adhesive film (21b to 25b) based on a glue that can be crosslinked thermally or by electromagnetic radiation, the or each adhesive film having a thickness uniformly lower than 200 n, said thickness being obtained by passing the film, which is deposited and not yet cross-linked, through a vacuum, such that the total thickness of the encapsulation structure is minimized.

Abstract: A single damascene or dual damascene interconnect structure fabricated with a photo-patternable low-k dielectric (PPLK) which is cured after etching. This method prevents the PPLK damage and the tapering of the edges of the interconnect structure. In one embodiment, the method of the present invention includes depositing a photo-patternable low-k (PPLK) material atop a substrate. The at least one PPLK material is patterned, creating a single damascene structure. For dual damascene structures, a second PPLK layer is coated and patterned. An etch process is performed to transfer the pattern from the PPLK material into at least a portion of the substrate. A diffusion liner and a conductive material can be deposited after the etch process. The resulting structure is cured anytime after etching in order to transform the resist like PPLK into a permanent low-k material that remains within the structure.

Abstract: An organic light emitting device having a light emitting unit that includes an anode layer, a second wire, an insulating layer, first and second organic light emitting layers and a cathode layer is provided. The anode layer includes first and second sub-electrodes and a first wire connecting the first and second sub-electrodes that are arranged in a first direction. The second wire is disposed between the first and second sub-electrodes. The insulating layer is disposed on the first and second sub-electrodes and the second wire, and has a plurality of openings to expose the first sub-electrode, the second sub-electrode and the second wire. The first and second organic light emitting layers are disposed in two openings. The cathode layer is disposed on the first and second organic light emitting layers, and the cathode layer fills another opening to electrically connect to the second wire through the another opening.

Abstract: According to one embodiment, provided is a package and high frequency terminal structure for the same including: a conductive base plate; a semiconductor device disposed on the conductive base plate; a metal wall disposed on the conductive base plate to house the semiconductor device; a through-hole disposed in input and output units of the metal wall; a lower layer feed through inserted into the through-hole and disposed on the conductive base plate; and an upper layer feed through disposed on the lower layer feed through, and adhered to a sidewall of the metal wall. The lower layer feed through is surrounded by the metal wall.

Abstract: Provided on a chip are a plurality of conductor patterns for forming a coil, and a connection-relationship control device for controlling connection between adjacent conductor patterns. By switching the connection relationship of the conductor patterns by the connection-relationship control device, it is possible to form a coil of a desired shape at a desired position.

Abstract: In previously known imaging devices as in still and motion cameras, for example, image sensor signal response typically is linear as a function of intensity of incident light. Desirably, however, akin to the response of the human eye, response is sought to be nonlinear and, more particularly, essentially logarithmic. Preferred nonlinearity is realized in image sensor devices of the invention upon severely limiting the number of pixel states, combined with clustering of pixels into what may be termed as super-pixels.

Abstract: In one embodiment, a shift register memory includes a substrate, and a channel layer provided on the substrate, and having a helical shape rotating around an axis which is perpendicular to a surface of the substrate. The memory further includes at least three control electrodes provided on the substrate, extending in a direction parallel to the axis, and to be used to transfer charges in the channel layer.

Abstract: A method of manufacturing a microphone using epitaxially grown silicon. A monolithic wafer structure is provided. A wafer surface of the structure includes poly-crystalline silicon in a first horizontal region and mono-crystalline silicon in a second horizontal region surrounding a perimeter of the first horizontal region. A hybrid silicon layer is epitaxially deposited on the wafer surface. Portions of the hybrid silicon layer that contact the poly-crystalline silicon use the poly-crystalline silicon as a seed material and portions that contact the mono-crystalline silicon use the mono-crystalline silicon as a seed material. As such, the hybrid silicon layer includes both mono-crystalline silicon and poly-crystalline silicon in the same layer of the same wafer structure. A CMOS/membrane layer is then deposited on top of the hybrid silicon layer.

Abstract: A method and structure provide for customizing STI, shallow trench isolation, structures in various parts of a system-on-chip, SOC, or other semiconductor integrated circuit device. Within an individual chip, STI structures are formed to include different dielectric thicknesses that are particularly advantageous for the particular device portion of the SOC chip in which the STI structure is formed.

Abstract: A method for forming a DRAM memory with a two-sided transistor includes: providing a silicon finFET structure having at least two fins, and a trench between the fins; forming high ohmic gates on either side of the fins; forming a hole between each pair of high ohmic gates to enable connection between the pair of high ohmic gates; forming a gate on one side of the trench and underneath one of the pair of high ohmic gate; forming a layer of oxide over the gate; and depositing tungsten in the trench to form a thick layer of metal at the bottom to form a word line.

Abstract: A non-volatile memory cell structure and a method of fabricating the same. The method comprising the steps of: fabricating a portion of a floating gate from one or more first metal local interconnection layer (LIL) slit contacts deposited on a patterned dielectric layer; and fabricating a portion of a control gate from one or more second metal LIL slit contacts deposited on the patterned dielectric layer; wherein the first and second metal LIL slit contacts form a capacitive structure between the floating gate and the control gate.

Abstract: A method of growing planar non-polar m-plane III-Nitride material, such as an m-plane gallium nitride (GaN) epitaxial layer, wherein the III-Nitride material is grown on a suitable substrate, such as an m-plane Sapphire substrate, using hydride vapor phase epitaxy (HVPE). The method includes in-situ pretreatment of the substrate at elevated temperatures in the ambient of ammonia and argon, growing an intermediate layer such as an aluminum nitride (AlN) or aluminum-gallium nitride (AlGaN) on the annealed substrate, and growing the non-polar m-plane III-Nitride epitaxial layer on the intermediate layer using HVPE. Various alternative methods are disclosed.

Abstract: It is an object to provide a nonvolatile semiconductor storage device that prevents increase in a contact resistance value due to etching of a semiconductor layer when etching an interlayer insulating film and that has superiority in a writing characteristic and an electric charge-holding characteristic, and a manufacturing method thereof. A conductive layer is provided between a source or drain region and a source or drain wiring. The conductive layer is made of the same conductive layer that forms a control gate electrode. An insulating film is provided so as to cover the conductive layer, and the insulating film has a contact hole for exposing part of the conductive layer. The source or drain wiring is formed so that the contact hole is filled.

Abstract: At least one or more of a conductive layer which forms a wiring or an electrode and a pattern necessary for manufacturing a display panel such as a mask for forming a predetermined pattern is formed by a method capable of selectively forming a pattern to manufacture a liquid crystal display device. A droplet discharge method capable of forming a predetermined pattern by selectively discharging a droplet of a composition in accordance with a particular object is used as a method capable of selectively forming a pattern in forming a conductive layer, an insulating layer, or the like.

Abstract: Objects of the invention are to provide an organic compound having excellent properties, which is excellent in eleclron-injecting/transporling performance, has hole-blocking ability, and is highly stable in a thin-film state, as a material for an organic electroluminescent devices having a high-efficiency and a high durability; and to provide an organic electroluminescent device having a high-efficiency and a high durability using the compound. The invention relates to: a compound having a pyridoindolc ring structure bonded with a substituted pyridyl group and an organic electroluminescent device comprising a pair of electrodes and at least one organic layer interposed between the electrodes.

Abstract: A microphone array is described for use in ultra-high acoustical noise environments. The microphone array includes two directional close-talk microphones. The two microphones are separated by a short distance so that one microphone picks up more speech than the other. The microphone array can be used along with an adaptive noise removal program to remove a significant portion of noise from a speech signal of interest.

Abstract: A benzopyrene compound represented by a general formula [1] below, where one of X1 and X2 represents a substituted or unsubstituted aryl group; another one of X1 and X2 represents a hydrogen atom; R represents an alkyl group; and n represents 0 or 1.