Patents Examined by Hsin-Yi Hsieh
  • Patent number: 8592858
    Abstract: A light-emitting diode (10) includes a transparent substrate and a compound semiconductor layer that contains a light-emitting part (12) containing a light-emitting layer (133) formed of (AlXGa1-X)YIn1-YP (0?X?1 and 0<Y?1) joined to the transparent substrate (14). The light-emitting diode (10) has on a main light-extracting surface thereof a first electrode (15) and a second electrode (16) different in polarity from the first electrode. The transparent substrate has side faces that are a first side face (142) roughly perpendicular to a light-emitting surface of the light-emitting layer on a side near the light-emitting layer and a second side face (143) inclined relative to the light-emitting surface on a side distant from the light-emitting layer and coarsened with irregularities falling in a range of 0.05 ?m to 3 ?m.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: November 26, 2013
    Assignee: Showa Denko K.K.
    Inventor: Wataru Nabekura
  • Patent number: 8592934
    Abstract: On the front side of an n-type semiconductor substrate 5, p-type regions 7 are two-dimensionally arranged in an array. A high-concentration n-type region 9 and a p-type region 11 are disposed between the p-type regions 7 adjacent each other. The high-concentration n-type region 9 is formed by diffusing an n-type impurity from the front side of the substrate 5 so as to surround the p-type region 7 as seen from the front side. The p-type region 11 is formed by diffusing a p-type impurity from the front side of the substrate 5 so as to surround the p-type region 7 and high-concentration n-type region 9 as seen from the front side. Formed on the front side of the n-type semiconductor substrate 5 are an electrode 15 electrically connected to the p-type region 7 and an electrode 19 electrically connected to the high-concentration n-type region 9 and the p-type region 11.
    Type: Grant
    Filed: December 7, 2006
    Date of Patent: November 26, 2013
    Assignee: Hamamatsu Photonics K.K.
    Inventor: Tatsumi Yamanaka
  • Patent number: 8569746
    Abstract: An organic field effect transistor including an organic semiconductor layer constituting a current path between a source electrode and a drain electrode wherein the organic semiconductor layer is made of a conjugated polymer having a depletion layer and a conductivity of the organic semiconductor layer is controlled by using a gate electrode, wherein the depletion layer is formed by joining a reductive material being capable of forming Schottky contact with the organic semiconductor layer made of the conjugated polymer. There can be provided an organic field effect transistor using a conjugated polymer as an organic semiconductor and being capable of maintaining an insulation property.
    Type: Grant
    Filed: June 4, 2009
    Date of Patent: October 29, 2013
    Assignee: Kyushu Institute of Technology
    Inventors: Shuichi Nagamatsu, Wataru Takashima, Keiichi Kaneto
  • Patent number: 8519432
    Abstract: A semiconductor switch comprises a PNPN structure arranged to provide an SCR-like functionality, and a MOS gate structure, preferably integrated on a common substrate. The switch includes ohmic contacts for the MOS gate, and for the cathode and gate regions of the PNPN structure; the anode contact is intrinsic. A fixed voltage is typically applied to an external node. The MOS gate structure allows current to be conducted between the external node and the intrinsic anode when on, and the PNPN structure conducts the current from the anode to the cathode when an appropriate voltage is applied to the gate contact. Regenerative feedback keeps the switch on once it begins to conduct. The MOS gate inhibits the flow of current between the external node and anode—and thereby turns off the switch—when off. When on, the MOS gate's channel resistance serves as a ballast resistor.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: August 27, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Jeffrey G. Barrow, Javier A. Salcedo, A. Paul Brokaw
  • Patent number: 8507344
    Abstract: A semiconductor device and a method for manufacturing the same are disclosed. The method for forming the semiconductor device includes forming one or more buried gates in a semiconductor substrate, forming a landing plug between the buried gates, forming a bit line region exposing the landing plug over the semiconductor substrate, forming a glue layer in the bit line region, forming a bit line material in the bit line region, and removing the glue layer formed at inner sidewalls of the bit line region, and burying an insulation material in a part where the glue layer is removed. A titanium nitride (TiN) film formed at sidewalls of the damascene bit line is removed, so that resistance of the bit line is maintained and parasitic capacitance of the bit line is reduced, resulting in the improvement of device characteristics.
    Type: Grant
    Filed: December 27, 2010
    Date of Patent: August 13, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Chan Woo Kim
  • Patent number: 8497577
    Abstract: An apparatus includes a Micro Electrical Mechanical System (MEMS) having electrical contacts and a MEMS device in electrical communication with the electrical contacts. A lid is oriented over the MEMS device and not the electrical contacts. The lid has a base region and a top region, the base region being wider in dimension than the top region and oriented in closer proximity to the MEMS device than the top region.
    Type: Grant
    Filed: October 10, 2007
    Date of Patent: July 30, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Chien-Hua Chen, David M. Craig, Charles C. Haluzak
  • Patent number: 8497502
    Abstract: A thin film field effect transistor includes at least: a substrate; and a gate electrode, a gate insulating layer, an active layer, a source electrode and a drain electrode, and a protective layer provided on the substrate in this order from the substrate side. The active layer is a layer containing an amorphous oxide containing at least one metal selected from the group consisting of In, Sn, Zn and Cd. The thin film field effect transistor further includes, between the active layer and at least one of the source electrode or the drain electrode, an electric resistance layer containing an oxide or nitride containing at least one metal selected from the group consisting of Ga, Al, Mg, Ca and Si.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: July 30, 2013
    Assignee: FUJIFILM Corporation
    Inventor: Hiroyuki Yaegashi
  • Patent number: 8492771
    Abstract: A semiconductor device includes a first semiconductor substrate of a first band-gap material and a second semiconductor substrate of a second band-gap material. The second band-gap material has a lower band-gap than the first band-gap material. A heterojunction is formed between the first semiconductor substrate and the second semiconductor substrate substantially in a first plane. The semiconductor device further includes, in a cross-section which is perpendicular to the first plane, a first semiconductor region of a first conductivity type and a second semiconductor region of the first conductivity type both of which extend from the second semiconductor substrate at least partially into the first semiconductor substrate.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: July 23, 2013
    Assignee: Infineon Technologies Austria AG
    Inventors: Michael Rüb, Michael Treu, Armin Willmeroth, Franz Hirler
  • Patent number: 8368092
    Abstract: A thin-film LED comprising an active layer (7) made of a nitride compound semiconductor, which emits electromagnetic radiation (19) in a main radiation direction (15). A current expansion layer (9) is disposed downstream of the active layer (7) in the main radiation direction (15) and is made of a first nitride compound semiconductor material. The radiation emitted in the main radiation direction (15) is coupled out through a main area (14), and a first contact layer (11, 12, 13) is arranged on the main area (14). The transverse conductivity of the current expansion layer (9) is increased by formation of a two-dimensional electron gas or hole gas. The two-dimensional electron gas or hole gas is advantageously formed by embedding at least one layer (10) made of a second nitride compound semiconductor material in the current expansion layer (9).
    Type: Grant
    Filed: January 25, 2005
    Date of Patent: February 5, 2013
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Johannes Baur, Berthold Hahn, Volker Härle, Raimund Oberschmid, Andreas Weimar
  • Patent number: 8362614
    Abstract: A semiconductor device has a semiconductor chip in which a plurality of semiconductor components and a plurality of pads are arranged, a plurality of external connection contacts arranged in grids, and a plurality of wires for electrically connecting the pads and the external connection contacts. The pads include a plurality of pad groups including a pair of electrode pads connected to the plurality of semiconductor components in common and a plurality of signal pads respectively connected to the semiconductor components connected to the electrode pads. In each pad group, each signal pad is arranged adjacently to one of the electrode pads; and each wire extending from each signal pad is extended along a wire extended from the electrode pad adjacent to each signal pad.
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: January 29, 2013
    Assignee: Elpida Memory, Inc.
    Inventors: Mitsuaki Katagiri, Hiroya Shimizu, Fumiyuki Osanai, Yasushi Takahashi, Seiji Narui
  • Patent number: 8350378
    Abstract: A diode, e.g., a press-fit power diode for a rectifier in a motor vehicle, includes a semiconductor chip which is connected to a head wire and a base via solder layers. A plastic sheathing, which is situated at least in the chip area and includes a plastic sleeve, enables a hard casting compound to be used and establishes a mechanical connection between the base and the head wire and forms a housing together with the base. An undercut, which extends into the casting compound, and a gap between the sleeve and the edge of the base achieve a compact design. Bevels provided on both sides enable the diode to be pressed into the rectifier from two sides.
    Type: Grant
    Filed: November 8, 2004
    Date of Patent: January 8, 2013
    Assignee: Robert Bosch GmbH
    Inventors: Richard Spitz, Alfred Goerlach, Karin Hamsen, Jochen Dietrich
  • Patent number: 8299477
    Abstract: A light emitting device that includes a conductive substrate, an insulating layer on the conductive substrate, a plurality of light emitting device cells on the insulating layer, a connection layer electrically interconnecting the light emitting device cells, a first contact section electrically connecting the conductive substrate with at least one light emitting device cell, and a second contact section on the at least one light emitting device cell.
    Type: Grant
    Filed: October 13, 2008
    Date of Patent: October 30, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventors: Geun Ho Kim, Yong Seon Song, Yu Ho Won
  • Patent number: 8283704
    Abstract: A gas sensor (30) includes two field-effect transistors and gate electrodes on gate insulation films (24) of the two field-effect transistors to detect gas using the gate electrodes. The gas sensor (30) includes a first gate electrode (5), a second gate electrode (6), and voltage applying means. The first gate electrode (5) is provided on one of the field-effect transistors. The second gate electrode (6) is provided on another one of the field-effect transistors. The voltage applying means is for, with the first gate electrode (5) and the second gate electrode (6) coupled to one another by wiring, applying thereto one of a direct-current voltage and an alternating-current voltage having a same potential or a constant voltage difference. The first gate electrode (5) and the second gate electrode (6) are made of different metals. The one field-effect transistor and the other field-effect transistor have approximately the same structures.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: October 9, 2012
    Assignee: National University Corporation Okayama University
    Inventor: Keiji Tsukada
  • Patent number: 8269239
    Abstract: A light emitting diode (LED) chip package including: a package body; an LED chip mounted on the package body and emitting an excited light; a phosphor layer including a phosphor absorbing the excited light and emitting a wavelength conversion light obtained by converting a wavelength of the excited light and a phosphor resin mixed with the phosphor; and a reflector layer including a reflector formed between the LED chip and the phosphor layer, transmitting the excited light to the phosphor layer, and reflecting the wavelength conversion light from the phosphor layer, and a reflector resin mixed with the reflector.
    Type: Grant
    Filed: January 16, 2008
    Date of Patent: September 18, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sergiy Shylo, Mi Jeong Yun
  • Patent number: 8269238
    Abstract: A photonic crystal light emitting device including: a light emitting diode (LED) light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first and second conductive semiconductor layers; and a first photon-recycling light emitting layer formed on one surface of the first conductive semiconductor layer, opposite to the active layer, wherein the first photon-recycling light emitting layer absorbs a primary light emitted from the LED light emitting structure and emits a light having a different wavelength from that of the primary light, and a photonic crystal structure is formed on an entire thickness of the first photon-recycling light emitting layer.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: September 18, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun Jun Kim, Chang Hwan Choi, Won Ha Moon, Jong Ho Lee, Jae Chul Yong, Jin Ha Kim
  • Patent number: 8258558
    Abstract: Provided are image sensors and methods of manufacturing the same. An image sensor includes a metal line and an interlayer insulation layer on a semiconductor substrate including a readout circuit; an image detection unit on the interlayer insulation layer and including stacked first and second doping layers; a pixel separation unit penetrating the image detection unit, separating the image detection unit by pixel; a first metal contact penetrating the image detection unit and the interlayer insulation layer to contact the metal line; a first barrier pattern protecting the first metal contact from contacting the second doping layer, while exposing the first metal contact to the first doping layer; and a second metal contact in a trench above the first metal contact, wherein the second metal contact is electrically connected to the second doping layer while being isolated from the first metal contact by a second barrier pattern.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: September 4, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Tae Gyu Kim
  • Patent number: 8218330
    Abstract: A reworkable passive element embedded printed circuit board (PCB) including a board member, first and second fillings, and a first passive element. The board member has first and second through holes which are spaced apart from each other. The first and second fillings are buried in the first and second through holes, respectively, and formed of a reflowable conductive material. The first passive element includes first and second electrodes. A first insertion groove is formed in a portion of a surface of the board member between the first and second through holes and portions of the first and second fillings. The first passive element is mounted on the first insertion groove. The first electrode includes a bottom surface and a side contacting the first filling and an exposed upper surface. The second electrode comprises a bottom surface and a side contacting the second filling and an exposed upper surface.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: July 10, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyo-jae Bang, Dong-chun Lee, Seong-chan Han, Jun-young Lee, Jung-hyeon Kim
  • Patent number: 8183587
    Abstract: The present invention relates to light emitting diodes, LEDs. In particular the invention relates to a LED comprising a nanowire as an active component. The nanostructured LED according to the embodiments of the invention comprises a substrate and at an upstanding nanowire protruding from the substrate. A pn-junction giving an active region to produce light is present within the structure. The nanowire, or at least a part of the nanowire, forms a wave-guiding section directing at least a portion of the light produced in the active region in a direction given by the nanowire.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: May 22, 2012
    Assignee: QuNano AB
    Inventors: Lars Ivar Samuelson, Bo Pedersen, Bjorn Jonas Ohlsson
  • Patent number: 8169073
    Abstract: External connection terminals 27 which are electrically connected to semiconductor chips 11-1, 11-2, 12-1, 12-2 and also protrude beyond the semiconductor chips 11-1, 11-2, 12-1, 12-2 are disposed on a substrate 13 of the side to which the plural semiconductor chips 11-1, 11-2, 12-1, 12-2 are connected.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: May 1, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Kei Murayama, Mitsutoshi Higashi
  • Patent number: 8093583
    Abstract: A light emitting diode (LED) having a barrier layer with a superlattice structure is disclosed. In an LED having an active region between an GaN-based N-type compound semiconductor layer and a GaN-based P-type compound semiconductor layer, the active region comprises a well layer and a barrier layer with a superlattice structure. As the barrier layer with the superlattice structure is employed, it is possible to reduce occurrence of defects caused by lattice mismatch between the well layer and the barrier layer.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: January 10, 2012
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Sang Joon Lee, Duck Hwan Oh, Kyung Hae Kim, Chang Seok Han