Patents Examined by Ishwarbhai Patel
  • Patent number: 8022314
    Abstract: A printed wiring board including a wiring substrate provided with at least one conductor circuit, a solder resist layer provided on the surface of the wiring substrate, at least one conductor pad formed from a part of the conductor circuit exposed from an opening provided in the solder resist layer, and at least one solder bump for mounting electronic parts on the conductor pad. In the printed wiring board, since the at least one conductor pad is aligned at a pitch of about 200 ?m or less, and a ratio (W/D) of a diameter W of the solder bump to an opening diameter D of the opening formed in the solder resist layer is about 1.05 to about 1.7, connection reliability and insulation reliability can be easily improved.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: September 20, 2011
    Assignee: Ibiden Co., Ltd.
    Inventors: Yoichiro Kawamura, Shigeki Sawa, Katsuhiko Tanno, Hironori Tanaka, Naoaki Fujii
  • Patent number: 8017875
    Abstract: A printed wiring board includes a wiring substrate, one or more conductor circuits provided on the wiring substrate, a solder resist layer provided on a surface of the wiring substrate and having multiple openings, the openings exposing multiple parts of the conductor circuits forming multiple conductor pads for mounting electronic parts, and multiple solder bumps formed on the conductor pads, respectively. The conductor pads are aligned at a pitch of about 200 ?m or less, and a ratio W/D of a diameter W of the solder bumps to an opening diameter D of the openings formed in the solder resist layer is about 1.05 to about 1.7.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: September 13, 2011
    Assignee: Ibiden Co., Ltd.
    Inventors: Yoichiro Kawamura, Shigeki Sawa, Katsuhiko Tanno, Hironori Tanaka, Naoaki Fujii
  • Patent number: 8013255
    Abstract: An exemplary PCB includes a first reference layer, a first signal layer, and a second signal layer in that order. A first differential pair is arranged in the first signal layer in an edge-coupled structure referencing the first reference layer. A second differential pair is arranged in the second signal layer in edge-coupled structure. A first ground part and a second ground part are symmetrically arranged in the second signal layer and at opposite sides of the second differential pair. The first differential pair is arranged above the first ground part such that a projection of the first differential pair onto the second signal layer having an area coincident with the first ground part. The second differential pair references the first and second ground parts.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: September 6, 2011
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Shou-Kuo Hsu, Chun-Jen Chen
  • Patent number: 8003897
    Abstract: A printed wiring board includes a wiring substrate provided with at least one conductor circuit, a solder resist layer formed on the surface of the wiring substrate, covering the at least one conductor circuit, conductor pads formed on a part of the at least one conductor circuit exposed from respective openings provided in the solder resist layer for mounting electronic parts, and solder bumps formed on the respective conductor pads. Connection reliability and insulation reliability are easily improved by making the ratio (H/D) of a height H from solder resist layer surface the solder bump to an opening diameter of the opening about 0.55 to about 1.0 even in narrow pitch structure under the pitch of the opening provided in the solder resist layer of about 200 ?m or less.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: August 23, 2011
    Assignee: Ibiden Co., Ltd.
    Inventors: Yoichiro Kawamura, Shigeki Sawa, Katsuhiko Tanno, Hironori Tanaka, Naoaki Fujii