Patents Examined by Ishwarbhai Patel
  • Patent number: 8461460
    Abstract: A microelectronic interconnect element can include a plurality of first metal lines and a plurality of second metal lines interleaved with the first metal lines. Each of the first and second metal lines has a surface extending within the same reference plane. The first metal lines have surfaces above the reference plane and remote therefrom and the second metal lines have surfaces below the reference plane and remote therefrom. A dielectric layer can separate a metal line of the first metal lines from an adjacent metal line of the second metal lines.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: June 11, 2013
    Assignee: Invensas Corporation
    Inventors: Chang Myung Ryu, Kimitaka Endo, Belgacem Haba, Yoichi Kubota
  • Patent number: 8461459
    Abstract: A flex-rigid wiring board includes an insulative substrate, a flexible connected body positioned beside the insulative substrate and including multiple flexible wiring boards, and an insulation layer positioned over the insulative substrate and the flexible connected body and having a portion exposing a portion of the flexible connected body. The flexible wiring boards include a double-sided flexible wiring board having a conductive layer on one surface of the double-sided flexible wiring board and a conductive layer on the opposite surface of the double-sided flexible wiring board. The flexible connected body has a conductor on one side of the flexible connected body, a conductor on the opposite side of the flexible connected body, and a through-hole conductor electrically connecting the conductors of the flexible connected body. The through-hole conductor is penetrating from one side through the opposite side of the flexible wiring boards.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: June 11, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Nobuyuki Naganuma, Michimasa Takahashi, Masakazu Aoyama
  • Patent number: 8451623
    Abstract: A mounting apparatus includes a chassis, an expansion piece secured to a first end of an expansion card, a carrier and a supporting device configured to support a second end of the expansion card. The chassis includes a bottom plate, and the carrier is mounted on the bottom plate. The supporting device includes a first supporting member secured to the carrier, and a second supporting member secured to the first supporting member. The first supporting member and the second supporting member sandwich the expansion card when the second supporting member is attached on the first supporting member.
    Type: Grant
    Filed: November 3, 2010
    Date of Patent: May 28, 2013
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Po-Wen Chiu, Zhan-Yang Li
  • Patent number: 8426739
    Abstract: Disclosed is a printed circuit board including an insulation member on which a first region and a second region are defined, a circuit pattern formed on the first region, and a support member formed on the second region.
    Type: Grant
    Filed: December 1, 2008
    Date of Patent: April 23, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Kwang Tae Lee, Sung Gue Lee, Jae Bong Choi
  • Patent number: 8426743
    Abstract: Electronic devices include a substrate with first and second pairs of conductive traces extending in or on the substrate. A first conductive interconnecting member extends through a hole in the substrate and communicates electrically with a first trace of each of the first and second pairs, while a second conductive interconnecting member extends through the hole and communicates electrically with the second trace of each of the first and second pairs. The first and second interconnecting members are separated from one another by a distance substantially equal to a distance separating the conductive traces in each pair. Electronic device assemblies include a transmitting device configured to transmit a differential signal through a conductive structure to a receiving device. The conductive structure includes first and second pair of conductive traces with first and second interconnecting members providing electrical communication therebetween.
    Type: Grant
    Filed: July 19, 2010
    Date of Patent: April 23, 2013
    Assignee: Micron Technology, Inc.
    Inventors: David J. Corisis, Choon Kuan Lee, Chin Hui Chong
  • Patent number: 8420950
    Abstract: A method of manufacture of a circuit system includes: providing a carrier base; forming a cavity in the carrier base; forming a bridge lead over the cavity, the bridge lead exposing the cavity; and mounting a device having an anchor interconnect, the anchor interconnect is in the cavity and conformal to the bridge lead over the cavity.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: April 16, 2013
    Assignee: STATS ChipPAC Ltd.
    Inventors: Seng Guan Chow, Heap Hoe Kuan, Reza Argenty Pagaila
  • Patent number: 8420946
    Abstract: An exemplary printed circuit board includes a substrate, a differential transmission line, and at least two weld pad pairs. The differential transmission line and the at least two weld pad pairs are disposed on the substrate. The differential transmission line includes two parallel signal conductors disposed on the substrate. Each of the two signal conductors is electrically connected to an edge of one of the weld pads of a respective pair of the at least two weld pad pairs. Thereby, the two signal conductors of the differential transmission line can extend in the same distance anywhere, particularly in the position where the two signal conductors pass the two weld pad pairs. As a result, the coupling performance and the capability of the differential transmission line to resist electromagnetic interference are both enhanced.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: April 16, 2013
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventor: Fa-Ping Fan
  • Patent number: 8420952
    Abstract: A circuit board includes a board, a first conductive land over the board, a second conductive land over the board, a resist extending over the board, and a conductive material within the opening. The second conductive land is distanced from the first conductive land. The resist has an opening that extends over at least a portion of the first conductive land, at least a portion of the second conductive land, and at least a portion of an intervening region of the board. The intervening region extends between the first and second conductive lands. The conductive material extends over the at least a portion of the intervening region, the at least a portion of the first conductive land, and the at least a portion of the second conductive land.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: April 16, 2013
    Assignee: Kyocera Corporation
    Inventor: Tomohiko Nawata
  • Patent number: 8404980
    Abstract: A relay board provided in a semiconductor device includes a first terminal, and a plurality of second terminals connecting to the first terminal by a wiring. The wiring connecting to the first terminal is split on the way so that the wiring connects to each of the second terminals.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: March 26, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Takao Nishimura, Kouichi Nakamura
  • Patent number: 8399778
    Abstract: A circuit board structure and a fabrication method thereof are disclosed. The circuit board structure includes a carrying board having a first and an opposite second surface and having at least one through cavity formed therein; a semiconductor chip disposed in the through cavity of the carrying board; an adhesive material filling the gap between the through cavity of the carrying board and the semiconductor chip to fix the semiconductor chip in the through cavity; and a reinforcing layer disposed on the second surface of the carrying board and the inactive surface of the semiconductor chip, thereby increasing the strength of the carrying board as well as the reliability of the circuit board.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: March 19, 2013
    Assignee: Unimicron Technology Corp.
    Inventor: Shih-Ping Hsu
  • Patent number: 8395054
    Abstract: To provide a substrate for mounting a semiconductor element, in which fine-pitch wiring layers are formed to allow a semiconductor element to be mounted, while heat generated in the semiconductor element will not result in a decrease in reliability. Semiconductor-element mounting substrate sandwiches low-thermal-expansion substrate with upper interlayer resin layer and lower interlayer resin layer, and conductive circuit of organic substrate and first conductive circuit of low-thermal-expansion substrate are connected by via conductor formed in interlayer resin layer. Therefore, low-thermal-expansion substrate for mounting semiconductor element may be connected to organic substrate that is connected to outside substrates, without arranging an organic substrate and resin layers on the lower surface of low-thermal-expansion substrate, where impact from the thermal history of semiconductor element is notable.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: March 12, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Takashi Kariya, Daiki Komatsu
  • Patent number: 8367936
    Abstract: The disclosure relates to a flexible printed circuit board and a method for manufacturing a monitor. The flexible printed circuit board is disposed on a portion of an upper surface of a substrate and is folded to a sidewall and a lower surface of the substrate. The flexible printed circuit board includes a flexible substrate and an insulating layer surrounding the flexible substrate. The insulating layer has an opening at least exposing a portion of the flexible substrate situated relative to the sidewall of the substrate.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: February 5, 2013
    Assignees: Innocom Technology (Shenzhen) Co., Ltd., Chimei Innolux Corporation
    Inventors: Xin Su, Sai-Xin Guan, Yin Zhang
  • Patent number: 8357861
    Abstract: A circuit board, a chip package structure and a fabrication method of the circuit board are provided. By applying the fabrication method, a plurality of conductive channels can be formed in a single through hole of the circuit substrate. Unlike the conductive channels respectively formed in the through holes according to the related art, the conductive channels of the proposed circuit board can be formed in a single through hole. As such, it is conducive to the expansion of available layout area of the circuit board, the increase in layout flexibility, and the improvement of layout density of the circuit board.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: January 22, 2013
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Shih-Fu Huang, Yuan-Chang Su, Chia-Hsiung Hsieh
  • Patent number: 8354591
    Abstract: Provided is a superconducting cable capable of maintaining a predetermined thermal insulation property without having a vacuum thermal insulation structure. The superconducting cable of the present invention includes: a cable unit 100, in which a core having a superconductor layer and an electrical insulation layer is housed in a core-housing pipe; a thermal insulation member 200 which is provided outside the cable unit and maintained in a non-vacuum state; and a sealing member for preventing the permeation of moisture into the thermal insulation member. By equipping the outside of the cable unit with the thermal insulation member 200 which is maintained in a non-vacuum state, it is made possible to maintain the predetermined thermal insulation property without having a vacuum thermal insulation structure.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: January 15, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Masayuki Hirose, Ryosuke Hata
  • Patent number: 8354595
    Abstract: A method for interconnecting a first flex printed circuit board (PCB) with a second flex PCB. The method includes: providing the first flex PCB with holes at contact locations to be electrically coupled to the second flex PCB; providing the second flex PCB with electrical pads corresponding to the holes at the contact locations; applying a non-conductive material between the first PCB and the and second PCB with clearances for each of the electrical pads; aligning the first PCB with the second PCB so that the holes in the first PCB are in line with the corresponding electrical pads on the second PCB; bonding a portion of flat areas on the first and second PCBs together; dispensing a conductive adhesive into the holes to fill the space created by the holes, corresponding clearances of the non-conductive material, and the corresponding electrical pads; and curing the conductive adhesive.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: January 15, 2013
    Assignee: Raytheon Company
    Inventors: Kevin C. Rolston, Alberto F. Viscarra, Derek Pruden, Cindy W. Ma
  • Patent number: 8354600
    Abstract: A printed wiring board includes a land formed on a surface layer, at least one power supply pattern formed on a layer except the surface layer on which the land is formed, a plurality of vias which includes a first via electrically connected to the power supply pattern and a second via electrically connected to the power supply pattern and the first via and the second via are electrically connected to the land.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: January 15, 2013
    Assignee: Fujitsu Limited
    Inventor: Tetsuro Yamada
  • Patent number: 8344259
    Abstract: A connection terminal has, on an upper surface of a first dielectric layer, a first line conductor and a first grounding line conductor provided adjacent to both sides of the first line conductor, and has, on an upper surface of a third dielectric layer, a third line conductor and a third grounding line conductor provided adjacent to both sides of the third line conductor. These conductors are connected to a second line conductor and a second grounding line conductor provided adjacent to both sides of the second line conductor, respectively, the second line conductor and the second grounding line conductor being provided on an upper surface of a second dielectric layer. It is possible to obtain the connection terminal having a small size and capable of complying with a high-frequency signal.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: January 1, 2013
    Assignee: Kyocera Corporation
    Inventor: Mahiro Tsujino
  • Patent number: 8338717
    Abstract: A circuit substrate includes a base and conductive layers disposed on lower and upper surfaces of the substrate. The base includes resin layers and the conductive layers overlapping with each other in a plan view. The resin layers include first resin layers and a second resin layer interposed between the first resin layers. The first resin layer has a filler and the second resin layer has no filler or a filler whose amount is 1 volume % or less and smaller than an amount of the filler in the first resin layer.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: December 25, 2012
    Assignee: Kyocera Corporation
    Inventor: Tadashi Nagasawa
  • Patent number: 8334463
    Abstract: A wiring board has a first rigid wiring board having a substrate with a penetrating hole, a first insulation layer formed on the substrate to cover at least one opening of the penetrating hole, and a first wiring layer formed on the first insulation layer, a second rigid wiring board having a second wiring layer on a main surface and being accommodated in the penetrating hole, a first connection conductor which connects the first wiring layer and the second wiring layer, and a first interlayer insulation layer formed on the first wiring layer.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: December 18, 2012
    Assignee: Ibiden Co., Ltd.
    Inventor: Nobuyuki Naganuma
  • Patent number: 8330054
    Abstract: A plurality of wiring traces are formed on a base insulating layer, and a metal layer is formed on the opposite surface of the base insulating layer. Two adjacent wiring traces constitute a transmission line pair. The width of the wiring trace is set to not more than 250 ?m, and the distance between the adjacent wiring traces is set to not less than 8 ?m. The thickness of the base insulating layer is selected to cause differential impedance of the transmission line pair to be not less than 10 ? and not more than 50 ?.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: December 11, 2012
    Assignee: Nitto Denko Corporation
    Inventors: Mitsuru Honjo, Daisuke Yamauchi, Kei Nakamura