Patents Examined by Ishwarbhai Patel
  • Patent number: 8222531
    Abstract: A board interconnection structure having a first printed wiring board in which a first conductive circuit is arranged on a first insulating layer, the first conductive circuit having, on an end portion thereof, a first connection terminal in which an upper surface width is narrower than a bottom surface width; a second printed wiring board in which a second conductive layer having a second connection terminal is arranged on a second insulating layer; and a connection layer that forms fillets along longitudinal side surfaces of the first connection terminal, and interconnects the first connection terminal and the second connection terminal. The first connection terminal may have a projection portion.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: July 17, 2012
    Assignee: Fujikura Ltd.
    Inventors: Tomofumi Kitada, Hiroki Maruo, Ryo Takami
  • Patent number: 8222528
    Abstract: The invention provides a circuit board structure for electrical testing and a fabrication method thereof.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: July 17, 2012
    Assignee: Unimicron Technology Corp.
    Inventor: Pao-Hung Chou
  • Patent number: 8217278
    Abstract: An embedded wiring board includes an upper wiring layer, a lower wiring layer, an insulation layer, a first conductive pillar and a second conductive pillar. The upper wiring layer contains an upper pad, the lower wiring layer contains a lower pad, and the insulation layer contains an upper surface and a lower surface opposite to the upper surface. The upper pad is embedded in the upper surface and the lower pad is embedded in the lower surface. The first conductive pillar is located in the insulation layer and includes an end surface which is exposed by the upper surface. A height of the first conductive pillar relative to the upper surface is larger than a depth of the upper pad relative to the upper surface. In addition, the second conductive pillar is located in the insulation layer and is connected between the first conductive pillar and the lower pad.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: July 10, 2012
    Assignee: Unimicron Technology Corp.
    Inventor: Cheng-Po Yu
  • Patent number: 8217270
    Abstract: A multilayered circuit board which is provided with a low-permittivity interlayer insulating film, and which can significantly improve the performance such as signal transmission characteristics of the multilayered circuit board such as a package and a printed board, because the surface in contact with the interlayer insulating film of the circuit board has no unevenness to eliminate the lowering of production yield and the deterioration of high-frequency signal transmission characteristics; and electronic equipment using the circuit board.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: July 10, 2012
    Assignee: Tohoku University
    Inventors: Tadahiro Ohmi, Akinobu Teramoto, Akihiro Morimoto
  • Patent number: 8212154
    Abstract: A printed wiring board suppresses characteristic impedance mismatch that occurs when the printed wiring board is equipped with a through-type coaxial connector, and includes ground layers stacked in a plurality of layers via insulating layers; a through-hole; a clearance serving as an anti-pad provided in an area between the through-hole and the ground layers; and signal wiring extending from the through-hole to between prescribed ones of the ground layers through the clearance. The prescribed ones of the ground layers have a wiring-impedance adjustment area for adjusting the impedance of the signal wiring, the wiring-impedance adjustment area being arranged so as to overlap a portion of the signal wiring in the clearance.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: July 3, 2012
    Assignee: NEC Corporation
    Inventor: Kazuhiro Kashiwakura
  • Patent number: 8207451
    Abstract: A ground-plane slotted type signal transmission circuit board is proposed, which is designed for use with a high-speed digital signal processing system for providing a low-loss signal transmission function. The proposed circuit board structure is characterized by the formation of a slotted structure (i.e., elongated cutaway portion) in the ground plane at the beneath of each signal line. Since the slotted structure is a void portion, the electric field of a gigahertz signal being transmitting through the overlaying signal line would be unable to induce electric currents in the void portion of the ground plane. This feature allows the prevention of a leakage current that would otherwise flow from the signal line to the ground plane, and therefore can help prevent unnecessary power loss of the transmitted signal.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: June 26, 2012
    Assignee: National Taiwan University
    Inventors: Hsin-Chia Lu, Tsung-Yi Chou
  • Patent number: 8203080
    Abstract: Integrated circuits and processes for manufacturing integrated circuits are described that use printed wiring board substrates having a core layer that is part of the circuit of the printed wiring board. In a number of embodiments, the core layer is constructed from a carbon composite. In several embodiments, techniques are described for increasing the integrity of core layers in designs calling for high density clearance hole drilling. One embodiment of the invention includes a core layer that includes electrically conductive material and at least one build-up wiring portion formed on an outer surface of the core layer. In addition, the build-up portion comprises at least one micro wiring layer including a circuit that is electrically connected to the electrically conductive material in the core layer via a plated through hole.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: June 19, 2012
    Assignee: Stablcor Technology, Inc.
    Inventor: Kalu K. Vasoya
  • Patent number: 8198544
    Abstract: A printed wiring board including resin insulation layers, and conductive circuits formed between the resin insulation layers such that spaces between the conductive circuits are filled with a resin material of the resin insulation layers. The conductor circuits include a first conductive circuit and a second conductive circuit positioned adjacent to the first conductive circuit, each of the first and second conductive circuits has a trapezoidal cross section, and the first and the second conductive circuits satisfy a formula, 0.10T?|W1?W2|?0.73T where W1 represents a width of a space between upper surfaces of the first and second conductive circuits, W2 represents a width of a space between lower surfaces of the first and second conductive circuits, and T represents a thickness of each of the first and second conductive circuit.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: June 12, 2012
    Assignee: Ibiden Co., Ltd.
    Inventors: Toru Nakai, Masanori Tamaki
  • Patent number: 8198545
    Abstract: There is provided a printed circuit board (PCB) comprising a first ground layer extended in one direction; a first dielectric layer laminated on the first ground layer and extended in the same direction of the first ground layer; a signal transmission line laminated on the first dielectric layer and extended in the same direction of the first dielectric layer; a first bonding sheet disposed above the first dielectric layer; a second bonding sheet disposed above the first dielectric layer; a second dielectric layer disposed above the signal transmission line, the first bonding sheet, and the second bonding sheet; and a second ground layer laminated on the second dielectric layer.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: June 12, 2012
    Assignee: Gigalane Co. Ltd.
    Inventors: Yong Goo Lee, Kyoung Il Kang
  • Patent number: 8198547
    Abstract: A Z-directed signal pass-through component for insertion into a printed circuit board while allowing electrical connection from external surface conductors to internal conductive planes or between internal conductive planes. The Z-directed pass-through component is mounted within the thickness of the PCB allowing other components to be mounted over it. The body may contain one or more conductors and may include one or more surface channels or wells extending along at least a portion of the length of the body.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: June 12, 2012
    Assignee: Lexmark International, Inc.
    Inventors: Keith Bryan Hardin, John Thomas Fessler, Paul Kevin Hall, Brian Lee Nally, Robert Aaron Oglesbee
  • Patent number: 8193454
    Abstract: The present invention relates to a circuit substrate having a first conductive layer. The first conductive layer includes at least one power/ground plane. The power/ground plane includes at least one plane edge and plurality of grid lines. Each grid line has a width. The grid lines intersect each other to define a plurality of first grid holes, wherein the distance between the first grid hole that is closest to the plane edge and the plane edge is 1.5 times the width. Thus, the influence on the resistance of power signal and ground signal caused by the first grid holes is reduced, power integrity is improved, and heat generation is reduced.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: June 5, 2012
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Hung-Hsiang Cheng, Chih-Yi Huang
  • Patent number: 8188376
    Abstract: A process for providing a power module substrate. A brazing sheet is temporarily fixed on a surface of a ceramic substrate by surface tension of a volatile organic medium, and a conductive pattern member punched from a base material is temporarily fixed on a surface of the brazing sheet by surface tension. These are heated so as to volatilize the volatile organic medium, and a pressure is applied to the conductive pattern member in its thickness direction. The brazing sheet is then melted to join the conductive pattern member with the surface of the ceramics substrate.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: May 29, 2012
    Assignee: Mitsubishi Materials Corporation
    Inventors: Takeshi Negishi, Toshiyuki Nagase
  • Patent number: 8188378
    Abstract: An interposer having a support substrate, a first insulation layer made of an inorganic material and formed over the support substrate, and a second insulation layer formed over the first insulation layer. The first insulation layer has a first land, a second land and a first wiring electrically connecting the first land and the second land. The second insulation layer has a first pad positioned to load a first electronic component, a second pad positioned to load a second electronic component, a second wiring electrically connected to the second pad, a first via conductor electrically connecting the first land and the first pad, and a second via conductor electrically connecting the second land and the second wiring. The first wiring and second wiring electrically connect the first pad and the second pad, and the second wiring has a lower wiring resistance per unit length than the first wiring.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: May 29, 2012
    Assignee: Ibiden Co., Ltd.
    Inventors: Hajime Sakamoto, Shuichi Kawano, Daiki Komatsu, Toshiki Furutani, Hiroshi Segawa
  • Patent number: 8164006
    Abstract: According to an embodiment of the present invention, an electromagnetic bandgap structure can include: at least three conductive plates; a first stitching via, configured to electrically connect any one of the conductive plates to another conductive plate; and a second stitching via, configured to electrically connect the one conductive plate to yet another conductive plate. In the electromagnetic bandgap structure of the present invention, the first stitching via can electrically connect the one conductive plate to another conductive plate by allowing a part of the first stitching via to be connected through a planar surface above the one conductive plate, and the second stitching via can electrically connect the one conductive plate to yet another conductive plate by allowing a part of the second stitching via to be connected through a planar surface below the one conductive plate.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: April 24, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Han Kim, Mi-Ja Han, Hyo-Jic Jung
  • Patent number: 8164000
    Abstract: A flexible printed circuit board base film for flexible printed circuit boards includes a sheet of flexible polymer matrix and a number of carbon nanotube bundles embedded in the polymer matrix. Each of the nanotubes bundles are spaced apart from each other. The flexible polymer matrix includes a first surface and a second surface. Due to the high thermal conductivity of carbon nanotubes, heat can be efficiently conducted from the first surface to the second surface of the flexible printed circuit board base film. The present invention also provides a flexible laminate made from the flexible printed circuit board base film and a flexible printed circuit boards made from the flexible laminate.
    Type: Grant
    Filed: June 9, 2008
    Date of Patent: April 24, 2012
    Assignee: Zhen Ding Technology Co., Ltd.
    Inventors: Tso-Hung Yeh, Hung-Yi Chang, Shing-Tza Liou
  • Patent number: 8158890
    Abstract: Provided is an interleaved or wavy spatial arrangement of the micro-vias providing the electrical pathways for the power and ground leads are described. The spatial arrangement increases the coupling pairs between power and ground vias or leads. This spatial arrangement is maintained even as the micro-vias transition across a plane from a direction of travel. Thus, the charge from the decoupling capacitor is able to more efficiently be delivered as the inductances are minimized through this design.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: April 17, 2012
    Assignee: Altera Corporation
    Inventor: Li-Tien Chang
  • Patent number: 8158888
    Abstract: A circuit substrate suitable for being connected to at least one solder ball is provided. The circuit substrate includes a substrate, at least one bonding pad, and a solder mask. The substrate has a surface. The bonding pad is disposed on the surface of the substrate for being connected to the solder ball. The solder mask covers the surface of the substrate and has an opening for exposing a portion of the bonding pad. The opening has a first end and a second end. As compared with the second end, the first end is much farther from the bonding pad, and a diameter of the first end is larger than that of the second end.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: April 17, 2012
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi-Chih Shen, Jen-Chuan Chen, Wei-Chung Wang
  • Patent number: 8153902
    Abstract: A wiring board includes a wiring forming region in which a plurality of wiring layers are stacked while sandwiching insulating layers, an outer periphery region which is arranged around the wiring forming region and in which a reinforcing pattern is formed in the same layer as each of the wiring layers. An area ratio of the reinforcing pattern to the outer periphery region and an area ratio of the wiring layer to the wiring forming region are substantially the same in each of the layers, and the reinforcing patterns exist without a gap in the outer periphery region when the wiring board is viewed in planar perspective.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: April 10, 2012
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Junichi Nakamura, Kotaro Kodani, Michiro Ogawa
  • Patent number: 8148647
    Abstract: An object of the invention is to provide a printed circuit board that has an excellent heat dissipation performance and excellent reliability, and its manufacturing method. The printed circuit board includes: prepregs (2a) and (2b) being cured after each covering the surfaces of a metal plate (1) provided with first throughholes (1a) therein and the inner walls of the first throughholes (1a); prepregs (4a) and (4b) being cured after glass clothes (3a) and (3b) are sandwiched between the prepregs (2a) and (2b), and the prepregs (4a) and (4b), respectively; and second throughholes (8) that connect wiring layers (7a) and (7c), and (7b) and (7d) provided on both surfaces of prepregs (6a) and (6b), respectively. The prepregs (2a) and (2b) and the prepregs (4a) and (4b) are characterized in that they contain inorganic filler. Furthermore, the prepregs (2a) and (2b) and the prepregs (4a) and (4b) may contain elastomer.
    Type: Grant
    Filed: August 1, 2007
    Date of Patent: April 3, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Souhei Samejima, Sadao Sato, Hiroyuki Osuga, Shigeru Utsumi, Teruhiko Kumada
  • Patent number: RE43330
    Abstract: Stacked receptacles in a connector that each provide side-by-side differential signal contacts, are attached to a circuit board without additional width to accommodate multiple layers of differential signals by using connector wafer inserts that rotate the side-by-side positioned differential signal contacts to front-to-back contacts, the circuit board including a substrate having a plurality of openings to make electrical contact with conductive terminal tail portion inserted therein, the openings being divided into first and second groups of openings, the first group of openings receiving differential signal terminal tails therein and the second group of openings receiving ground terminal tail therein, when a connector is mounted to said circuit board.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: May 1, 2012
    Assignee: Molex Incorporated
    Inventors: Hazelton P. Avery, Patrick R. Casher, Richard A. Nelson, Kent E. Regnier