Patents Examined by J. Jones
  • Patent number: 11943630
    Abstract: Methods, systems, and devices for wireless communications are described. Some wireless communications systems may support dynamic spectrum sharing for multiple radio protocols, such as New Radio and Long Term Evolution. Systems may implement a number of techniques to improve spectrum use by user equipment in dynamically shared frequency spectrums. In some aspects, the network may assign a user equipment to a specific bandwidth part based on a rate matching capability of the user equipment. Additionally or alternatively, the network may activate a specific bandwidth part based on the frequency of handover for a user equipment. In some aspects, the network may support dual registration (e.g., registration in a same frequency spectrum using different radio protocols) for a user equipment operating on a dynamically shared spectrum. To reduce the control overhead for such a user equipment, the network may use a single control channel to schedule data for multiple radio protocols.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: March 26, 2024
    Assignee: QUALCOMM Incorporated
    Inventor: Akash Kumar
  • Patent number: 6121160
    Abstract: A manufacturing method for a semiconductor device, wherein a polyimide-based resin layer is covered with a P-CVD oxide silicon film or the like before it is subjected to degassing process in order to prevent blisters or cracks of a cover film of a semiconductor device which has the polyimide-based resin layer as an interlayer insulating film. This makes it possible to take the semiconductor device out in open air after the degassing process and to prevent the dispersion of reaction products resulting from amidation during the degassing process.
    Type: Grant
    Filed: February 6, 1998
    Date of Patent: September 19, 2000
    Assignee: NEC Corporation
    Inventors: Kinichi Igarashi, Hideaki Sato
  • Patent number: 6107107
    Abstract: Various methods are described for analyzing an electronic circuit formed upon a frontside surface of a semiconductor substrate having opposed frontside and backside surfaces. Each method includes forming a layer of an antireflective coating material upon the backside surface of the substrate prior to detecting electromagnetic radiation emanating from the backside surface. The layer of an antireflective coating material reduces reflections which contribute to background noise levels. As a result of reduced background noise levels, the detection capabilities of the methods and the resolutions of any scanned images produced using the methods are improved. A first method includes forming a layer of an antireflective coating material upon the backside surface of the substrate, directing a beam of electromagnetic radiation toward the backside surface of the substrate, and detecting an electrical response from the electronic circuit.
    Type: Grant
    Filed: March 31, 1998
    Date of Patent: August 22, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Victoria J. Bruce, Gregory A. Dabney
  • Patent number: 6107215
    Abstract: A hydrogen plasma downstream treatment equipment comprises a first gas supply source for supplying a hydrogen gas, a second gas supply source for supplying a nitrogen fluoride gas, and a tube-like chamber used for surface treatment of a semiconductor layer by use of the hydrogen gas and the nitrogen fluoride gas. The chamber includes a plasma generator for activating the hydrogen gas and the nitrogen fluoride gas by introducing the nitrogen fluoride gas in which a flow rate ratio of the hydrogen gas and the nitrogen fluoride gas is in excess of 4, a processor placed in a downstream of the plasma generator to place the semiconductor layer therein, and gas flow controlling means for controlling the first gas supply source and the second gas supply source so as to set a flow rate of the nitrogen fluoride gas four times a flow rate of the hydrogen gas.
    Type: Grant
    Filed: March 13, 1998
    Date of Patent: August 22, 2000
    Assignee: Fujitsu Limited
    Inventors: Shuzo Fujimura, Hiroki Ogawa, Jun Kikuchi
  • Patent number: 6107703
    Abstract: A linear motor mechanism includes a stator element and a movable element being movable relative to the stator element in a predetermined direction through an electromagnetic drive force, wherein the stator element includes a yoke and coils disposed along a predetermined direction while the movable element includes a magnet with plural magnetic poles but with no yoke. Plural stator elements are disposed opposed to each other with a magnet of the movable element disposed therebetween.
    Type: Grant
    Filed: September 22, 1998
    Date of Patent: August 22, 2000
    Assignee: Canon Kabushiki Kaisha
    Inventor: Nobushige Korenaga
  • Patent number: 6080614
    Abstract: A method of fabricating a MOS-gated semiconductor device in which arsenic dopant is implanted through a mask to form a first layer, boron dopant is implanted through the mask to form a second layer deeper than the first layer, and in which a single diffusion step diffuses the implanted arsenic and the implanted boron at the same time to form a P+ body region with an N+ source region therein and a P type channel region.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: June 27, 2000
    Inventors: John Manning Sauidge Neilson, Linda Susan Brush, Frank Stensney, John Lawrence Benjamin, Anup Bhalla, Christopher Lawrence Rexer, Richard Douglas Stokes, Christopher Boguslow Kocon, Louise E. Skurkey, Christopher Michael Scarba
  • Patent number: 6071793
    Abstract: A novel design of an oxidation mask for improved control of birds beak and more specifically for tailoring and smoothing the field oxide isolation profile in the vicinity of the birds beak. The mask design is particularly advantageous for narrow field isolation spacings found in sub half-micron integrated circuit technology. The mask uses a thin tapered silicon nitride foot along its lower edge to allow nominal expansion of the oxide during the early stages of oxidation, thereby permitting in-situ stress relief as well as a smoothing of the oxide profile. The taper of the foot provides a gradual increase in mask stiffness as oxidation proceeds under the mask edge, allowing greatest flexibility during the early rapid growth period followed by increasing stiffness during the later stages when the growth rate has slowed, thereby inhibiting the penetration of birds beak. Shear stresses responsible for dislocation generation are reduced by as much as fifty fold.
    Type: Grant
    Filed: February 2, 1998
    Date of Patent: June 6, 2000
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Igor V. Peidous, Quek Kiok Boone Elgin, Konstantin V. Loiko, Tan Poh Suan, Vijai Kumar N. Chhagan
  • Patent number: 6060385
    Abstract: The present invention comprises a metallization method that forms a three-level interconnect in an electrical circuit. The method comprises providing a substrate assembly and depositing thereon a first dielectric layer thereover. A second dielectric layer is then deposited over the first dielectric layer. The second dielectric layer is patterned and anisotropically etched to form contact corridors. The second dielectric layer is again patterned and etched to form trenches, some of which are immediately above the contact corridors. An electrically conductive material is deposited to fill the contact corridors and trenches, and to leave a portion of the electrically conductive material above the second dielectric layer and directly above both the contact corridors and the trenches. The deposition forms a unitary three-level interconnect having a contiguous trench below a contact corridor below a metal line, where the metal line is above the second dielectric layer.
    Type: Grant
    Filed: February 14, 1997
    Date of Patent: May 9, 2000
    Assignee: Micro Technology, Inc.
    Inventor: John H. Givens
  • Patent number: 6060390
    Abstract: An interlayer insulating film made of insulating material is deposited on a substrate having a conductive region at least partially on the surface area thereof. A connection hole is formed through the interlayer insulating film, to expose the conductive region. The connection hole is filled with a plug made of conductive material. An underlying layer made of Ti is deposited over the whole surface of the substrate including the surface of the plug. A wiring layer made of Al alloy is deposited on the underlying layer, without exposing the substrate to the external atmosphere after the deposition of the Ti layer. The wiring layer is reflowed by heating the substrate. A method is provided which is capable of connecting an upper wiring layer to a lower conductive region without lowering resistance to electromigration and lowering step coverage.
    Type: Grant
    Filed: May 6, 1997
    Date of Patent: May 9, 2000
    Assignee: Yamaha Corporation
    Inventors: Masaru Naito, Takahisa Yamaha
  • Patent number: 6033961
    Abstract: Two steps of planarizing are performed during isolation trench fabrication resulting in a more uniform planarization of an integrated circuit substrate. A protective layer deposition and a planarizing step are performed prior to a final planarizing step. Applying protective material fills in a portion of recesses in a dielectric layer overlying isolation trench areas. A first global planarization process eliminates narrower recesses and shallows out deeper recesses without causing dishing in the dielectric material. Much of the protective material is removed by the first global planarization process. The remaining protective material is stripped. A final global planarization process then is performed which removes dielectric material outside of the trench areas. A well-defined border of the trenches results.
    Type: Grant
    Filed: April 30, 1998
    Date of Patent: March 7, 2000
    Assignee: Hewlett-Packard Company
    Inventors: Jim-Jun Xu, Homayoon Haddad
  • Patent number: 5607776
    Abstract: A novel method of in-situ cleaning a Ti target in a Ti+TiN anti-reflective coating process when such Ti and TiN deposition process are conducted in the same process chamber by the addition of a simple process step and without the use of a shutter.
    Type: Grant
    Filed: March 13, 1995
    Date of Patent: March 4, 1997
    Assignee: Applied Materials, Inc.
    Inventors: Mark A. Mueller, Xin Guo, John C. Egermeier
  • Patent number: 5595813
    Abstract: A metal-oxide layer exhibiting a photocatalytic activity function is formed on the surface of an inorganic architectural material, such as external wall material, roofing material, internal wall material, flooring material, and ceiling material, including glass, tile, concrete, stone, metal, and the like, so as to provide the property of deodorizing a space coming in contact with the architectural material, and antimold, antisoiling properties, and ultraviolet-ray absorbency of the surface of the architectural material, as well as the long-term maintenance of these properties. Preferably, the metal-oxide layer is formed by fixing a metal-oxide thin film on the surface of the architectural material.
    Type: Grant
    Filed: September 15, 1993
    Date of Patent: January 21, 1997
    Assignee: Takenaka Corporation
    Inventors: Takatoshi Ogawa, Yasuhiko Yoshioka, Nobuo Tsubouchi, Toshio Saito, Tamotsu Hasegawa, Akira Fujishima, Kazuhito Hashimoto
  • Patent number: 5589284
    Abstract: A preferred embodiment of this invention comprises a perovskite-seed layer (e.g. calcium ruthenate 40) between a conductive oxide layer (e.g. ruthenium oxide 36) and a perovskite dielectric material (e.g. barium strontium titanate 42), wherein the perovskite-seed layer and the conductive oxide layer each comprise the same metal. The metal should be conductive in its metallic state and should remain conductive when partially or fully oxidized. Generally, the perovskite-seed layer has a perovskite or perovskite-like crystal structure and lattice parameters which are similar to the perovskite dielectric layer formed thereon. At a given deposition temperature, the crystal quality and other properties of the perovskite dielectric will generally be enhanced by depositing it on a surface having a similar crystal structure. Undesirable crystal structure formation will generally be minimized and lower processing temperatures may be used to deposit the perovskite dielectric layer.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: December 31, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Scott R. Summerfelt, Howard R. Beratan
  • Patent number: 5580661
    Abstract: Fireproofing glasses containing gels free from organic gel formers are characterized in that they have been prepared with gel formers which containa) acidic aluminium phosphates andb) reaction products of boric acid with alkanolamines,a) and b) being present in a weight ratio of 100:55 to 100:0.5, calculated as solids.
    Type: Grant
    Filed: October 26, 1993
    Date of Patent: December 3, 1996
    Assignees: Schott Glaswerke, Bayer Aktiengesellschaft
    Inventors: Wulf von Bonin, Roland Leroux, Thomas M. Karschti, Markus Steigenberger
  • Patent number: 5580658
    Abstract: A function ally gradient composite material containing copper and carbon as main components and having a predetermined shape, in which the composition ratio of the copper to the carbon in the material continuously varies in at least one predetermined direction. The material is manufactured, for example, by impregnating carbon felt with a resin and thermo-compressively molding the impregnated felt (step S101), carbonizing the resin by baking (step S102) to provide a preformed carbon material (step S104). Pyrolytic carbon is thereafter deposited in the preformed carbon material by the CVI method (step S105) to provide a carbon material having the bulk density varying in a predetermined direction (step S107). After the wettability of the carbon material against copper is improved by siliconization (step S108), pores of the carbon material are impregnated with copper (step S109) to obtain a functionally gradient composite material of copper and carbon.
    Type: Grant
    Filed: July 12, 1994
    Date of Patent: December 3, 1996
    Assignees: Doryokuro Kakunenryo Kaihatsu Jigyodan, Toyo Tanso Co., Ltd.
    Inventors: Tadashi Maruyama, Katuhide Nagaoka, Masaki Okada
  • Patent number: 5578377
    Abstract: A coating solution for forming a colored thin film, which contains a metal oxide containing nitrogen.
    Type: Grant
    Filed: April 21, 1994
    Date of Patent: November 26, 1996
    Assignee: Asahi Glass Company Ltd.
    Inventors: Takeshi Morimoto, Kazuya Hiratsuka, Yasuhiro Sanada, Keiko Ohashi, Keisuke Abe, Takeshi Kawasato
  • Patent number: 5578864
    Abstract: A thermoelectric semiconductor material is disclosed. The material comprises a double oxide which contains antimony and has a trirutile crystal structure.
    Type: Grant
    Filed: August 14, 1995
    Date of Patent: November 26, 1996
    Assignee: Kabushiki Kaisha Ohara
    Inventors: Yasuo Ochi, Kazuo Ohara
  • Patent number: 5569548
    Abstract: When a zinc oxide piezoelectric crystal film is epitaxially grown on an R-plane sapphire substrate by sputtering, a target containing not more than 4.5 percent by weight of Cu with respect to the total content of Zn and Cu is employed so that the zinc oxide piezoelectric film contains Cu. Thus, it is possible to obtain a zinc oxide piezoelectric crystal film having excellent orientation.
    Type: Grant
    Filed: August 2, 1994
    Date of Patent: October 29, 1996
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Jun Koike, Hideharu Ieki
  • Patent number: D828855
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: September 18, 2018
    Assignee: Apple Inc.
    Inventors: Sascha Höhne, Ole Lagemann
  • Patent number: D903806
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: December 1, 2020
    Assignee: Midwest Industries, Inc.
    Inventor: Troy Storch