Patents Examined by Jacinta M Crawford
  • Patent number: 12380632
    Abstract: A splat compression system and associated methods are provided to efficiently compress and decompress data of a three-dimensional (3D) splat representation using textures so that the size of the splat representation is reduced with minimal loss in fidelity. The compression includes receiving the splats that make up the 3D splat representation, determining clusters that are associated with a different set of the splats that are positioned about a different common plane, and defining each cluster with a position based on the positional data from the different set of splats associated with that cluster. The compression includes converting the positional data from the different set of splats associated with each cluster to offsets from the position of the associated cluster, and generating the compressed 3D representation with a definition for each cluster and a texture that stores the offsets for the different set of splats associated with each cluster.
    Type: Grant
    Filed: February 3, 2025
    Date of Patent: August 5, 2025
    Assignee: Illuscio, Inc.
    Inventors: Donald Makoto Boogert, Thomas Matterson, Timothy Ebling
  • Patent number: 12360928
    Abstract: A second memory has n banks accessible in parallel, and stores pixel data. An input DMA controller respectively transfers the pixel data stored in the second memory to n multiply-accumulate units by using n input channels. A sequence controller controls the input DMA controller so as to cause a first input channel to transfer the pixel data in a first pixel space of the input bank to a first multiply-accumulate unit and cause a second input channel to transfer the pixel data in a second pixel space of the same input bank to a second multiply-accumulate unit.
    Type: Grant
    Filed: July 7, 2023
    Date of Patent: July 15, 2025
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kazuaki Terashima, Atsushi Nakamura, Rajesh Ghimire
  • Patent number: 12361509
    Abstract: In an example, a multi-level data structure is defined including fine grid (FG) and coarse levels. The FG level is configured to store FG data of FG points. The coarse level is configured to store, for a respective chunk of FG points, compressed FG data and/or a pointer to corresponding FG data of the respective chunk. First chunks are identified by a graphics processing unit (GPU) and include each chunk of the FG points including one or more of: (i) that includes a FG point in a level set layer L0 (LSL0), and (ii) that neighbors a chunk that includes the FG point in the LSL0. Memory of the GPU is allocated for the first chunks that have respective compressed FG data to be decompressed. Level set values of the FG points in the LSL0 stored in the FG level in the allocated memory are updated by the GPU.
    Type: Grant
    Filed: August 21, 2023
    Date of Patent: July 15, 2025
    Assignee: Synopsys, Inc.
    Inventors: Zhiqiang Tan, Ibrahim Avci, Luis Villablanca
  • Patent number: 12353898
    Abstract: The techniques disclosed herein enable a guest operating system (OS) to access and use a color space conversion component on a host OS. The guest OS provides, via an application programming interface, a request for the host OS to generate media data in a color space format that is used by the guest OS. To generate the media data, the host OS uses a color space conversion component on the host OS, which is more performant than a corresponding color space conversion component on the guest OS because the color space conversion component on the host OS has access to hardware-accelerated functionality. Accordingly, the color space conversion component on the host OS converts media data into the color space format that is used by the guest OS, and stores the media data in memory that is accessible to the guest OS.
    Type: Grant
    Filed: May 26, 2023
    Date of Patent: July 8, 2025
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Anton Victor Polinger, Marcin Stankiewicz, Isuru Chamara Pathirana, Glenn Frederick Evans, Matthew R. Wozniak, Sang Choe, Jitesh Krishnan, Naveen Thumpudi
  • Patent number: 12347012
    Abstract: Systems and methods for doing presenting an avatar that speaks sign language based on sentiment of a speaker is disclosed herein. A translation application running on a device receives a content item comprising a video and an audio, wherein the audio comprises a first plurality of spoken words in a first language. The video comprises a character speaking the first plurality of spoken words in the first language. The translation application translates the first plurality of spoken words of the first language into a first sign of a first sign language. The translation application determines an emotional state expressed by the character based on sentiment analysis. The translation application generates an avatar that speaks the first sign of the first sign language where the avatar exhibits the determined emotional state. The content item and the avatar are presented for display on the device.
    Type: Grant
    Filed: January 12, 2024
    Date of Patent: July 1, 2025
    Assignee: Adeia Guides Inc.
    Inventors: Yusuf AbdElhakam AbdElkader Marey, Reda Harb
  • Patent number: 12346992
    Abstract: An apparatus including: a display configured to render display content over a field of view; and a glare system configured to render glare content in the field of view, wherein the glare system is configured to render the glare content at different positions across the field of view at different times while the display renders the display content.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: July 1, 2025
    Assignee: Nokia Technologies Oy
    Inventors: Toni Jarvenpaa, Jyrki Kimmel, Kiti Muller
  • Patent number: 12340437
    Abstract: A method is provided that includes receiving a video timing pulse, determining, in response to receiving the video timing pulse, a video engine is busy processing a previous frame, and storing settings for a current frame in a pending queue in response to determining the video engine is busy processing the previous frame. The method further includes configuring the video engine with the settings for the current frame from the pending queue after the video engine has completed processing of the previous frame, and processing, using the configured video engine, the current frame.
    Type: Grant
    Filed: February 2, 2024
    Date of Patent: June 24, 2025
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Jason W. Herrick, Hongtao Zhu
  • Patent number: 12333641
    Abstract: A method and apparatus are provided for compressing vertex parameter data in a 3D computer graphic system, where the vertex parameter data is a data block relating to a plurality of vertices used for rendering an image. The data relating to each vertex includes multiple byte data relating to at least one parameter. The parameters include X, Y and Z coordinates and further coordinates for texturing and shading. The multiple byte data is divided into individual bytes and bytes with corresponding byte positions relating to each vertex are grouped together to form a plurality of byte blocks.
    Type: Grant
    Filed: April 11, 2023
    Date of Patent: June 17, 2025
    Assignee: Imagination Technologies Limited
    Inventor: Xile Yang
  • Patent number: 12322066
    Abstract: Systems and methods are described for digital compositing. In an example, a video frame from video frames stored in memory can be identified based on video frame latency data. The video frame latency data can specify a number of video frames to be stored in the cache memory space before the video frame is selected. A scene related information frame of the scene related information frames stored in the memory can also be identified based on a timecode of the video frame. Augmented video data that includes one or more composited video frames can be provided based on the video frame and the scene related information frame.
    Type: Grant
    Filed: December 5, 2023
    Date of Patent: June 3, 2025
    Assignee: FD IP & LICENSING LLC
    Inventors: Brandon Fayette, Gene Reddick
  • Patent number: 12322024
    Abstract: Data structures, methods and primitive block generators for storing primitives in a graphics processing system.
    Type: Grant
    Filed: December 17, 2022
    Date of Patent: June 3, 2025
    Assignee: Imagination Technologies Limited
    Inventor: Xile Yang
  • Patent number: 12322067
    Abstract: Systems and methods are described for digital compositing. In an example, a video frame from video frames stored in memory can be identified based on video frame latency data. The video frame latency data can specify a number of video frames to be stored in the cache memory space before the video frame is selected. A scene related information frame of the scene related information frames stored in the memory can also be identified based on a timecode of the video frame. Augmented video data that includes one or more composited video frames can be provided based on the video frame and the scene related information frame.
    Type: Grant
    Filed: February 19, 2024
    Date of Patent: June 3, 2025
    Assignee: FD IP & LICENSING LLC
    Inventors: Brandon Fayette, Gene Reddick
  • Patent number: 12322025
    Abstract: A method and system for performing a render using a graphics processing unit that implements a tile-based graphics pipeline where a rendering space is sub-divided into tiles. Geometry data for the render is received, the geometry data including primitives associated with one or more vertex shader programs. The geometry data is processed using the vertex shader programs to generate processed primitives, and it is determined in which tile each of the processed primitives are located. For at least one selected tile there is stored i) a representation of per-tile vertex shader data identifying the one or more vertex shader programs used to generate the processed primitives in that tile, and ii) a representation of per-tile render data that can be used when rendering the processed primitives in that tile in subsequent stages of the graphics pipeline.
    Type: Grant
    Filed: March 31, 2023
    Date of Patent: June 3, 2025
    Assignee: Imagination Technologies Limited
    Inventors: John W. Howson, Xile Yang, Maurizio Zucchelli
  • Patent number: 12315032
    Abstract: A multicore graphics processing unit (GPU) and a method of operating a GPU are provided. The GPU comprises at least a first core and a second core. At least one of the cores in the multicore GPU comprises a master unit configured to distribute geometry processing tasks between at least the first core and the second core.
    Type: Grant
    Filed: February 12, 2024
    Date of Patent: May 27, 2025
    Assignee: Imagination Technologies Limited
    Inventor: Ian King
  • Patent number: 12299768
    Abstract: A master unit in a core of a plurality of cores in a graphics processing unit receives a set of image rendering tasks, assigns a first subset of the image rendering tasks to a first core of the plurality of cores and assigns a second subset of the image rendering tasks to a second core of the plurality of cores. The master unit transmits the first subset of image rendering tasks to a slave unit of the first core and transmits the second subset of image rendering tasks to a slave unit of the second core. The master unit stores a credit number for each of the first and second cores and adjusts the credit number of the first and second cores by a first amount for each task in the first and second subset of the image rendering tasks. The slave units transmit credit notifications when tasks have been processed and the master unit adjusts the credit numbers when it receives the notifications.
    Type: Grant
    Filed: March 28, 2023
    Date of Patent: May 13, 2025
    Assignee: Imagination Technologies Limited
    Inventors: Michael John Livesley, Ian King
  • Patent number: 12299769
    Abstract: Systems, methods, and techniques dynamically utilize load balancing for workgroup assignments between a group of shader engines by a command processor of a graphics processing unit (GPU). Based on one or more commands received for execution, a plurality of workgroups is generated for assignment to a plurality of shader engines for processing, each shader engine including a respective quantity of active compute units. Each workgroup of the plurality of workgroups is dynamically assigned to a respective shader engine for execution based at least in part on indications of available resources respectively associated with each of the shader engines. In various embodiments, the indications of available resources may include physical parameters regarding each shader engine, as well as current status information regarding the processing of workgroups assigned to each shader engine.
    Type: Grant
    Filed: March 12, 2024
    Date of Patent: May 13, 2025
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Randy Ramsey, Yash Ukidave
  • Patent number: 12292765
    Abstract: An example electronic device may include a display including a main display area and at least one expansion display area expandable from the main display area; and a processor operatively coupled to the display. The processor is configured to, while the electronic device is in a slide-in state, display, on the main display area, a first screen corresponding to an application executed in the slide-in state; based on a portion of the expansion display area being slid out, generate a second screen to be displayed on the main display area and a portion of the slid-out expansion display area; generate a slide effect screen and display the same on at least a portion of the slid-out expansion display area, at least at the same time as the generation of the second screen; and based on the generation of the second screen being completed, remove the display of the slide effect screen and display the second screen on the main display area and the slid-out expansion display area.
    Type: Grant
    Filed: April 5, 2023
    Date of Patent: May 6, 2025
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Gwanghui Lee, Woojun Jung, Seungjin Kim, Kimyung Lee, Mooyoung Kim, Donghyun Yeom
  • Patent number: 12288284
    Abstract: Dynamic routing of texture-load in graphics processing is described. An example of a processor includes one or more processing resources, the one or more processing resources to load a message including a texture load; a texture sampler and a data port; and a message router to route the texture load to a destination, wherein the destination may be either the texture sampler or the data port; wherein the message router includes arbitration circuitry to select the destination for the texture load, the arbitration circuitry to base selection of the destination at least in part on support by the data port for a format of a memory surface for the texture load; and a utilization metric for the data port representing availability of the data port.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: April 29, 2025
    Assignee: INTEL CORPORATION
    Inventors: Carlos Nava Rodriguez, Yoav Harel, Joydeep Ray, Abhishek R. Appu, Vamsee Vardhan Chivukula, Benjamin R. Pletcher
  • Patent number: 12277641
    Abstract: Shader processing units for a graphics processing unit that are configured to execute one or more ray tracing shaders that generate ray data associated with one or more rays. The ray data for a ray includes a plurality of ray data elements. The shader processing unit comprises local storage, and store logic. The store logic is configured to receive, as part of a ray tracing shader, a ray store instruction that comprises: (i) information identifying a store group of a plurality of store groups, each store group of the plurality of store groups comprising one or more ray data elements of the plurality of ray data elements, and (ii) information identifying one or more ray data elements of the identified store group to be stored in an external unit). In response to receiving the ray store instruction, the store logic retrieves the identified ray data elements for one or more rays from the storage.
    Type: Grant
    Filed: March 26, 2023
    Date of Patent: April 15, 2025
    Assignee: Imagination Technologies Limited
    Inventor: Daniel Barnard
  • Patent number: 12266044
    Abstract: Data structures, methods and tiling engines for storing tiling data in memory wherein the tiles are grouped into tile groups and the primitives are grouped into primitive blocks. The methods include, for each tile group: determining, for each tile in the tile group, which primitives of each primitive block intersect that tile; storing in memory a variable length control data block for each primitive block that comprises at least one primitive that intersects at least one tile of the tile group; and storing in memory a control stream comprising a fixed sized primitive block entry for each primitive block that comprises at least one primitive that intersects at least one tile of the tile group, each primitive block entry identifying a location in memory of the control data block for the corresponding primitive block. Each primitive block entry may comprise valid tile information identifying which tiles of the tile group are valid for the corresponding primitive block.
    Type: Grant
    Filed: December 31, 2023
    Date of Patent: April 1, 2025
    Assignee: Imagination Technologies Limited
    Inventors: Xile Yang, Robert Brigg, Michael John Livesley
  • Patent number: 12254548
    Abstract: A system configured to perform style-aware listener animation. By representing different listening styles (e.g., facial expressions) using an embedding space, a single model can be trained to generate unique facial animations for a number of distinct listeners. Thus, individual listening styles can be associated with a listener identifier, enabling the system to (i) animate a plurality of different listeners with unique nonverbal behavior and/or (ii) select a particular listener identifier or desired type of listener style with which to animate. This enables the model to be generalized to new listeners to generate additional listener facial responses without needing training data for each new listener. The model may process a listener representation style or listener identifier, along with input data corresponding to a speaker talking, to generate unique facial animation responsive to the speech.
    Type: Grant
    Filed: December 16, 2022
    Date of Patent: March 18, 2025
    Assignee: Amazon Technologies, Inc.
    Inventors: Gourav Datta, Vivek Yadav, Yue Wu, Ayush Jaiswal, Rajiv M Reddy, Prateek Singhal, Karthik Ramakrishnan, Premkumar Natarajan