Patents Examined by Jacinta M Crawford
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Patent number: 11900503Abstract: A multicore graphics processing unit (GPU) and a method of operating a GPU are provided. The GPU comprises at least a first core and a second core. At least one of the cores in the multicore GPU comprises a master unit configured to distribute geometry processing tasks between at least the first core and the second core.Type: GrantFiled: March 24, 2023Date of Patent: February 13, 2024Assignee: Imagination Technologies LimitedInventor: Ian King
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Patent number: 11900553Abstract: A method and apparatus for processing augmented reality (AR) are disclosed. The method includes determining a compensation parameter to compensate for light attenuation of visual information caused by a display area of an AR device as the visual information corresponding to a target scene is displayed through the display area, generating a background image without the light attenuation by capturing the target scene using a camera of the AR device, generating a compensation image by reducing brightness of the background image using the compensation parameter, generating a virtual object image to be overlaid on the target scene, generating a display image by synthesizing the compensation image and the virtual object image, and displaying the display image in the display area.Type: GrantFiled: June 9, 2022Date of Patent: February 13, 2024Assignee: Samsung Electronics Co., Ltd.Inventor: Inwoo Ha
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Patent number: 11893667Abstract: A system and method for rendering vector graphics using precomputed textures, includes receiving a vector image, the vector image including a plurality of instructions, each instruction for rendering at least a geometric primitive; detecting in the plurality of instructions an instruction for generating a first Bezier curve; selecting a first precomputed curve in a texture map to match the first Bezier curve; and generating a raster image based at least on the first precomputed curve. In an embodiment selecting the first precomputed curve includes computing a transformation matrix between the first precomputed curve and target coordinates, wherein the target coordinates are coordinates of a display; computing texture coordinates based on the computed transformation matrix and the texture map; and rendering an adapted precomputed curve, based on the texture map and the computed texture coordinates.Type: GrantFiled: April 6, 2022Date of Patent: February 6, 2024Assignee: THINK SILICON RESEARCH AND TECHNOLOGY SINGLE MEMBER S.A.Inventors: Ioannis Oikonomou, Georgios Keramidas
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Patent number: 11893687Abstract: The disclosure relates to a computer-implemented method comprising inputting a representation of a 3D modeled object to an abstraction neural network which outputs a first set of a first number of first primitives fitting the 3D modeled object; and determining, from the first set, one or more second sets each of a respective second number of respective second primitives. The second number is lower than the first number. The determining includes initializing a third set of third primitives as the first set and performing one or more iterations, each comprising to merging one or more subsets of third primitives together each into one respective single fourth primitive, to thereby obtain a fourth set of fourth primitives. Each iteration further comprises setting the third set of a next iteration as the fourth set of a current iteration and setting the one or more second sets as one or more obtained fourth sets.Type: GrantFiled: July 15, 2022Date of Patent: February 6, 2024Assignee: DASSAULT SYSTEMESInventors: Mariem Mezghanni, Julien Boucher, Paul Villedieu
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Patent number: 11890538Abstract: In a multi-GPU simulation environment, frame buffer management may be implemented by multiple GPUs rendering respective frames of video, or by rendering respective portions of each frame of video. One of the GPUs controls HDMI frame output by virtue of receiving frame information from the other GPU(s) and reading out complete frames through a physically connected HDMI output port. Or, the outputs of the GPUs can be multiplexed together.Type: GrantFiled: January 15, 2020Date of Patent: February 6, 2024Assignee: Sony Interactive Entertainment LLCInventor: Roelof Roderick Colenbrander
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Patent number: 11893655Abstract: A method is provided that includes receiving a video timing pulse, determining, in response to receiving the video timing pulse, a video engine is busy processing a previous frame, and storing settings for a current frame in a pending queue in response to determining the video engine is busy processing the previous frame. The method further includes configuring the video engine with the settings for the current frame from the pending queue after the video engine has completed processing of the previous frame, and processing, using the configured video engine, the current frame.Type: GrantFiled: March 31, 2022Date of Patent: February 6, 2024Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: Jason W. Herrick, Hongtao Zhu
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Patent number: 11887213Abstract: The subject technology receives, from a first client device, a set of requests for recording user activity detected on a mobile application, each request includes information corresponding to a set of events based on the user activity that has occurred on the mobile application. The subject technology determines that a first request from the set of requests includes an image and a hash of the image. The subject technology stores the image and the hash of the image in a cache. The subject technology determines that a second request from the set of requests includes the hash of the image, the second request being different than the first request. The subject technology retrieves, based on the hash of the image, the image from the cache. The subject technology generates a markup language element based at least in part on the retrieved image from the cache.Type: GrantFiled: January 30, 2023Date of Patent: January 30, 2024Assignee: Content Square SASInventors: Martin Debize, Jérôme Gully, Christophe Kalenzaga, Mathieu Ouvrard
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Patent number: 11887563Abstract: A system and method runs a query using a GPU and generates a visualization of the query using the same GPU.Type: GrantFiled: October 25, 2022Date of Patent: January 30, 2024Assignee: Heavy.ai, Inc.Inventors: Todd L. Mostak, Christopher Root
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Patent number: 11880907Abstract: A method of configuring a graphics processing unit includes generating configuration data that specifies a configuration to be adopted by the graphics processing unit. The configuration data is received at the graphics processing unit, which is configured in accordance with the configuration data by writing the configuration data into one or more registers of the graphics processing unit. It is determined whether the graphics processing unit is correctly configured in accordance with the configuration data by determining whether the configuration data has been correctly written into the one or more registers of the graphics processing unit. An error is determined to have occurred in response to determining that the graphics processing unit is not correctly configured in accordance with the configuration data.Type: GrantFiled: January 23, 2023Date of Patent: January 23, 2024Assignee: Imagination Technologies LimitedInventors: Mario Sopena Novales, Philip Morris
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Patent number: 11875427Abstract: An electronic device may include an electronic display to display an image based on processed image data. The electronic device may also include image processing circuitry to generate the processed image data based on input image data and previously determined data stored in memory. The image processing circuitry may also operate according to real-time computing constraints. Cache memory may store the previously determined data in a provisioned section of the cache memory allotted to the image processing circuitry. Additionally, a controller may manage reading and writing of the previously determined data to the provisioned section of the cache memory.Type: GrantFiled: September 13, 2021Date of Patent: January 16, 2024Assignee: Apple Inc.Inventors: Rohit Natarajan, Christopher P. Tann, Rohit K. Gupta
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Patent number: 11875492Abstract: Systems and methods are described for digital compositing. In an example, a video frame from video frames stored in memory can be identified based on video frame latency data. The video frame latency data can specify a number of video frames to be stored in the cache memory space before the video frame is selected. A scene related information frame of the scene related information frames stored in the memory can also be identified based on a timecode of the video frame. Augmented video data that includes one or more composited video frames can be provided based on the video frame and the scene related information frame.Type: GrantFiled: May 1, 2023Date of Patent: January 16, 2024Assignee: FD IP & LICENSING LLCInventors: Brandon Fayette, Gene Reddick
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Patent number: 11868877Abstract: An arithmetic device and an electronic device having small power consumption is provided. An arithmetic device and an electronic device capable of high-speed operation is provided. An arithmetic device and an electronic device capable of suppressing heat generation is provided. The arithmetic device includes a first arithmetic portion and a second arithmetic portion. The first arithmetic portion includes a first CPU core and a second CPU core. The second arithmetic portion includes a first GPU core and a second GPU core. The CPU cores each have a power gating function and each include a first data retention circuit electrically connected to a flip-flop. The first GPU core includes a second data retention circuit capable of retaining an analog value and reading out the analog value as digital data of two or more bits. The second GPU core includes a third data retention circuit capable of retaining a digital value and reading out the digital value as digital data of one bit.Type: GrantFiled: January 31, 2022Date of Patent: January 9, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takahiko Ishizu, Takayuki Ikeda, Atsuo Isobe, Atsushi Miyaguchi, Shunpei Yamazaki
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Patent number: 11861758Abstract: Apparatuses, systems, and techniques to process packet data in parallel. In at least one embodiment, packet data is processed by (e.g., one or more algorithms expressed in CUDA code executing on) a Graphics Processing Unit (“GPU”).Type: GrantFiled: April 12, 2021Date of Patent: January 2, 2024Assignee: NVIDIA CORPORATIONInventor: Elena Agostini
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Patent number: 11861782Abstract: Data structures, methods and tiling engines for storing tiling data in memory wherein the tiles are grouped into tile groups and the primitives are grouped into primitive blocks. The methods include, for each tile group: determining, for each tile in the tile group, which primitives of each primitive block intersect that tile; storing in memory a variable length control data block for each primitive block that comprises at least one primitive that intersects at least one tile of the tile group; and storing in memory a control stream comprising a fixed sized primitive block entry for each primitive block that comprises at least one primitive that intersects at least one tile of the tile group, each primitive block entry identifying a location in memory of the control data block for the corresponding primitive block. Each primitive block entry may comprise valid tile information identifying which tiles of the tile group are valid for the corresponding primitive block.Type: GrantFiled: December 13, 2022Date of Patent: January 2, 2024Assignee: Imagination Technologies LimitedInventors: Xile Yang, Robert Brigg, Michael John Livesley
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Patent number: 11861760Abstract: A method of operating a tile-based graphics processor that executes a graphics processing pipeline is disclosed. When there are no more primitives left to be provided for processing to the pipeline for a rendering tile, it is determined whether any remaining processing steps for the rendering tile can be omitted, e.g. because they will not affect a buffer that will be output when the rendering tile is complete. When it is determined that a processing step can be omitted, that processing step is omitted.Type: GrantFiled: January 24, 2022Date of Patent: January 2, 2024Assignee: Arm LimitedInventor: Toni Viki Brkic
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Patent number: 11853155Abstract: A graphics processing system for performing tile-based rendering of a scene that includes safety-related primitives has a plurality of graphics processing units (GPUs), each configured to i) receive tile data identifying one or more protected tiles comprising at least part of a safety-related primitive, ii) process two respective sets of protected tiles, and iii) based on said processing, generate two respective checksums for each respective set of protected tiles. The two respective sets of protected tiles are mutually exclusive, and each respective set and each protected tile being processed by two different GPUs. The system includes a comparison unit configured to compare one or more pairs of checksums, each pair comprising a respective checksum generated based on a same respective set of protected tiles and generated by different GPUs.Type: GrantFiled: April 19, 2022Date of Patent: December 26, 2023Assignee: Imagination Technologies LimitedInventor: Ian Beaumont
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Apparatus and method for seamless container migration for graphics processors and associated devices
Patent number: 11854114Abstract: Apparatus and method for migrating a container including graphics processor state.Type: GrantFiled: February 20, 2019Date of Patent: December 26, 2023Assignee: Intel CorporationInventors: Zhenyu Z Wang, Xinda Zhao, Owen Zhang -
Patent number: 11842435Abstract: Methods and tiling engines for storing tiling primitives in a graphics processing system.Type: GrantFiled: November 28, 2022Date of Patent: December 12, 2023Assignee: Imagination Technologies LimitedInventor: Xile Yang
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Patent number: 11830102Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for generating, by an image sensor of a computing device, frame data comprising sub-frames of image pixel data. A first resource of the system-on-chip provides the frame data to a second resource of the system-on-chip. The frame data is provided to the second resource using a first data path included in the system-on-chip. The first resource provides a token to the second resource using a second data path included in the system-on-chip. A processor of the system-on-chip, uses the token to synchronize production of sub-frames of image pixel data provided by the first resource to the second resource and to synchronize consumption of the sub-frames of image pixel data received by the second resource from the elastic memory buffer.Type: GrantFiled: September 12, 2022Date of Patent: November 28, 2023Assignee: Google LLCInventors: Benjamin Dodge, Jason Rupert Redgrave, Xiaoyu Ma
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Patent number: 11823325Abstract: Techniques are described for using computing devices to perform automated operations related to, with respect to a computer model of a house or other building's interior, generating and displaying simulated lighting information in the model based on sunlight or other external light that is estimated to enter the building and be visible in particular rooms of the interior under specified conditions, such as using ambient occlusion and light transport matrix calculations. The computer model may be a 3D (three-dimensional) or 2.5D representation that is generated after the house is built and that shows physical components of the actual house's interior (e.g., walls), and may be displayed to a user of a client computing device in a displayed GUI (graphical user interface) via which the user specifies conditions for which the simulated lighting display is generated.Type: GrantFiled: October 5, 2021Date of Patent: November 21, 2023Assignee: MFTB Holdco, Inc.Inventors: Joshuah Vincent, Pierre Moulon, Ivaylo Boyadzhiev, Joshua David Maruska