Abstract: The present application provides a method for detecting temperature of thermal chamber comprising: conducting a thermal treatment at a predicted temperature to a selected silicon wafer within a thermal chamber, wherein the predicted temperature comprises plural temperature points set in order; obtaining a haze value corresponding to the predicted temperature; obtaining a linear relationship I between the temperature and the haze; polishing and washing the silicon wafer; conducting a thermal treatment at a predicted temperature to the polished silicon wafer within the thermal chamber; obtaining a linear relationship II between the temperature and the haze; calculating a difference of the haze at same temperature point between the two thermal treatments, and obtaining an actual temperature difference of the thermal chamber based on the difference of the haze.

Abstract: A reservoir element includes a plurality of magnetoresistive effect elements each having a first ferromagnetic layer, a non-magnetic layer and a second ferromagnetic layer laminated in a first direction, and separated from each other, a spin orbit torque wiring that faces a part of at least one of the plurality of magnetoresistive effect elements, and a spin-conductive layer that connects at least the magnetoresistive effect elements closest to each other of the plurality of magnetoresistive effect elements, and conducts spins, wherein, the magnetoresistive effect elements are seen from the first direction, the second ferromagnetic layer overlaps part of the first ferromagnetic layer, the spin orbit torque wiring faces a first portion that does not overlap the second ferromagnetic layer in the first ferromagnetic layer when seen from the first direction, and the spin-conductive layer faces at least the first ferromagnetic layer each of the closest magnetoresistive effect elements.

Abstract: A high electron mobility transistor (HEMT) is disclosed. The HEMT includes a substrate, a first epitaxial layer disposed on the substrate, a second epitaxial layer disposed on the first epitaxial layer, a third epitaxial layer disposed on the second epitaxial layer, and a gate disposed on the third epitaxial layer. An upper portion of the first epitaxial layer has a plurality of first recesses. The second epitaxial layer partially fills the first recesses and surrounding a plurality of first air slits in the first recesses.

Abstract: A silicon carbide semiconductor device includes: a silicon carbide layer of a first conductive type including a defect region in which a crystal defect exists; a plurality of well regions of a second conductive type formed on the silicon carbide layer; source regions of the first conductive type formed in the well regions; gate oxide films formed on the silicon carbide layer, the well regions and the source regions; gate electrodes formed on the gate oxide films; and a source electrode electrically connected to the well regions and the source regions, wherein the source region is not formed in the defect region.

Abstract: A method of making an adhesion layer of an extreme ultraviolet (EUV) stack is presented. The method includes grafting an ultraviolet (UV) sensitive polymer brush on a hardmask, the polymer brush including a UV cleavable unit, depositing EUV resist over the polymer brush, exposing the EUV resist to remove the EUV resist in exposed areas by applying a developer, and flooding the exposed area with a UV light and a solvent developer to remove exposed portions of the polymer brush.

Abstract: Embodiments herein relate to systems, apparatuses, or processes directed to manufacturing transistors that include a substrate, an epitaxial layer with a first side and a second side opposite the first side, where the first side and the second side of the epitaxial layer are substantially planar, where the second side of the epitaxial layer is substantially parallel to the first side, and where the first side of the epitaxial layer is directly coupled with a side of the substrate. In particular, the epitaxial layer may be adjacent to an oxide layer having a side that is substantially planar, where the second side of the epitaxial layer is adjacent to the side of the oxide layer, and the epitaxial layer was grown and the growth was constrained by the oxide layer.

Abstract: A flexible display panel and a display device are disclosed. An opening hole is defined in a corner splicing section of the flexible display panel and is filled with a splicing element formed by filling a light guide material, and a light guide layer is disposed on one side of a display surface of the flexible display panel at a same time. Therefore, the flexible display panel and the display device of the present disclosure can prevent wrinkle phenomena and realize normal light emission in the corner splicing section.

Abstract: Structures including devices, such as transistors, integrated on a semiconductor substrate and methods of forming a structure including devices, such as transistors, integrated on a semiconductor substrate. A first transistor is formed in a first device region of a semiconductor substrate, and a second transistor is formed in a second device region of the semiconductor substrate. The second transistor includes a layer stack on the semiconductor substrate, and the layer stack includes a layer comprised of a III-V compound semiconductor material. A polycrystalline layer includes a section that is positioned in the semiconductor substrate beneath the first device region.

Abstract: A light, flexible, and tough thin film having high total light transmittance that can be formed on various three dimensional shapes, and also provides a stably driven tactile sensor, which is an electronic device having the switching function thereof, is provided. The tactile sensor is formed on a polyimide thin film having high total light transmittance, thermal resistance, and a polar component of surface free energy with a specific value, and has a switching device that emits a voltage signal which, through an electronic circuit for controlling noise, stably drives another device. This tactile sensor has a curved or flat surface and has a first electrode, a ferroelectric layer, and a second electrode formed over the polyimide thin film. The switching device as a tactile sensor can drive another device merely by a light touch with a finger, and can be manufactured at a high non-defective rate.

Abstract: A method of manufacturing a semiconductor memory device includes processing a first substrate including a first align mark and a first structure, processing a second substrate including a second align mark and a second structure, orientating the first substrate and the second substrate such that the first structure and the second structure face each other, and controlling alignment between the first structure and the second structure by using the first align mark and the second align mark to couple the first structure with the second structure.

Abstract: A display substrate and a display device. The display substrate includes a display region, a first connecting wire, and a second connecting wire. A first display region includes a first sub-pixel array, including a plurality of light emitting elements arranged in an array, and the plurality of light emitting elements include a first light emitting element and a second light emitting element. The second display region includes a first pixel circuit array, including a plurality of first pixel circuit units, and the plurality of pixel circuit units include a first pixel circuit (D10) and a second pixel circuit. The first connecting wire (151) is connected to the first pixel circuit and the first light emitting element. The second connecting wire is connected to the second pixel circuit and the second light emitting element. The second connecting wire extends in a first direction, the first connecting wire extends in a second direction.

Abstract: A semiconductor device includes a semiconductor region made of a material to which conductive impurities are added, an insulating film formed on a surface of the semiconductor region, and an electroconductive gate electrode formed on the insulating film. The gate electrode is made of a material whose Fermi level is closer to a Fermi level of the semiconductor region than a Fermi level of Si in at least a portion contiguous to the insulating film.

Abstract: A display apparatus includes a substrate including a display area and a sensor area, the display area including main pixels and the sensor area including auxiliary pixels and a transmission portion; a first pixel electrode and a first emission layer in each of the main pixels; a second pixel electrode and a second emission layer in each of the auxiliary pixels; an opposite electrode integrally arranged in the display area and the sensor area; and a metal layer at least partially surrounding the transmission portion, wherein the opposite electrode has an opening corresponding to the transmission portion.

Abstract: The present invention relates to a method for connecting an electrical contact to a nanomaterial carried by a substrate. At least one layer of soluble lithography resist is provided on the nanomaterial. An opening in the at least one layer of resist exposes a surface portion of the nanomaterial. At least a portion of the exposed surface portion of the nanomaterial is removed to thereby expose the underlying substrate and an edge of the nanomaterial. A metal is deposited on at least the edge of the nanomaterial and the exposed substrate such that the metal forms an electrical contact with the nanomaterial. Removing at least a portion of the soluble lithography resist from the nanomaterial such that at least a portion of the two-dimensional material is exposed.

Abstract: Disclosed are approaches for forming semiconductor device cavities using directional dielectric deposition. One method may include providing a plurality of semiconductor structures and a plurality of trenches of a semiconductor device, and forming a dielectric atop the plurality of semiconductor structures by delivering a dielectric material at a non-zero angle of inclination relative to a normal extending perpendicular from a top surface of the plurality of semiconductor structures. The dielectric may be further formed by delivering the dielectric material at a second non-zero angle of inclination relative to the normal extending perpendicular from the top surface of the plurality of semiconductor structures.

Abstract: A display substrate and a display panel are provided. The display substrate includes: a substrate. The display substrate includes a first display region and a second display region. A light transmittance of the first display region is greater than a light transmittance of the second display region. The first display region is provided with a first pixel unit, and the second display region is provided with a second pixel unit, wherein a ratio of a first size of the first pixel unit in a first direction to a second size of the first pixel unit in a second direction is substantially same as a ratio of a first size of the second pixel unit in the first direction to a second size of the second pixel unit in the second direction, the first direction intersecting with the second direction.

Abstract: The present application provides a method for detecting temperature of thermal chamber comprising: conducting a thermal treatment at a predicted temperature to a selected silicon wafer within a thermal chamber, wherein the predicted temperature comprises plural temperature points set in order; obtaining a haze value corresponding to the predicted temperature; obtaining a linear relationship I between the temperature and the haze; polishing and washing the silicon wafer; conducting a thermal treatment at a predicted temperature to the polished silicon wafer within the thermal chamber; obtaining a linear relationship II between the temperature and the haze; calculating a difference of the haze at same temperature point between the two thermal treatments, and obtaining an actual temperature difference of the thermal chamber based on the difference of the haze.

Abstract: A display substrate and a display device. The display substrate includes a display region, a first connecting wire, and a second connecting wire. A first display region includes a first sub-pixel array, including a plurality of light emitting elements arranged in an array, and the plurality of light emitting elements include a first light emitting element and a second light emitting element. The second display region includes a first pixel circuit array, including a plurality of first pixel circuit units, and the plurality of pixel circuit units include a first pixel circuit (D10) and a second pixel circuit. The first connecting wire (151) is connected to the first pixel circuit and the first light emitting element. The second connecting wire is connected to the second pixel circuit and the second light emitting element. The second connecting wire extends in a first direction, the first connecting wire extends in a second direction.

Abstract: Aspects of the present disclosure relate to methods, systems, and apparatus for conducting a radical treatment operation on a substrate prior to conducting an annealing operation on the substrate. In one implementation, a method of processing semiconductor substrates includes pre-heating a substrate, and exposing the substrate to species radicals. The exposing of the substrate to the species radicals includes a treatment temperature that is less than 300 degrees Celsius, a treatment pressure that is less than 1.0 Torr, and a treatment time that is within a range of 8.0 minutes to 12.0 minutes. The method includes annealing the substrate after the exposing of the substrate to the species radicals. The annealing includes exposing the substrate to molecules, an anneal temperature that is 300 degrees Celsius or greater, an anneal pressure that is within a range of 500 Torr to 550 Torr, and an anneal time that is less than 4.0 minutes.

Abstract: Embodiments include a cooling solution having a first array of fins, where the first array of fins extend vertically from the substrate, and where adjacent individual fins of the first array are separated from each other by a microchannel. A second array of fins extend vertically from the substrate, where a channel region is between the first array of fins and the second array of fins.