Patents Examined by Jaison Joseph
  • Patent number: 10516556
    Abstract: Provided is a transmission device including a transmitter. The transmitter includes a first output, a second output, and a third output, and is configured to transmit a symbol signal corresponding to a combination of signals of the first output, the second output, and the third output. An output impedance of the second output is lower than an output impedance of the first output.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: December 24, 2019
    Assignee: Sony Corporation
    Inventor: Tatsuya Sugioka
  • Patent number: 10516422
    Abstract: A circuit arrangement (1) for compensating for a damping occurring in an antenna line between a mobile radio terminal (2) and an antenna (3), comprising a plurality of partial branches (T1, T2, T3) in each case for assigned transmission services for specific frequency bands, is described.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: December 24, 2019
    Assignee: BURY SP.Z.O.O.
    Inventor: Eckhard Bollmann
  • Patent number: 10498526
    Abstract: The present invention is directed to electrical circuits. More specifically, embodiments of the present invention provide a charge pump, which can be utilized as a part of a clock data recovery device. Early and late signals are used as differential switching voltage signals in the charge pump. The first switch and a second switch are used for controlling the direction of the current flowing into the loop filter. Input differential voltages to the switches are being generated with an opamp negative feedback loop. The output voltage of the first switch and the second switch is used in conjunction with a resistor to generate a charge pump current. There are other embodiments as well.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: December 3, 2019
    Assignee: INPHI CORPORATION
    Inventors: Simon Forey, Parmanand Mishra, Michael S. Harwood, Rajasekhar Nagulapalli
  • Patent number: 10491361
    Abstract: An amplification subsystem for a communication system includes a downstream amplifier configured to transmit a downstream signal within a first frequency range, an upstream amplifier configured to transmit an upstream signal within a second frequency range, and a bidirectional amplifier configured to selectively transmit a mid-band signal in either of the upstream and downstream direction.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: November 26, 2019
    Assignee: Cable Television Laboratories, Inc
    Inventor: Belal Hamzeh
  • Patent number: 10476517
    Abstract: The present disclosure relates to a modulator for a digital amplifier and a device comprising such a modulator and a digital amplifier. The modulator includes a pulse shaper and a control unit for controlling the pulse shaper to convert an input signal into a bit stream configured for a digital amplifier which encodes an amplitude value per clock of a carrier signal. The pulse shaper can represent a respective amplitude value of the input signal with different bit patterns. The control unit includes an assignment of the control commands to associated amplitude values resulting from amplification of the associated bit patterns with the digital amplifier is stored or at least is provided in that the control unit selects a control command per clock by means of the assignment and the amplitude value of the input signal and drives the pulse shaper accordingly.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: November 12, 2019
    Assignee: Forschungsverbund Berlin e.V.
    Inventor: Florian Hühn
  • Patent number: 10469214
    Abstract: Techniques and mechanisms for a clock recovery circuit to generate a cyclical signal based on data signals which are susceptible to circuit switching jitter. In an embodiment, a clock recovery circuit comprises switch circuitry which receives a first signal representing a logical combination of multiple pulsed signals (which, in turn, are each based on a different respective differential data signal). The switch circuitry provides to latch circuitry of the clock recovery circuit a second signal based on the first signal. The latch circuitry generates a cyclical signal based on the second signal, and transitions the switch circuitry between an open-circuit state and a closed-circuit state. In another embodiment, the latch circuitry implements a predetermined and configurable time period between a transition of the cyclical signal and a next subsequent logic state transition of the cyclical signal.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: November 5, 2019
    Assignee: Intel Corporation
    Inventors: Pankaj Dudulwar, Mohit Verma, Hongjiang Song, Mingming Xu
  • Patent number: 10469142
    Abstract: A method of determining a precoder from a first codebook, where said precoder determination comprises measuring on a set of beamformed antenna ports, and where the precoders in the first codebook share one or more common components with precoders in a second, multi-beam, codebook and where determining precoders from the second codebook comprises measuring on a larger set of, typically non-precoded, antenna ports.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: November 5, 2019
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Sebastian Faxér, Niklas Wernersson
  • Patent number: 10469100
    Abstract: Disclosed herein are a method for transmitting and receiving compressed data and an apparatus therefor. According to the method for transmitting compressed data, a transmission apparatus for transmitting compressed data standardizes the value of an In-phase/Quadrature-phase (IQ) data sample to a preset type that is selected from among a positive number and a negative number, determines the sample type of the IQ data sample, the value of which is standardized to the preset type, based on a sample type determination rule, generates a compressed bit string based on the compression rule pertaining to the determined sample type, generates compressed data, including at least one of a reference bit corresponding to the sample type, the sign bit of the IQ data sample, and the compressed bit string, for each IQ data sample, and transmits the compressed data to a reception apparatus.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: November 5, 2019
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Eun-Hee Hyun, Je-Won Lee, Heung-Mook Kim, Joon-Young Jung, Tae-Kyoon Kim
  • Patent number: 10469144
    Abstract: A low complexity multiple input multiple output transmitter that transmits a single codeword per channel is disclosed herein. Instead of sending multiple codewords per channel for transmissions that support higher data layer transmissions, the transmitter can send single codewords over multiple channels in order to improve spectral efficiency over a range of signal to interference plus noise ratios. For instance, if a downlink transmission to a user equipment (UE) has a rank of 4, capable of supporting 4 data layers, instead of sending 2 or more codewords over a single downlink control channel, the transmitter can schedule multiple control channels and transmit a single codeword per channel. The transmitter can also include in the signaling to the UE that the multi-codewords are included in multiple downlink control channels.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: November 5, 2019
    Assignee: AT&T Intellectual Property I, L.P.
    Inventors: SaiRamesh Nammi, Arunabha Ghosh
  • Patent number: 10469241
    Abstract: A method of performing clock synchronization between two apparatuses includes storing, in a first apparatus, information representing synchronization accuracy required by at least one function of the apparatus; carrying out, by the first apparatus, a service discovery procedure with a second apparatus, and receiving clock information from the second apparatus during the service discovery procedure; determining, by the first apparatus on the basis of the received clock information and said stored information, whether or not synchronization accuracy is sufficient for the at least one function; and upon determining that the synchronization accuracy is sufficient for the at least one function, synchronizing a clock of the first apparatus with a clock of the second apparatus.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: November 5, 2019
    Assignee: Polar Electro Oy
    Inventors: Niclas Granqvist, Patrick Celka
  • Patent number: 10469242
    Abstract: A reset sub-circuit can sample the reset signal based on a low-speed clock reference signal to generate a series of sampled reset signals. A phase relation between a first selected one of the series of sampled reset signals and the high-speed clock signal at the clock input of each sampler can be measured to generate reset trigger signals corresponding to each of a plurality of samplers. A second selected one of the series of sampled reset signals can be sampled based on the high-speed clock signal to generate a positive sampled reset signal and a negative sampled reset signal. The reset sub-circuit can select between the positive sampled reset signal and the negative sampled reset signal based on the reset trigger signals corresponding to each sampler to generate the synchronous reset signal.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: November 5, 2019
    Assignee: MACOM TECHNOLOGY SOLUTIONS HOLDING, INC.
    Inventors: Yanfei Chen, Hiva Hedayati
  • Patent number: 10469138
    Abstract: Systems and methods relating to transmission and use of Discovery Reference Signal (DRS) signals are disclosed in herein. In some embodiments, a method of operation of a Transmission Point (TP) in a cellular communications network comprises transmitting, from the TP, a same one or more DRS signals using at least two different transmit beams in at least two different time resources. Each transmit beam is characterized by a direction in which it is transmitted. In this manner, the TP is enabled to reuse DRS resources, which in turn enables transmission of DRS signals on a larger number of transmit beams and, correspondingly, adaptation of measurement procedures at wireless devices to obtain measurements on those transmit beams.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: November 5, 2019
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Mattias Frenne, Robert Mark Harrison, Muhammad Kazmi
  • Patent number: 10448365
    Abstract: UE (12) for transmission of a demodulation reference signal, DMRS, for sidelink communications is provided. UE (12) includes processing circuit (26) configured to: determine at least one transmission parameter associated with at least one of data transmission and control information transmission, and generate a DMRS using the determined at least one transmission parameter. UE (12) includes transmitter circuit (22) configured to transmit the DMRS.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: October 15, 2019
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Ricardo Blasco Serrano, Stefano Sorrentino
  • Patent number: 10411933
    Abstract: An apparatus and method for generating a broadcast signal frame including preamble for signaling injection level information. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes an injection level controller configured to generate a power reduced enhanced layer signal by reducing a power of an enhanced layer signal; a combiner configured to generate a multiplexed signal by combining a core layer signal and the power reduced enhanced layer signal; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling injection level information corresponding to the injection level controller.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: September 10, 2019
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung-Ik Park, Jae-Young Lee, Sun-Hyoung Kwon, Heung-Mook Kim
  • Patent number: 10411656
    Abstract: A crest factor reduction (CFR) system includes a digital tilt filter coupled to an input of the CFR system. In some embodiments, the digital tilt filter is configured to receive a system input signal and generate a digital tilt filter output signal at a digital tilt filter output. In some examples, the CFR system further includes a CFR module coupled to the digital tilt filter output, where the CFR module is configured receive the digital tilt filter output signal and perform a CFR process to the digital tilt filter output signal to generate a CFR module output signal at a CFR module output. In addition, the CFR system may include a digital tilt equalizer coupled to the CFR module output, where the digital tilt equalizer is configured to receive the CFR module output signal and generate a system output signal.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: September 10, 2019
    Assignee: XILINX, INC.
    Inventors: Christopher H. Dick, Hongzhi Zhao, Hemang M. Parekh, Xiaohan Chen
  • Patent number: 10411744
    Abstract: A method for transforming and reconstructing a signal includes receiving a plurality of samples of a waveform of the signal at different points in time. The waveform of the signal is transformed, for each sample, into an in-phase (I) component and a quadrature (Q) component. A derotational circuit applies a delayed complex conjugate multiple (DCM) to the signal to determine a constant product having an I component (Ic) and a Q component (Qc). A magnitude component is determined based on Ic and Qc. A delta phase component is determined based on Ic and Qc. The magnitude component is processed to create a processed magnitude component. The delta phase component is processed to create a processed delta phase component. An IQ waveform is created by reconstructing the waveform of the signal based on the processed magnitude component and the processed phase component.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: September 10, 2019
    Assignee: Ratheon Company
    Inventors: David B. Wilson, Loyra G. Dirzo, Jose A. Ruvalcaba
  • Patent number: 10411934
    Abstract: A superposition coded orthogonal frequency division multiplexing system which sets forth a comprehensive solution and deals with factors such as peak-to average power ratio (PAPR), error performance enhancement, data rate increase, synchronization or channel estimation and multi input and output (MIMO), using a joint system.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: September 10, 2019
    Assignee: ISTANBUL TEKNIK UNIVERSITESI
    Inventors: Selahattin Gokceli, Gunes Zeynep Karabulut Kurt
  • Patent number: 10411938
    Abstract: How to apply an Alamouti like space-time coding (or transmit diversity) to a Filter Bank Multicarrier (FBMC) transmission using Offset QAM (OQAM). In FBMC, due to the orthogonality in the real domain only, an intrinsic interference results thereof for the imaginary component. Simply adapting the Alamouti scheme to FBMC OQAM is not obvious since the intrinsic interference terms are not equivalent at each antenna since it depends on the surrounding symbols. The application proposes to use a precoding symbol chosen to cancel out (zero) the intrinsic interference individually for each antenna, ie a code rate of 1/2 (sending one data symbol requires two time units). A more elaborated embodiment proposes to choose the contiguous precoding symbols such that a virtual QAM Alamouti scheme is achieved, without rate loss.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: September 10, 2019
    Assignee: NTT DOCOMO, INC.
    Inventors: Petra Weitkemper, Katsutoshi Kusume, Jamal Bazzi, Mikio Iwamura
  • Patent number: 10404492
    Abstract: A device for mitigating a first group delay of a lowpass filter configured to lowpass filter a first channel coefficient of a set of channel coefficients with respect to time, includes a prediction filter configured to filter a data sequence derived from a lowpass filtered first channel coefficient to generate a prediction value of the lowpass filtered first channel coefficient; and an adjustment circuitry configured to adjust the prediction filter to generate the prediction value having a second group delay that is less than the first group delay.
    Type: Grant
    Filed: August 17, 2016
    Date of Patent: September 3, 2019
    Assignee: Intel IP Corporation
    Inventor: Michael Ruebsamen
  • Patent number: 10404518
    Abstract: The present application discloses a communications method and apparatus. The method includes: determining a radio frame, where the radio frame includes a period, the period includes at least one first sub-period and at least one second sub-period, the first sub-period corresponds to a first procedure, and the second sub-period corresponds to a second procedure; the first sub-period includes n first time slices, different beams are used in adjacent first time slices in the n first time slices, there is a first guard interval between the adjacent first time slices, and the second sub-period includes m second time slices; and at least one first time slice is adjacent to at least one second time slice and there is no guard interval between the at least one first time slice and the at least one second time slice that are adjacent to each other; and performing communication by using the radio frame.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: September 3, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Kun Zeng, Huang Huang, Guangjian Wang