Abstract: Automatic Gain Transimpedance Amplifiers for analog applications having high bandwidth, wide dynamic range, and ultra-high linearity. The transimpedance amplifiers includes an operational amplifier and a variable feedback resistance means connected between the input and the output of the amplifier. The variable feedback resistance means may include a single feedback PIN diode, two serially connected feedback PIN didoes, a PIN diode connected to a feedback resistor in parallel, or two serially connected PIN diodes connected to a feedback resistor in parallel. Ultra-high linearity is achieved because the dynamic resistance of the PIN diode under forward bias is substantially linearly dependent on the inverse of the current that passes the diode.

Abstract: A composite amplifier is constructed by connecting the respective input terminals of a high-frequency amplifier and a precision amplifier together and by connecting the output of the precision amplifier to the offset trim port of the high-frequency amplifier. The amplifiers are structured such than a pole in the frequency response curve of the high-frequency amplifier cancels a zero in the frequency response curve of the precision amplifier, thereby producing a single pole roll off response curve for the composite amplifier. In the preferred embodiment the high-frequency and precision amplifiers are formed on a single chip and the pole-zero match is therefore maintained at all conditions of temperature and other variables.

Abstract: An output stage (418) for an operational amplifier (403) powered by a first supply voltage rail (102) and a second supply voltage rail (104) includes a buffer (100) and a current booster (500) for amplifying an input voltage (105) into a low impedance output signal (117 and 520). The buffer (100) amplifies the input voltage (105) into the amplified output signal (117 and 520) when the input voltage (105) is within a buffer voltage range (210), the buffer voltage range (210) contained within a maximum voltage range (208) defined by a voltage difference in the first supply voltage rail (102) and the second supply voltage rail (104). The current booster (500) assists the buffer (100) in amplifying the input voltage (105) into the output signal (117 and 520) when the input voltage (105) is outside of the buffer voltage range (210) but within the maximum voltage range (208).

Abstract: To reduce the size and power dissipation of a feed-forward amplifier, two identical high power amplifiers in a quadrature combined configuration function both as the main amplifier and as the error amplifier. The feed-forward amplifier has two control loops to increase amplifier linearity and reduce intermodulation distortion. A first loop is provided to subtract a properly scaled and delayed sample of the amplifier input spectrum from a scaled and phase shifted sample of its output spectrum which contains intermodulation distortion. The result of this subtraction (if the samples are maintained at the same amplitude and 180 degrees out of phase) is a signal rich in the intermodulation products of the amplifier.

Abstract: A MOS transistor current mirror having a low output voltage is described. A first and second MOST's have their drains and gates connected respectively to form MOS diodes. The drain of the first MOST is connected to a control constant current source and the source of first MOST is connected to the drain of the second MOST. The drain and gate of the first MOST are connected to the base of a bipolar junction transistor (BJT). The collector of the BJT is connected to a first power supply line and the emitter is connected to the gate of a third MOST. A resistor is connected between the emitter of the BJT and the a second power supply line. The gate and drain of the second MOST is connected to the gate of a fourth MOST. The sources of the second and fourth MOST's are connected to the second power supply line. The drain of the fourth MOST is connected to the source of the third MOST. The drain of the third MOST is connected to external circuitry.

Abstract: An amplifier for providing a pole/zero compensated output signal by generating multiple pole/zero pairs at predetermined increasing frequencies, with the number of pole/zero pairs occurring at the increasing frequencies increasing geometrically. The amplifier includes three amplifier circuits cascaded in series to generate a first pole/zero pair at a predetermined frequency, and a second and a third pole/zero pair both generated at a second frequency two octaves above the first pole/zero pair. The first amplifier circuit configured to generate the first pole/zero pair and the second and third amplifier circuits each configured to generate the second and third pole/zero pairs. The relative spacing between each pole and its corresponding zero determines the amount of compensation performed.

Abstract: An amplifier having an inverting and a non-inverting input and at least one output is compensated by dynamically varying the transconductance of a gain stage in accordance with the gain of the output stage of the amplifier. The amplifier comprises a gain section having at least one output, where a gm of the gain section varies with a transconductance control signal. The amplifier further comprises an output stage comprising a output drive device controlled by an output of the gain section. A bias control circuit is coupled to drive the transconductance control input of the gain section, the bias control circuit increasing a differential mode transconductance of the first gain stage when the active pullup or pulldown output drive device has low gain.

Abstract: A low noise amplifier of the present invention may be useful to a portable cellular phone or a microwave communication system, particularly to a monolithic circuit in which the amplifier includes an input impedance component consisting of capacitors and an inductor, two MESFETs in a cascade connection and a capacitor connected between the two MESFETs so as to enhance the stability of the amplifier when a node strapping a plurality of ground terminals of the amplifier is connected to an external circuit by means of a bonding wire.

Abstract: An amplifier circuit with improved turn-on and turn-off transient operation includes an amplifier and a controller for controlling the amplifier output during initial and subsequent circuit turn-on and turn-off. The amplifier is biased by a positive power supply voltage and has a differential input driven by a reference voltage and a single-ended input signal. Where the output is single-ended, a single amplifier provides a single-ended output signal. Where the output is differential, the amplifier includes cascaded, differential input, single-ended output amplifiers which together provide a differential output signal. Following circuit turn-on and turn-off, the reference voltage, which drives one of each of the differential inputs, typically charges to or discharges from, respectively, a value of half of the positive power supply voltage.

Abstract: A transimpedance amplifier circuit includes an inverting voltage amplifier having an input being supplied with an input current and an output carrying an output voltage. A coupling member is connected between the input and the output of the voltage amplifier. The coupling member has two diodes being connected antiserially to one another between the input and the output of the voltage amplifier with a common node point. A transistor has a load path being connected between the common node point and a ground potential. A differential amplifier has one input connected to the input of the voltage amplifier, another input connected to the output of the voltage amplifier, and an output. A low-pass filter is connected downstream of the differential amplifier for furnishing a trigger signal at the output to the transistor.

Abstract: An output stage of an amplifier contains N-channel high-side and low-side transistors for producing an output current. The gate drive circuitry for the transistors includes an N-channel transistor having its gate connected in common with the gate of the low-side transistor to the output of a high-gain input stage amplifier, and having its drain connected to the gate of the high-side transistor. This structure reduces distortion at the crossover between positive and negative output voltages and improves control of the quiescent current. Avoiding a P-channel low-side transistor also reduces the area required for the amplifier on an IC chip and eliminates clipping during negative swings of the output voltage. A capacitive coupling stage is used to prevent clipping during positive swings of the output voltage. When the gate drive for the high-side transistor goes low, a capacitor charges through a diode.

Abstract: A high input impedance circuit includes an amplifier such as an operational amplifier comprising transistors of a first polarity which serve as a differential pair and input of the amplifier, base of one transistor being caused to serve as a positive input terminal, base of the other transistor being caused to serve as a negative input terminal. The high input impedance circuit further includes a transistor having base connected to the positive input terminal, and a second polarity opposite to the first polarity, wherein collector of the transistor of the second polarity is connected through d.c. path to a first power supply, e.g., ground, and emitter of the transistor of the second polarity is connected through d.c. path to a second power supply, e.g., power supply voltage terminal through a resistor to apply a signal in phase with an input signal delivered to the positive input terminal to the emitter of the transistor of second polarity to thereby allow input impedance to be higher.

Abstract: An integrated circuit includes an amplifier for amplifying input electric power having a predetermined frequency determined depending on an application and a series capacitor connected to an output side of the amplifier and becoming a conductive state with respect to the electric current having the predetermined frequency but an open state with respect to the electric current having a frequency that is an odd multiple of the predetermined frequency. In the integrated circuit, the frequency that is the odd multiple thereof is processed by only the capacitor.

Abstract: The invention relates to an amplifier for audio signals comprising a first (A.sub.1) and a second (A.sub.2) stage having a global feedback loop (B) between the output of the second stage and the input of the first stage, the second stage having a local feedback loop (B.sub.2) between its output and its input. Each feedback loop has a comparator element (C.sub.1). The amplifier comprises a means preventing the offset voltage present at the output of the first stage (A.sub.1) from being reinjected as input by feedback (in particular via the amplifier output). The local feedback loop (B.sub.2) is such that the second stage (A.sub.2) receives feedback at least continuously. The low frequency interference signals produced in the second stage (A.sub.2) are reduced by the feedback of the second stage (A.sub.2).

Abstract: The invention features an apparatus and technique for amplifying a signal without creating a phase error. The apparatus is an active device with a restricted band width selected to include desired frequencies of operation. The apparatus includes at least one amplifier with a local feedback loop, formed by a network, constructed and arranged to exhibit a high forward gain at the operating frequencies. The amplifier and the network are constructed and arranged to provide substantially 180 degree phase shift between an input voltage and an output voltage at the operating frequencies. The apparatus also includes a signal input node adapted to introduce the input voltage to the inverting input of the amplifier, a signal output node adapted to obtain the output voltage from the output of the amplifier, and a resistive global feedback loop that connects the signal input and signal output nodes and controls the closed loop gain of the amplifying apparatus.

Abstract: A regulated power supply control system with adjustable operating point and adjustable dynamic behavior for use with electronic power supply circuits, such as musical instrument amplifiers. The control system includes a measurement circuit (20) that generates a measured signal (22) based on an observed signal (18) in an amplifier (10); a sag control circuit (24) that generates a sag signal (32) based on the measured signal (22); a referenced circuit (34) that generates a static reference signal (38); and a regulator (44) that uses the static reference signal (38) and sag signal (32) to generate a regulated power supply output (14) that is used by the amplifier (10). The sag control circuit (24) permits adjustment of the sag signal 32 by a user-operated sag magnitude control (26), sag rate control (28), and sag recovery rate control (30).

Abstract: An integrated circuit terminator for a SCSI bus with resistors made of laser-blowable fuses in an array and a reference voltage source made with a bandgap generator and a two stage amplifier including a dummy isolation stage for providing symmetrical mismatch currents.

Abstract: A precision current mirror circuit eliminates current-loss on the mirror side, and ultimately causes the current source and output current to be the same. The circuit includes a signal input/output means for outputting a current mirror of an input signal, a current control means for controlling a current difference between the input signal and an output signal of the signal input/output, mean and a current amplifier which amplifies the current, as needed, to perform the current control.

Abstract: The present invention is an apparatus and method for detecting differential mode signals in an environment where differential mode signals co-exist, and might be corrupted by, common mode signals. The most basic apparatus of the present invention essentially comprises first and second input leads through which both differential mode and common mode signals are input; a first amplifier block having a gain that is substantially one; and at least an inverting node and a non-inverting node connected to the first and second input leads. The output of the amplifier block is fed back to the input of the non-inverting node of the amplifier block in a manner to increase differential mode impedance while maintaining a low common mode impedance. Various embodiments of the basic presently claimed circuitry provides for additional methods of monitoring the level of common-mode signal introduced to the apparatus and other fault detection functions.

Abstract: An amplifier circuit and method of providing diagnostic testing to a Wheatstone bridge amplifier circuit are provided herein. The amplifier circuit includes a balanced circuit such as a Wheatstone bridge employed in a piezoresistive transducer which produces a differential output signal. The amplifier circuit also includes an amplifier having a differential input for amplifying differential input signals. A diagnostic test circuit is coupled between the balanced circuit and the amplifier circuit and includes a pair of resistors with current sources which may be switched in via electronic switches. With the current sources switched in, a known offset voltage is applied across the differential input to the amplifier and the amplifier output is monitored and compared to an initial output signal. By comparing the initial output signal with the test signal, a determination as to the gain and other characteristics of the amplifier circuit can be made.