Abstract: An amplifying apparatus for linearly amplifying a desired signal using a pair of coupled non-linear amplifiers is disclosed. The amplifying apparatus comprises a limiter for separating amplitude variations from the desired signal and producing a constant amplitude signal bearing the phase of the desired signal and an amplitude related signal. In addition, a drive signal generater produces two drive signals each dependent on the constant amplitude signal and the amplitude related signal such that each drive signal depends on the phase of the desired signal and such that the sum of the squares of the amplitudes of the drive signals is constant. Finally, a coupler couples the two drive signals to produce two constant amplitude signals for driving the pair of non-linear power amplifiers and for coupling the outputs of the power amplifiers to produce two amplified output signals, one of which is the linearly amplified desired signal and the other of which is a waste energy signal.

Abstract: An improved heterojunction bipolar transistor power amplifier circuit providing an efficient and linear amplifier comprising: a first heterojunction bipolar transistor (HBT) having a base emitter voltage; a power supply; a power supply resistor connected to the power supply causing DC current to flow through the first HBT which develops a resultant voltage equal to the base emitter voltage of the first HBT; at least two manifold base resistors; at least two output HBTs, each of which receive the resultant voltage through its corresponding manifold base resistor; a RF signal input; at least two segmented capacitors, each coupled in parallel to receive the RF signal input and to the input of each corresponding output HBT; the segmented capacitors having a common input connected to the RF signal input and having individual outputs that are DC isolated from each other and which are connected to each output HBT; a RF output signal obtained from the parallel connection of the output HBTs; and provided that each HBT

Abstract: A method and device for measuring the switching noise of an audio amplifier by measuring the energy of the noise signal at the output of the audio amplifier as the amplifier is switched from one operating condition to another by a control signal, and after first weighing the energy according to the frequency and volume sensitivity of the human ear. The device comprises a control signal generator; an audio band filter connected to the output of the audio amplifier; a meter for measuring the power of the filtered signal; and an integrating element for calculating the energy of the filtered signal.

Abstract: A high speed integrated circuit operational amplifier chip having first, second, third and fourth successive edges includes a thermal centerline parallel to the second and fourth edges. An output driver circuit is located adjacent to an output bonding pad along the third edge and is disposed approximately symmetrically about the thermal centerline to provide approximately balanced differential heating of the operational amplifier chip relative to the thermal centerline. A low gain differential input circuit is located adjacent to the first edge and is disposed approximately symmetrically about the thermal centerline to provide approximately balanced responses of matched transistors in the low gain differential input circuit to isotherms produced by the differential heating.

Abstract: A high side current sense amplifier (21) comprises a first resistor, a second resistor, an amplifier (22), and a darlington transistor pair. The first resistor has a first input and a second input coupled to a non-inverting input of the amplifier (22). The darlington transistor pair has a collector coupled to the non-inverting input of the amplifier (22), a base coupled to an output of amplifier (22), an emitter. The second resistor is coupled between the emitter of the darlington transistor pair and ground. A differential voltage is applied across the first input of the first resistor and an inverting input of the amplifier (22). The darlington transistor pair converts an output voltage of the amplifier (22) to a feedback current for generating a voltage across the first resistor. Under stable conditions the voltage across the first resistor is equal to the differential voltage. The voltage gain is the ratio of the second resistor to the first resistor.

Abstract: An FET gate bias circuit having a Schottky barrier gate incorporated therein is provided which can prevent gate voltage variations and thus provide a high-performance, high-reliability GaAs FET amplifier. The FET gate bias circuit includes a PNP transistor having a collector connected to a negative power supply, an NPN transistor having a collector thereof grounded and an emitter connected to the emitter of the PNP transistor, a Schottky barrier gate FET having a source grounded and a gate connected to the node between the emitters of the PNP transistor and NPN transistor, and a base voltage applying circuit for applying predetermined base voltages to the respective bases of the PNP transistor and NPN transistor.

Abstract: A preamplifier and pre-emphasis network is provided having a differential plifier exhibiting common mode noise rejection. The preamplifier is particularly suited for use with a double-sided sensor element and it includes a double-sided, balanced calibration circuit. First and second variable gain buffers are joined to the differential amplifier for preventing current noise degradation at the differential amplifier inputs. A pre-emphasis network is further provided in conjunction with the variable gain buffers for providing balanced differential gain of the sensor element signal. Further elements of the invention provide for high and low pass filtering, and differential buffering of the output signal.

Abstract: A unity gain or buffer amplifier having a low offset voltage. The amplifier uses two emitter followers of different conductivity types (PNP and NPN) in an up-down emitter or voltage follower configuration to provide high input impedance and low output impedance. By using both PNP and NPN transistors in a current mirror, the base-emitter voltages of the input and output transistors are forced to be substantially the same, reducing the offset voltage. N- and P-channel MOSFETs can be substituted for the NPN and PNP transistors. Single ended and push-pull arrangements are shown.

Abstract: An electronic circuit incorporating an operational amplifier and a feedback network consisting substantially of a plurality, N+M, of substantially identical non-linear elements connected in parallel in two groups of N and M elements each to provide a linear feedback stabilized gain or attenuation.

Abstract: A high speed integrated circuit operational amplifier chip first, second, third and fourth successive edges includes a thermal centerline parallel to the second and fourth edges. An output driver circuit is located adjacent to an output bonding pad along the third edge and is disposed approximately symmetrically about the thermal centerline to provide approximately balanced differential heating of the operational amplifier chip relative to the thermal centerline. A differential input circuit is located adjacent to the first edge and is disposed approximately symmetrically about the thermal centerline to provide approximately balanced responses of matched transistors in the low gain differential input circuit to isotherms produced by the differential heating. The most thermally sensitive transistors are disposed along or symmetrically about the thermal centerline to provide approximately balanced response by such transistors to differential heating by the output driver circuit.

Abstract: A self-configurable, dual bridge, power amplifier has a window comparator sensing the level of input signals fed to the amplifier which-drives a plurality of configuring switches capable of configuring the amplifier as a single bridge amplifier driving a first and a second loads connected in series or as two distinct bridge amplifiers each driving one of the two loads. As long as the two levels of the input signals remain comprised between a range defined by a negative voltage reference and a positive voltage reference, the amplifier is configured as a single bridge driving the two loads in series, thus reducing sensibly power dissipation. Several embodiments of the configuring means are shown.

Abstract: An AB class stage is described which comprises two complementary MOSFET final transistors connected in a push-pull manner between two supply terminals. In order to attain high linearity, low switching distortion, a high ratio between the maximum output current and the rest current, independence of the rest current from the temperature and manufacturing variables and a circuit simplicity, the circuits determining the rest current and those which provide current to the load are substantially independent of one another. More particularly, two transconductance amplifiers are provided which control the final transistors and are dimensioned so as to have zero output current in rest conditions, two voltage generators which determine the rest current and two resistors being connected between the gate electrodes of the final transistors and the supply terminals.

Abstract: An amplifying circuit includes a low gain amplifier having positive and negative inputs and an output. A high impedance path provided by, for example, a low gain unity buffer amplifier feeds from the negative input to the output of the amplifier a first voltage (KV.sup.+) equal to a second voltage (V.sup.+) at the positive input of the amplifier multiplied by the reciprocal of the open loop gain (A.sub.OL) of the amplifier. This circuit simulates a unity gain buffer amplifier having a high input impedance and a high open loop gain using a low open loop gain amplifier and a feed forward arrangement. The use of a low gain amplifier avoids the need for large area transistors and the resultant large parasitic capacitances and so facilitates high speed operation.

Abstract: An all digital switching amplifier wherein linearization of the power switch is accomplished solely by using three states. A small, fixed width, bi-state compensating carrier waveform is added to the leading or training edges of an oversampled main input pulse producing a compensated composite waveform. This compensating carrier linearizes output from a power switch by effecting common mode cancellation of switch time errors. Output pulse width combinations for the compensating carrier are obtained from a look-up table stored in memory. A correction mechanism is implemented to correct for harmonic distortion that is dependent on the modulation level or index and results from the compensating carrier modulation. The correction mechanism applies the inverse of the modulation induced distortion to the oversampled compensated composite input signal to null distortion products resulting from the modulation scheme used to apply the small carrier to linearize the performance of the tri-state power switch.

Abstract: A microwave amplifier for amplifying microwave signals, such as the microwave signals received by a microwave repeater station. The amplifier is formed of solid state amplifier-transistors to which the microwave signals are applied by way of transmission lines. The amplification circuitry and transmission lines are formed upon a circuit board which is housed within a heat-dissipative housing. The amplifier can be used in substitution for a conventional travelling wave tube, conventionally utilized to amplifier microwave signals received at a microwave repeater station.

Abstract: An amplifier includes an output buffer having an input coupled to a gain node which is the common node of the outputs of first and second current mirrors for receiving a signal current and having an output for providing an amplified drive current. The output buffer includes a first transistor of a first type having its base coupled to a gain node of the output buffer and to the base of a first transistor of a second type for receiving the signal current. The emitter of the first transistor of a first type is coupled to the base of a second transistor of a second type. The emitter of the first transistor of the second type is coupled to the base of a second transistor of the first type. The emitter of the second transistor of the first type is coupled to the emitter of the second transistor of the second type and to the output of the buffer.

Abstract: A semiconductor current follower and method using a copy of the input current from a current mirror to insure that the input impedance remains a virtual ground for both unidirectional and bidirectional signals.

Abstract: A system for increasing the power efficiency of a balanced amplifier driven antenna arrangement includes a push-pull class B power amplifier circuit which is responsive to a periodic, time varying input signal and generates at least two output signals in response thereto. The arrangement also includes a balanced antenna exhibiting a relatively high impedance at the second harmonic of the input signal. The arrangement further includes at least one transmission line operatively coupled between the power amplifier circuit and the balanced antenna to provide the at least two output signals to the balanced antenna. The at least one transmission line has a length which is one-eighth of the wavelength of the input signal or odd multiples thereof, and thereby reflects back to the power amplifier circuit a substantially short circuit at the second harmonic of the input signal.

Abstract: A converter for converting a single-ended input V.sub.IN to a differential output signal V.sub.OUT through positive and negative output terminals is disclosed. The converter comprises a fully differential amplifier with one of its input terminals coupled to the single-ended input and its other input terminal coupled to a fixed voltage. The converter also has a first resistor ("R.sub.1 ") coupled between the single-ended input and the positive input terminal of the fully differential amplifier, a second resistor ("R.sub.2 ") coupled between the fixed voltage and the negative input terminal of the fully differential amplifier, a third resistor ("R.sub.3 ") coupled between the positive input terminal and the negative output terminal of the fully differential amplifier, and a fourth resistor ("R.sub.

Abstract: The apparatus includes output stage amplifiers for receiving the respective outputs of preamplifiers provided in correspondence to the left and right channels in a stereo system. Negative feedback circuits are provided in the respective output stage amplifiers for reducing the amount of low-band negative feedback. Switch circuits are turned on in response to feedback signals from the respective negative feedback circuits for supplying the feedback signals at the input to the output stage amplifiers.