Patents Examined by James B. Mullins
  • Patent number: 5565813
    Abstract: A low voltage differential amplifier 10 or comparator is accomplished by providing an differential amplifier 10 that includes a transistor bias simulator 32 and a capacitance circuit 36. The transistor bias simulator 32 matches the gate to source bias voltage of the load transistor 22 and provides this value to the capacitance circuit 36. The capacitance circuit 36, which is coupled to a biasing reference voltage 38, charges a capacitor 84 based on the difference between the biasing reference voltage 38 and the simulated bias voltage 34. This charged capacitor 86 is used during an auto-zeroing phase to bias the drain to source voltage of the load transistor 22 to a state at which it is just beyond the onset of saturation.
    Type: Grant
    Filed: May 15, 1995
    Date of Patent: October 15, 1996
    Assignee: Motorola Inc.
    Inventors: Lawrence E. Connell, Neal W. Hollenbeck
  • Patent number: 5565815
    Abstract: A balanced current amplifier mirrors either a fully differential or single ended input signal into common output circuits in a manner to generate a fully differential output signal without any d.c. bias. Input signal nodes are maintained at a desired voltage by circuit elements other than those of the current mirror circuits, thus freeing the current mirroring elements from having to be sized for this purpose. The sizes of the output transistors are adjustable in order to set the gain of the circuit. In addition to amplifier circuits, a full-wave rectifier, a comparator, and a filter, all operating with current signals, are described. A single circuit module may include all of these circuits with a user provided the capability to program the module to perform any one or more of these functions.
    Type: Grant
    Filed: May 24, 1994
    Date of Patent: October 15, 1996
    Assignee: IMP, Inc.
    Inventor: Hans W. Klein
  • Patent number: 5561396
    Abstract: A transconductance (g.sub.m) control circuit for bipolar or CMOS rail-to-rail input stages is provided. The g.sub.m is controlled by the use of multiple input pairs and can be used in CMOS or bipolar technology. In CMOS the g.sub.m -control works regardless of the operating region of the MOS transistor, whether it is weak, moderate or strong inversion.
    Type: Grant
    Filed: April 27, 1995
    Date of Patent: October 1, 1996
    Assignee: Philips Electronics North America Corporation
    Inventors: Ronald Hogervorst, Johan Huijsing, John P. Tero
  • Patent number: 5561395
    Abstract: A method and apparatus (100) is for providing self adjustment of a multistage radio frequency power amplifier (RFPA) (200). The apparatus (100) includes a transmit input stage (150) and a controller (110). Included in the multistage RFPA (200) are N RFPA stages (201) coupled in parallel to an N-way RF splitter (210) and to an N-way RF combiner (220), and a power sense stage (225) which generates a forward power sense signal (167). Each of the N RFPA stages (210) includes an adjustable power amplifier (PA) (300). The controller (110) optimizes a gain match and a phase match of the multistage RFPA (200) by adjusting signals which are coupled to each adjustable PA (300). The adjustments are made in response to the forward power sense signal (167) while the controller (110) controls the test input stage (150) which generates a predetermined test signal (155).
    Type: Grant
    Filed: January 27, 1995
    Date of Patent: October 1, 1996
    Assignee: Motorola, Inc.
    Inventors: John R. Melton, Joseph G. Schultz, Terence E. Sumner
  • Patent number: 5559472
    Abstract: An amplifier includes an amplifier input and an amplifier output. A gain cell is coupled between the amplifier input and the amplifier output and provides gain. The gain cell includes an input device to the amplifier input for reducing input capacitance and resistive losses, and an output device coupled to the amplifier output for reducing output resistive losses. The gain cell can further include a feedback device coupled to the gain cell output for stabilizing the gain cell. The gain cell input includes a common-collector bipolar transistor and the gain cell output includes a common-base bipolar transistor in series with a common-emitter bipolar transistor. Because of the low input and output resistive losses and a low input capacitance, the gain cell can be incorporated into a distributed amplifier having numerous stages without decreasing gain or bandwidth performance.
    Type: Grant
    Filed: May 2, 1995
    Date of Patent: September 24, 1996
    Assignee: TRW Inc.
    Inventor: Kevin W. Kobayashi
  • Patent number: 5559471
    Abstract: An amplifier contains an RF generated negative supply wherein the RF input of the negative generator is connected to the RF input of a first power amplifier stage. This arrangement allows the power supplies to be turned-on in the correct order, thus, avoiding any damage to the transistors or power supply. After the RF input turns on and the RF generated negative supply turns on, the power amplifier transistors are biased such that no current will flow from the drain to the grounded source. The power amplifier also features the ability to adjust the biasing voltage by increasing Vcontrol so that the bias current from the main supply can be controlled. Since the output power of the amplifier is monotonic with biasing current over the useful range of gate voltages, the output power can thereby be controlled by adjusting the control voltage. Additionally, the negative biasing voltage can be increased to the point where bias current from the main supply is at the correct level to achieve the desired output power.
    Type: Grant
    Filed: December 21, 1994
    Date of Patent: September 24, 1996
    Assignee: Motorola, Inc.
    Inventor: Gregory R. Black
  • Patent number: 5557239
    Abstract: The present invention relates to a direct current offset compensating circuit for compensating a DC offset value of an output audio signal in an audio processing system, so that the offset becomes perfectly zero balanced. This perfect zero balance is accomplished by dually detecting the offset of the output audio signal at an output terminal of the audio system. In the direct current offset compensating circuit, the DC offset of the output audio signal is detected and compensated for by using a feedback signal. The DC offset is detected and controlled with the feedback signal so that the DC balance is maintained at DC level of zero. Accordingly, tone quality of the high-grade amplifier is improved by eliminating distortion caused by the DC offset of the audio signal, where the DC offset arises from asymmetry between the positive and negative power values of the output signal.
    Type: Grant
    Filed: May 1, 1995
    Date of Patent: September 17, 1996
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Gibo Masao
  • Patent number: 5554957
    Abstract: A balanced current amplifier mirrors either a fully differential or single ended input signal into common output circuits in a manner to generate a fully differential output signal without any d.c. bias. Input signal nodes are maintained at a desired voltage by circuit elements other than those of the current mirror circuits, thus freeing the current mirroring elements from having to be sized for this purpose. The sizes of the output transistors are adjustable in order to set the gain of the circuit. In addition to amplifier circuits, a full-wave rectifier, a comparator, and a filter, all operating with current signals, are described. A single circuit module may include all of these circuits with a user provided the capability to program the module to perform any one or more of these functions.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 10, 1996
    Assignee: IMP, Inc.
    Inventor: Hans W. Klein
  • Patent number: 5554959
    Abstract: A linear power amplifier having a pulse density modulated switching power supply comprising: power supply means for connection to a source of electrical power and adapted to provide (i) a first, relatively high DC voltage, and (ii) a second, relatively low DC voltage; voltage amplifying means for connection to a signal source and adapted to amplify a first, relatively low voltage signal received from the signal source into a second, relatively high voltage signal; current amplifying means connected to the voltage amplifying means and adapted to increase the current flow of the second, relatively high voltage signal, as needed, in order to properly drive a load, wherein the current amplifying means are normally powered by the second, relatively low DC voltage supplied by the power supply means; and pulse generating means connected to the line carrying the second, relatively high voltage signal to the load, and to the line supplying power to the current amplifying means, the pulse generating means being adapted
    Type: Grant
    Filed: October 25, 1994
    Date of Patent: September 10, 1996
    Assignee: VAC-com, Inc.
    Inventor: Engne Tang
  • Patent number: 5550512
    Abstract: A method for providing DC offset trim for automatic gain controls independent of temperature or gain. A DC trim current is added or subtracted from one side of the differential AGC circuit. The trim current balances the currents through the two halves of the differential circuit, eliminating DC offset at the AGC output. The trim current is derived from a current source that is dependent upon another current source that provides the current through the two halves of the differential circuit. Therefore, the trim current responds to any changes in the current supplied to the differential AGC circuit. Thus, DC offset trim independent of temperature or gain, as well as reduction of the total harmonic distortion and direct DC coupling of signals between stages, is provided.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: August 27, 1996
    Assignee: Silicon Systems, Inc.
    Inventor: Kiyoshi Fukahori
  • Patent number: 5550510
    Abstract: A differential amplifier having two complementary differential pairs connected for rail-to-rail common mode input voltage range operation including a constant transconductance maintaining bias circuit is disclosed. The bias circuit provides a fixed rail current bias to a master differential pair and adjusts the bias to the second pair in response to variations in the bias level of the master pair. A unique biasing method and method of operating a differential amplifier are also disclosed.
    Type: Grant
    Filed: December 27, 1994
    Date of Patent: August 27, 1996
    Assignee: Lucent Technologies Inc.
    Inventor: Krishnaswamy Nagaraj
  • Patent number: 5546050
    Abstract: A bus leveling system for automatically monitoring and maintaining the amplitude of a radio frequency (RF) signal carded on a bus. A two-stage variable gain amplifier (64) is connected in series with the bus. Each stage of the variable gain amplifier is constructed with a PIN diode (84, 86) in a feedback path of the stage. The amplification of the variable gain amplifier is varied by the injection of current into the feedback path to adjust the resistance of the PIN diodes. A control circuit having an RE detector (78) is provided to monitor and adjust the gain generated by the variable gain amplifier. Preferably, the control circuit and the variable gain amplifier are incorporated into an Application Specific Integrated Circuit (ASIC) (62). The RF detector is constructed of two Gilbert multipliers (202, 204) to minimize errors caused by operating condition changes, including variations in power supply voltage, temperature, or process.
    Type: Grant
    Filed: March 14, 1995
    Date of Patent: August 13, 1996
    Assignee: The Boeing Company
    Inventors: Michael H. Florian, Harold J. Redd, David R. Hogue, Rodney K. Bonebright
  • Patent number: 5546049
    Abstract: A relatively high power active gain device, such as MESFET or similar transistor, has distributed impedance characteristics at relatively high RF (microwave) frequencies of operation due to physical device size limitations. A transmission line segment (104) is placed in relatively close spacial relationship and is coupled in parallel electrical relationship with the input port (162) of the high power active device. This provides for highly simplified design of an impedance prematched amplifier (100) over a relatively broad range of predetermined input signal center frequencies. An active device (102) is provided based on power requirements and is characterized over a range of center frequencies and device sizes independently from the characterization of the transmission line segment (104) over a range of center frequencies and segment lengths, since the impedance characteristics of the active device (102) and the transmission line (104) are not dependent upon each other.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: August 13, 1996
    Assignee: Hughes Aircraft Company
    Inventors: Cheng P. Wen, Cheng-Keng Pao
  • Patent number: 5546047
    Abstract: An operational amplifier (10) having an inverted output (20) ranging from a return voltage up to a rail supply voltage includes an amplifying stage (12) and: a linear output inverter (14). The linear output inverter (14) includes an inverting pull down stage (16), an output stage controller (17), and a pull up output stage (18). The inverting pull down stage (16) operates to pull the inverted output down to the return voltage when the inverted output is below a first threshold. The pull up output stage (18) operates to pull the inverted output up to the rail voltage when the inverted output (20) is above a second threshold. The first threshold is greater than the second threshold such that both the inverting pull down stage (16) and the pull up output stage (18) operate when the inverted output (20) lies between the first threshold and the second threshold.
    Type: Grant
    Filed: February 27, 1995
    Date of Patent: August 13, 1996
    Assignee: Motorola, Inc.
    Inventors: Joseph Y. Chan, Mathew A. Rybicki
  • Patent number: 5543760
    Abstract: A direct current voltages detecting circuit is provided for monitoring output voltage of the power amplifier. A direct current signal is produced when a direct current voltage is detected. A cutoff circuit responds to the direct current signal and renders an output stage of the power amplifier a cutoff state. A failure determining circuit is provided to respond to the direct current signal and to produce an abnormality signal. In response to the abnormality signal, a power supply cutoff circuit operates to cutoff a power supply of the power amplifier.
    Type: Grant
    Filed: March 3, 1994
    Date of Patent: August 6, 1996
    Assignee: Pioneer Electronic Corporation
    Inventors: Jun Honda, Kunihiro Miyata
  • Patent number: 5543759
    Abstract: An audio amplification circuit includes a ganged pair of logarithmic potentiometers, each potentiometer of the pair having an input terminal, an output terminal, and a wiper terminal. The input terminals of each potentiometer are adapted for connection to an audio input signal from an audio device such as a microphone. A preamplifier stage having an input is connected to the wiper terminals of both logarithmic potentiometers. An amplification stage has a matched pair of operational amplifiers with each operational amplifier having an input connected to the output of the preamplifier stage. Each operational amplifier has a feedback loop which includes the resistance of at least one of the logarithmic potentiometers between the output terminal and the wiper terminal of said logarithmic potentiometer. The outputs of the matched pair of operational amplifiers constitute the outputs of the amplification stage. The outputs may be daisy-chained together, and a floating output stage is also provided.
    Type: Grant
    Filed: April 7, 1995
    Date of Patent: August 6, 1996
    Assignees: Digital Lab Studios, LLC, Horizon Music, Inc.
    Inventors: Richard J. Comeau, II, Richard Fay
  • Patent number: 5541553
    Abstract: An amplifier which performs the function of switching on and off its output signal includes an inverted Darlington circuit made up of an input transistor and an output transistor, a first switching circuit connected across the base and the emitter of the output transistor, and a second switching circuit connected between the emitter of the input transistor and the collector of the output transistor. Amplifier also includes means for opening the first switching circuit and closing the second switching circuit to send out an output signal, and for closing the first switching circuit and opening the second switching circuit to stop the output signal. The input and output transistors may be fabricated using vipolar or MOSFET technology because current of a small magnitude flows through the switching circuits, the switching circuits can be formed from elements that are small in size and which have small parasitic capacitance.
    Type: Grant
    Filed: March 6, 1995
    Date of Patent: July 30, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Norio Chujo, Yoshihiko Hayashi, Akio Osaki
  • Patent number: 5541554
    Abstract: An amplifier (100) has first and second operation modes. The amplifier (100) includes an amplifier input portion (110) and an amplification gain stage. The amplification stage has two gain paths (120, 140) coupled in parallel to the amplifier input portion (110). At least one of the gain paths (120) has an amplification component (121) that in part forms a switch to select between the first and second operation modes.
    Type: Grant
    Filed: March 6, 1995
    Date of Patent: July 30, 1996
    Assignee: Motorola, Inc.
    Inventors: Robert E. Stengel, Scott A. Olson
  • Patent number: 5537080
    Abstract: A high power radio frequency amplifier employs a power stage in which a bank of push-pull stages are connected in parallel. These power stages employ relatively low-cost high voltage MOSFETs. Because the devices are operated in their active regions, these MOSFETs are susceptible to drops in gain during operation due to heating of the transistor die. The gain fluctuation has a first, slower component that varies over a time of several minutes, and a second, faster component that varies over a span of seconds. The amplifier has B+ or drain voltage control to compensate for short-term (minutes) gain degradation and preamplifier gate voltage control to compensate for short-term (seconds) gain degradation.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: July 16, 1996
    Inventors: Yogendra K. Chawla, Bradford J. Lyndaker
  • Patent number: 5534820
    Abstract: In signal processing circuitry using active devices, non-linearity of the device causes distortion of pure tones and the generation of intermodulation products for more complex signals. The transfer characteristics of such active devices may be considered as the accumulated characteristics of input and output filter stages separated by a non-linear region. To compensate for non-linearities and reduce intermodulation products, a drive circuit comprises pre- and post-correction filters separated by a compensating amplifier. The frequency response of the pre-correction filter corresponds to that of the input filter stage but is reversed in the frequency spectrum; with conventional I.F. the transfer characteristic of the amplifier and frequency response characteristic of the post-correction filter are the respective complements, of those of the non-linear region and pre-correction filter.
    Type: Grant
    Filed: December 16, 1994
    Date of Patent: July 9, 1996
    Assignee: British Broadcasting Corporation
    Inventors: George I. F. Tupper, Anthony C. Allegranza, Phillip J. Doherty