Patents Examined by James B. Mullins
  • Patent number: 5789981
    Abstract: A high-gain, low-power transconductance amplifier suitable for use in switched-capacitor circuits provides improved accuracy and high-speed operation. The transconductance amplifier includes an input circuit that receives an input voltage. A current mirror circuit is coupled to the input circuit. At least one active cascode circuit, coupled to the current mirror circuit, receives current from the current mirror circuit and provides an output current. The active cascode circuit provides gain enhancement to the transconductance amplifier by increasing the output impedance of the transconductance amplifier.
    Type: Grant
    Filed: April 26, 1996
    Date of Patent: August 4, 1998
    Assignee: Analog Devices, Inc.
    Inventors: Lawrence Singer, Todd L. Brooks
  • Patent number: 5789982
    Abstract: Circuits and methods to minimize total harmonic distortion in an integrated circuit feedback amplifier. Complementary transistors in the signal path are selected so that their base-to-collector capacitances are matched. Additionally, the DC operating currents of such transistors are matched, thereby cancelling non-linearities due to base-to-collector capacitances.
    Type: Grant
    Filed: September 11, 1996
    Date of Patent: August 4, 1998
    Assignee: Harris Corporation
    Inventors: Gabriel J. Uscategui, Glenn Wells
  • Patent number: 5789980
    Abstract: An amplifier and a semiconductor device according to the present invention are operated at a low voltage and decreased in size and problems such as a noise and an oscillation phenomenon. The amplifier and semiconductor device each includes a first bias generation circuit for generating first and second bias voltages when V1.gtoreq.V2, where V1 is the power supply voltage and V2 is the lower limit of the operation limiting voltage, and for outputting a zero potential when V1<V2, a first amplification circuit for amplifying an input signal by the first bias voltage and for opening an output terminal by the zero potential, a second amplification circuit of a push-pull type operated in response to the input signal and the output signal of the first amplification circuit, and a second bias generation circuit for supplying a bias current to the second amplification circuit by the zero potential when V2>V1.gtoreq.
    Type: Grant
    Filed: January 28, 1997
    Date of Patent: August 4, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mitsuru Nagata, Mariko Terada
  • Patent number: 5786731
    Abstract: A complementary Class AB output stage including a Class AB complementary common emitter quiescently biased by means of current mirrors and a Class AB complementary emitter follower circuit having its emitters connected to the common emitter stage outputs and its collectors connected to the base terminals of the common emitter transistors thus achieving large output swing and large output drive current with very low quiescent current in the common emitter portion of the circuit.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: July 28, 1998
    Assignee: National Semiconductor Corporation
    Inventor: James E. Bales
  • Patent number: 5786727
    Abstract: A power amplifier (10) provides linear amplification of noise-like multi-carrier signals over a wide range of power levels. A power divider (40) divides an input signal for distribution in three amplifier networks (70, 72, 74) for selective amplification based upon input signal levels. Each amplifier network (70, 72, 74) is biased to respond when the efficiency of the previous stage diminishes. Successive staging of amplifier networks (70, 72, 74) broadens the efficiency bandwidth of power amplifier (10). A combiner (28) merges output signals from each successive amplifier networks to provide an improved efficiency output to a power amplifier (10) load.
    Type: Grant
    Filed: October 15, 1996
    Date of Patent: July 28, 1998
    Assignee: Motorola, Inc.
    Inventor: Bernard Eugene Sigmon
  • Patent number: 5786728
    Abstract: The invention is related to a balanced cuber based predistortion circuit for predistorting an input signal (v.sub.in), comprising a squarer (11) to produce a second order signal and signal dividing means (10', 14') for dividing the input signal and second order signal into differential signals. To produce a third order signal, the input signal and second order signal are mixed in multipliers (15, 16) and the output signals of the multipliers are combined in order to eliminate undesired components. According to the invention, the squarer also includes differential signal handling and combining means (12, 13), advantageously a push-push frequency doubler to produce a second order signal using differential signals. The phase (17) and amplification (18) of the third order signal are adjusted in order to produce a distortion compensation signal, and the input signal (v.sub.in) and distortion compensation signal are combined (19) to produce a predistorted output signal (v.sub.1).
    Type: Grant
    Filed: June 27, 1996
    Date of Patent: July 28, 1998
    Assignee: Nokia Mobile Phones, Ltd.
    Inventor: Petteri Alinikula
  • Patent number: 5786730
    Abstract: An amplifier circuit (1) is arranged to amplify a signal of variable magnitude from a photodiode (3) having capacitive characteristics. The circuit (1) comprises a first feedback path containing a voltage controlled variable resistor (8) for varying the gain of the amplifier in relation to the magnitude of the signal so as to provide an output signal of substantially uniform magnitude. The first feedback path also contains a capacitor (7) which compensates for adverse effects of reactance in the circuit caused by the capacitance of the photodiode (3) and of the variable resistor (8) in order to optimize the frequency response characteristics of the amplifier. A second feedback path comprising a fixed value resistor (9) becomes operable when the resistance of the first feedback path is large to provide fixed gain amplification of signals received from the photodiode (3).
    Type: Grant
    Filed: November 6, 1996
    Date of Patent: July 28, 1998
    Assignee: Stewart Hughes Limited
    Inventor: Maxwell Richard Hadley
  • Patent number: 5781072
    Abstract: An amplifier circuit (30) has the capability for driving a large number of loads while still maintaining the desirable gain response. The amplifier circuit (30) includes two push-pull amplifier circuits (31 and 41). A first push-pull amplifier circuit (31) has a pair of bipolar transistors (33 and 34) connected in a cascode circuit configuration and a second pair of bipolar transistors (35 and 36) connected in a cascode circuit configuration. In addition, the second push-pull amplifier circuit (41) has a first pair of bipolar transistors (43 and 44) connected in a cascode circuit configuration and a second pair of bipolar transistors (45 and 46) connected in a cascode circuit configuration. The channel distortion and gain response of the amplifier circuit (30) are significantly improved by the push-pull amplifier circuits (31 and 41).
    Type: Grant
    Filed: September 20, 1996
    Date of Patent: July 14, 1998
    Assignee: Motorola, Inc.
    Inventor: Robert S. Kaltenecker
  • Patent number: 5781067
    Abstract: An electronic inductive switching power amplifier designed for but not limited to amplification of electrical audio signals consists of a power conversion system, a signal control system together with a direct current power source wherein the power conversion system comprising of a pulse width modulator circuit, primary semiconductor switches and a high frequency switching transformer wherein the direct current power source is pulse width modulated through primary winding on the switching transformer by the primary semiconductor switches being controlled by the pulse width modulator. The switching transformer further comprises of a secondary winding wherein the primary to secondary winding ratio effects the required power conversion and amplification.
    Type: Grant
    Filed: April 26, 1996
    Date of Patent: July 14, 1998
    Inventor: Tasleem Tota
  • Patent number: 5781071
    Abstract: A transformer and an amplifier exhibiting a small lowering in self resonance frequency and having a large mutual inductance. By forming a first flat coil 12A, 31C, 86A, 96A, 102A on the semiconductor substrate surface 11A with the pattern wiring of any conductor and forming a second flat coil 12A, 31A, 31B, 86B, 96B, 102A, 102B along the pattern wiring of the first flat coil 12A, 31C, 86A, 96A, 102A on the insulator layer surface 13A spaced by an insulator layer having a predetermined thickness with the pattern wiring of any conductor, a large mutual conductance can be obtained and further a power amplification based on the class-B push-pull operation can be carried out by forming an amplifier 45, 75, 81 with the aid of a 5-terminal first output transformer 30.
    Type: Grant
    Filed: December 8, 1995
    Date of Patent: July 14, 1998
    Assignee: Sony Corporation
    Inventor: Shigeo Kusunoki
  • Patent number: 5781066
    Abstract: A waveform generator is provided having a power divider for dividing power from a signal source fed thereto to a plurality of output terminals. A plurality of amplifiers is provided. A plurality of switches, each one thereof being coupled to a corresponding one of the plurality of amplifiers couples the power at the plurality of output terminals to a power combiner through a selected one, or ones of the plurality of switches and the corresponding one, or ones of the amplifiers coupled thereto, in accordance with control signals fed to the plurality of switches. A controller is provided having a shift register section. The shift register section has a plurality of successively coupled storage stages, each stage providing one of the control signals for a corresponding one of the plurality of switches.
    Type: Grant
    Filed: March 11, 1996
    Date of Patent: July 14, 1998
    Assignee: The Mitre Corporation
    Inventors: Samuel J. Parisi, Edward D. Ostroff
  • Patent number: 5781068
    Abstract: A transadmittance amplifier provides an output current that is proportional to an input voltage level. The output current drives a coil of an electric motor (the load) through a sense resistor, the voltage drop across the sense resistor providing an indication of the amount of current flowing through the coil. The indication provided by the sense resistor is applied across the differential input terminals of a feedback amplifier, which responds by outputting a feedback signal proportional to the output current. In one embodiment, the maximum output current is increased by providing a pair of complementary drive amplifiers.
    Type: Grant
    Filed: March 14, 1996
    Date of Patent: July 14, 1998
    Assignee: Nikon Corporation
    Inventor: Mark K. Takita
  • Patent number: 5777518
    Abstract: A MOSFET amplifier device is biased to exhibit a substantially constant transconductance over a range of variations in power supply, temperature and process. A bias circuit includes a pair of MOS field effect devices, one of which is biased in a triode operating region with a constant reference drain-to-source terminal voltage and with a constant first reference drain-to-source terminal current. The other field effect device is biased in saturation by a circuit that derives a gate-to-source terminal bias voltage from the gate terminal voltage of the first device and the first reference voltage. A second reference current flows into the drain terminal of the second device, and a corresponding bias current is derived, for example, by mirroring the second reference current. The mirrored reference current is used to bias a MOS amplifier device, to maintain a substantially constant transconductance over the mentioned range of variations.
    Type: Grant
    Filed: October 30, 1996
    Date of Patent: July 7, 1998
    Assignee: Lucent Technologies Inc.
    Inventor: James A. Bailey
  • Patent number: 5777512
    Abstract: A signal processing circuit is provided which includes a frequency selective network in a feedback loop for noise shaping purposes. A sampling analog-to-digital converter in the feedback loop operates at a sample frequency substantially above the Nyquist frequency. A switching device is driven by the sampling analog-to-digital converter and produces a continuous-time output signal which is continuously monitored by and fed back to the frequency selective network for noise and distortion correction in the feedback loop. This is in contrast to traditional techniques which employ only state feedback. State feedback (i.e., digital or sampled) of the output of the analog-to-digital converter may also be employed in combination with the continuous-time feedback of the switching device output.
    Type: Grant
    Filed: June 20, 1996
    Date of Patent: July 7, 1998
    Assignee: Tripath Technology, Inc.
    Inventors: Adya S. Tripathi, Cary L. Delano
  • Patent number: 5777513
    Abstract: A voltage amplifier AD comprising two transistors (Q1, Q2) arranged as a differential pair, having collectors which are connected to a positive power supply terminal (VCC) by means of two branches each comprising a resistive load. One of the branches comprises at least two resistive elements (R21, R22) arranged in series. The amplifier AD is also provided with a third branch comprising a resistive element (R3) arranged in series with a current source (I3). The amplifier AD is also provided with means for comparing the potentials of the different nodes of the circuit, which means allow addition of a first and a second current (IO, IO') to the current supplied in a portion of the resistive load of the second branch. These currents allow rectification of the non-linearity of the evolution of the output voltage (Vout) as a function of the input voltage (Vin).
    Type: Grant
    Filed: November 25, 1996
    Date of Patent: July 7, 1998
    Assignee: U.S. Philips Corporation
    Inventor: Benoit Guyot
  • Patent number: 5777517
    Abstract: The semiconductor amplifier circuit provided with frequency characteristics excellent in both band width and flatness is disclosed. The amplifier circuit comprises: an input section (10) including: a first inversion amplifier circuit (11) for inversion-amplifying an input signal; and a feedback circuit (15) of a field effect transistor having a grounded gate, a source for receiving a feedback signal, and a drain connected to an output terminal of the first inversion amplifier circuit; a first level shift circuit (20) for shifting level of an output of the input section; a second inversion amplifier circuit (30) for inversion-amplifying an output of the first level shift circuit; and a second level shift circuit (40) for shifting level of an output of the second inversion amplifier circuit. Here, the amplifier circuit is characterized in that the output of the second level shift circuit (40) is applied to the feedback circuit (15) as the feedback signal.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: July 7, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Toshiki Seshita
  • Patent number: 5774016
    Abstract: An amplifier system is disclosed. The amplifier system includes a plurality of input terminals and a plurality of amplifier channels. It further discloses switching means for selectably connecting each of the plurality of input terminals to each of the plurality of amplifier channels when the input terminal is active, prioritizing means for prioritizing the connection of each of the plurality of input terminals to each of the plurality of amplifier channels and control means for controlling the switching means in accordance with the means for prioritizing the connection so that for each amplifier channel, the active input terminal with the highest priority is connected to the amplifier channel. Also disclosed are means for limiting the output level of each amplifier channel in accordance with the input terminal that is connected to the amplifier channel.
    Type: Grant
    Filed: April 9, 1996
    Date of Patent: June 30, 1998
    Assignee: Bogen Corporation
    Inventor: Ernest R. Ketterer
  • Patent number: 5774020
    Abstract: A bipolar or MOS OTA is provided, in which no S/N degradation occurs due to compression and expansion of a signal, and low voltage operation can be realized at a power supply voltage of approximately 2 V for the input voltage range of approximately 1 V peak-to-peak or greater. This OTA includes a first differential pair of first and second transistors respectively driven by first and second current sources or sinks. A first resistor is connected to emitters or sources of the first and second transistors. A differential input signal is applied across these emitters or sources. This OTA further includes a second differential pair of third and fourth transistors. A second resistor is connected to emitters or sources of the third and fourth transistors. A current path is connected to the emitters or sources of the third and fourth transistors, thereby allowing a current to flow through the second resistor.
    Type: Grant
    Filed: October 15, 1996
    Date of Patent: June 30, 1998
    Assignee: NEC Corporation
    Inventor: Katsuji Kimura
  • Patent number: 5774021
    Abstract: Operational transconductance amplifiers (OTAs) are combined at their outputs, yielding a single frequency compensation connection point. In a preferred embodiment, the output of each OTA is asymmetric, i.e., they can only source current and the OTA outputs are tied together to a constant current sink. Consequently, the OTA that sources more current controls the voltage of the merged output. This merged output point provides a voltage output that may be used as a frequency compensation point.
    Type: Grant
    Filed: October 3, 1996
    Date of Patent: June 30, 1998
    Assignee: Analog Devices, Inc.
    Inventors: Thomas S. Szepesi, Joseph C. Buxton, Zoltan Zansky, Derek F. Bowers
  • Patent number: 5770974
    Abstract: The present invention solves the gain, noise figure, and distortion problems of prior art thermal compensation circuits by incorporating a temperature-compensating circuit in the feedback loop of a transistor amplifier arrangement. Using this method, the insertion loss is reduced as the gain of the amplifier varies proportionately to the temperature. This method has a negligible effect on the noise figure and distortion, and the incremental cost is much lower than the conventional circuits. Furthermore, the present invention can be used in both single-ended or push-pull dual amplifier configurations.
    Type: Grant
    Filed: June 3, 1996
    Date of Patent: June 23, 1998
    Assignee: Scientific-Atlanta, Inc.
    Inventors: Stephan W. Vogt, John W. Brickell, Alfredo Acosta