Abstract: Disclosed is an operational amplifier having a positive input terminal, a negative input terminal, an output terminal, a positive power supply input and a negative power supply input. The operational amplifier includes a transistor input pair being coupled to the positive input terminal and the negative input terminal. A first charge pump being coupled to positive supply circuitry contained within the operational amplifier. The first charge pump being configured to operate the positive supply circuitry contained within the operational amplifier at an enhanced positive power supply. The operational amplifier further includes a second charge pump being coupled to negative supply circuitry contained within the operational amplifier. The second charge pump being configured to operate the negative circuitry contained within the operational amplifier at an enhanced negative power supply. Accordingly, the transistor output pair provides an essentially full rail-to-rail output.

Abstract: An operational amplifier includes a differential amplifier including a first transistor (120) and a second transistor (122), a gain stage (125), a first folded cascode stage (104) and a second folded cascode stage 106, and a first telescopic stage (108) and a second telescopic stage (110). The folded cascode stages respond to current in the differential amplifier to control the output signal, and the telescopic stages respond to a differential voltage produced by the gain stage to control the output signal.

Abstract: A multi-stage low power, high dynamic range variable gain amplifier comprises an input stage cascaded with one or more current amplifier stages, whereby the gain of each stage may be independently controlled. The input stage may be comprised of a variable transconductance amplifier using variable emitter degeneration. The current amplifier may be comprised of a differential Darlington amplifier coupled to a differential cascode amplifier. The transconductance amplifier converts an input voltage signal to a current signal. The variable gain amplifier is designed for efficient low power operation.

Abstract: A feed forward amplifier (200) comprises a main signal path (201), an error signal path (203), and a third signal path (205). In the preferred embodiment of the present invention, the third signal path (205) comprises a gain and phase adjuster (245), delay circuitry (249), summing circuitry (251), and an error cancellation detector (255). The third signal path (205) is designed to match passive components in a component section (207) of the main signal path (201) to the error signal path (203). Gain and phase adjustments are made by the gain and phase adjuster (235) to minimize the RSSI of the error components within the input signal (253).

Abstract: An amplifier system includes a constant current unit which produces a constant current in response to a source voltage from a source voltage terminal. An emitter follower unit has a base, an emitter and a collector, an input signal being supplied to the base, the emitter being connected to the constant current unit, the source voltage being supplied to the collector, the emitter follower unit producing an output signal at the emitter in response to the input signal. A current regulating unit regulates the constant current in response to a collector current fed into the collector of the emitter follower unit, so that the constant current is fed from the emitter of the emitter follower unit into the constant current unit.

Abstract: An amplifier circuit (20) having independent gain and response time adjustments includes an amplifier (22), a response time resistor (30), a variable gain resistor (32) attached to the response time resistor and to an output of the amplifier (22), a response time capacitor (34) connected in parallel to the response time resistor (30), an anti-gain resistor (36) connected to a response time (30) and variable gain resistor (32) and to ground, and an input resistor (38) connected to the response time resistor (30) and to in input terminal of the amplifier (22). The response time resistor has a substantially greater resistance value than a resistance value of the variable gain resistor (32) for allowing a gain adjustment of the amplifier circuit (20) without changing the response time of the amplifier (22).

Abstract: A fast, open-loop amplifier for an electronic measuring system is formed by a folded, differential, open-loop amplifier. This amplifier includes a differential common-source portion, a current mirror portion and a load portion. The current mirror portion is connected between the differential common-source portion and the load portion. The load portion is connected to a common voltage supply portion. The fast, open-loop amplifier can include multiple stages, where each stage includes the folded, differential, open-loop amplifier. In this case, each stage can have its own common voltage supply portion. Alternatively, a single common voltage supply portion can be shared between the stages. All the transistors of the differential common source portion and the load portion have the same type of doping, while all the transistors of the current mirror are the same type of doping, but of a type which is different than that used in the differential common source amplifier portion and the load portion.

Abstract: The input branch of the current mirror is responsive to a single input signal current and each output branch of the current mirror mirrors the input signal current to produce an output current proportional to (e.g., substantially equal to) the input signal current. In one embodiment, the input branch has an input mirror MOS transistor connected to a threshold voltage generator, the output branch has an output mirror MOS transistor connected in cascode to an output cascode MOS transistor, and all of the transistors operate in saturation. The threshold voltage generator may be implemented in different ways, including using four MOS transistors forming two current paths, such that, in one current path, two transistors have channel constants of X and 4X, respectively, and, in another current path, two transistors both have channel constants of A, which may be different from X.

Abstract: A system (100 or 200) includes a first AGC stage (102) having a programming input and a gain input. A second AGC stage (104 or 210 and 234) is coupled in a common path with the first AGC stage, the second AGC stage having a programming input and a gain input. The first and second AGC stages are programmed by respective programming signals to produce independent gain characteristics responsive to a common gain signal at their respective gain inputs.

Abstract: A low noise amplifier structure based on a Differential Difference Amplifier (DDA1) having a differential output (outp, outn) and two differential pairs of input terminals (N1, P1; N2, P2). The input signal (V.sub.IN) is applied to terminals (N2, P1) which belong to different differential pairs. In this way, none of the differential pairs receives a high input signal, and hence none of them cause unacceptable harmonic distortion. The dynamic input range is thus high. The gain of the structure is determined by a resistive circuit (R2a, R2a'; R2b, R2b') coupled to the remaining terminals (N1, P2) of the differential pairs. The common mode of these remaining terminals (N1, P2) is, independently from the output common mode, biased at the input common mode via a common mode feedback circuit (DDA2; GL1, GH1, GH3, R2a, R2a'; GL2, GH2, GH4, R2b, R2b') based on a second differential difference amplifier (DDA2).

Abstract: A cost-effective conditioning circuit for extracting a weak, floating, wide-band signal with a low common-mode voltage from noisy environments is proposed that includes a high gain single ended operational amplifier to increase the amplitude of the signal. A simple, cost-effective approximately unity gain differential amplifier stage is used to level-shift the signal down to the desired reference potential. A typical application is a motor drive system, where the signals to be measured are bi-directional motor currents.

Abstract: A Built-In Self-Test (BIST) circuit and test method are employed for automated testing of a programmable analog gain stage. The BIST circuit and operating method advantageously use the natural redundancy of a multiple-channel circuit for detecting circuit faults. More specifically, the BIST circuit utilizes the natural redundancy of the identical signal paths for multiple-channel, such as stereo, audio operation. A left channel and a right channel ideally function identically so that a fault in one channel of the left channel and the right channel signal paths is detected by mutually comparing the operation of the two channels.

Abstract: An RF power amplifier system is provided including a plurality of the DC voltage sources of different magnitudes. An RF source provides an RF drive signal. N RF actuatable power amplifiers are provided. Each amplifier, when actuated, is connectable to a selected one of the voltage sources for providing an RF output signal amplified in accordance with the magnitude with the selected voltage source. One or more of the N RF power amplifiers are actuated in dependence upon the value of an input signal. One of the voltage sources is selectively connected to each of the actuated RF power amplifiers. The amplified RF output signals are additively combined to provide a combined RF output signal.

Abstract: An impedance matching, reducing, or buffering circuit for permitting smooth signal flow from a first transmission medium to a second transmission medium. The circuit provides a first node adapted for coupling to the first transmission medium and for receiving a signal from the first transmission medium. The circuit further provides a buried channel transistor, that is coupled to the first node and that is biased by additional circuit devices, for transforming the impedance imposed on the signal. The use of the buried mode transistor reduces noise on the surface of the transistor while at the same time keeps other performance standards high. The circuit additionally provides a second node that is coupled to the buried channel transistor and that is adapted for coupling to the second transmission medium for conveying the signal to the second transmission medium.

Abstract: A power amplifier circuit (200) for amplifying a radio frequency (RF) signal received at an input (208) into an amplified RF signal at an output (210) includes a coupler circuit (222, 122), a second input (206), a power amplifier (218), and a level shifter (228). The coupler circuit (222, 122) is coupled to the output (210) to detect a level of the amplified RF signal. The second input (206) receives a control signal derived from the detected level. The power amplifier (218) includes a transistor (234/236) having a gate (238/240) coupled to the input (208) and a drain (242/244) coupled to the output (210). The level shifter (228) is coupled to the second input (206) and the gate (238/240) and, responsive to the control signal, supplies a biasing voltage (VGG) to the gate (238/240). The level shifter (228) includes circuitry (255) to minimize temperature sensitivity of the biasing voltage (VGG).

Abstract: A cathode-follower power output stage is driven by a novel drive stage to provide with low distortion the large signal required to drive the output stage. The drive stage comprises two series connected vacuum tubes which share the large static and dynamic voltages of the drive stage so as to provide a drive signal having a large voltage swing, without generating audible distortion and without subjecting the drive stage tubes to excessively high voltages. The plate of a first drive tube is connected to the cathode of the second drive tube. A load impedance is connected from a B+ power supply terminal to the plate of the second drive tube. The grid of the second drive tube is driven by a signal responsive voltage divider network driven by the plate of the second drive tube.

Abstract: A low-voltage multipath-miller-zero-compensated operational amplifier is disclosed which includes a class AB front stage and a class AB back stage. The front stage has an inverted input, a non-inverted input, an inverted output, and a non-inverted output. The back stage has an output and input, which input is connected to the non-inverted output of the front stage. The output of the back stage is connected to the inverted output of the front stage. A capacitor is coupled in a feedback loop between the output and inverted input of the back stage. An operational amplifier in accordance with the present invention is particularly well-suited for use in switched-capacitor filters, continuous-time filters, microwave medical applications and general purpose amplification applications.

Abstract: A reference buffer suitable for driving switched-capacitor or resistive load circuits provides a very low output impedance. The reference buffer utilizes an amplifier with a very large and controlled transconductance configured in feedback and compensated by a load capacitance. Cascaded gain stages are used to provide a large, controlled transconductance. In one embodiment, a reference buffer amplifier includes a plurality of voltage gain amplifiers connected in cascade and at least one transconductance amplifier connected to a last-connected of the plurality of voltage gain amplifiers. The amplifier may further include at least one current mirror amplifier connected to the at least one transconductance amplifier. In another embodiment, the reference buffer amplifier includes at least one transconductance amplifier and at least one current mirror amplifier cascade-connected to the at least one transconductance amplifier. The amplifiers can be differential or single-ended.

Abstract: A filter circuit comprises three stages 260, 270, 280, each having a differential input and a differential output. The output of stage 260 serves as the input of stage 270 and the output of stage 270 serves as the input of stage 280 respectively. Stage 260 comprises two transistor pairs 201, 202 and 203, 204. An input signal is applied to the base electrodes of transistors 201, 204 which causes a current change in their opposite transistor 202, 203. Transistors 202, 203 have their respective base and collector electrodes connected together. The collector electrodes of transistors 202, 203 constitute the output of stage 260. Stages 270 and 280 have essentially the same structure as stage 260. The arrangement offers high frequency capabilities from a low supply voltage. In another embodiment, a cut-off frequency is varied under control of controllable current sources.

Abstract: A high gain, low voltage differential amplifier exhibiting extremely low common mode sensitivities includes a load element exhibiting a high differential resistance, but a low common mode resistance. The load element contains a positive differential load resistance and a negative differential load resistance, which offsets the positive differential load resistance. The output common mode level of the differential amplifier is one p-channel source to gate voltage drop below the power supply voltage prohibiting the common mode output voltage from drifting far from an active level. The differential amplifier also has application for use in a differential charge pump circuit. The high differential impedance of the differential amplifier allows the attainment of extremely small leakage, while a low common-mode impedance results in simplified biasing.