Patents Examined by James Kerveros
  • Patent number: 6525544
    Abstract: A total injected electron quantity QBD, which has reached a constant value against a variation in stress voltage applied to an insulating film for use in a semiconductor device, is obtained as a critical injected electron quantity QBDcrit. The total injected electron quantity QBD is a total quantity of electrons injected into the insulating film before the film causes a dielectric breakdown. Thereafter, a time it should take for a total quantity of electrons, injected into the insulating film under actual operating conditions of the device, to reach the critical injected electron quantity QBDcrit is estimated as the expected lifetime of the insulating film.
    Type: Grant
    Filed: February 15, 2001
    Date of Patent: February 25, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kenji Okada
  • Patent number: 6522147
    Abstract: A manually operable test switch useful for testing of inverter units installed in fluorescent lighting fixtures, the inverter units providing an emergency lighting capability to the lighting fixtures on interruption of usual mains AC power and the test switch providing an ability to test the condition of the inverter units during normal maintenance activity. Operation of the test switch shorts an LED carried by a housing of the switch, the housing also being formed integrally with an adjustable toothed connector for mounting the test switch to a portion of the lighting fixture.
    Type: Grant
    Filed: May 24, 2001
    Date of Patent: February 18, 2003
    Assignee: Acuity Brands, Inc.
    Inventors: Paul Kenneth Pickard, Edward Roger Adams
  • Patent number: 6522122
    Abstract: A signal to be measured is waveform-formatted to a square waveform that retains the frequency, duty ratio and jitter component of the original signal, and the leading (or trailing) edge of the waveform-formatted output is sampled by a sampling clock of a frequency slightly different from 1/N of the frequency fM of the signal to be measured. The samples are converted by an A/D converter to digital data Vn(t), which is stored in a memory. The difference between the stored digital data Vn(t) and the rise-up characteristic line V′(t) is calculated to detect jitter J′n(t).
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: February 18, 2003
    Assignee: Advantest Corporation
    Inventors: Toshifumi Watanabe, Akihiko Ando, Yuichi Miyaji
  • Patent number: 6522153
    Abstract: A method for the quick classification of structured inner and/or outer surfaces of heat exchanger tubes by means of Doppler radar spectroscopy. The measured variables are determined from the frequency spectra. Surface integral A, average value m and variance S (or standard deviation &sgr;={square root over (S)}) correlate directly with the geometric parameters of the structure morphology. They permit direct conclusions regarding the heat transfer characteristics (evaporation/condensation performance) of the respective structure, in particular no tube samples ready for use are needed for the heat transfer classification.
    Type: Grant
    Filed: May 22, 2001
    Date of Patent: February 18, 2003
    Assignee: Wieland-Werks AG
    Inventors: Gert Mueller, Joachim Riedle, Wolfgang Mueller
  • Patent number: 6518767
    Abstract: In a power line current differential protection system, all three phase current values (IA, IB and IC) are obtained from both the local end and the remote end of a power transmission line. The magnitude of the ratio of the remote current values to the local current values are calculated. Also, the angle difference between the local and the remote current values for each phase are calculated. Comparison elements then compare the ratio and angle values against preselected values which establish a restrain region in the current ratio plane. Current values which result in the ratio being within the region do not result in a tripping signal for the circuit breaker on the power transmission line, while current values which result in a ratio outside of the region result in a tripping of the circuit breaker. Similar circuitry is used for negative sequence current quantities, with the negative sequence preselected values being set substantially lower to produce a more sensitive response to possible faults in the line.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: February 11, 2003
    Assignee: Schweitzer Engineering Laboratories, Inc.
    Inventors: Jeffrey B. Roberts, Gabriel Benmouyal, Hector Altuve-Ferrer, Ralph Folkers, Demetrios Tziouvaras
  • Patent number: 6518778
    Abstract: Methods are included for determining deviations from &phgr;=0° in test resonators based on the quasi-pure modes' displacement ratio variations with &phgr; angle. A direct relationship between deviation from &phgr;=0° and the c-mode displacement ratio has been observed, so that the larger the deviation from &phgr;=0°, then the larger is the change in the normalized frequency of the c-mode upon immersion in, or contact with, a fluid. The method includes measuring &thgr; and &phgr; angles in reference resonators with different small &phgr; angles and quasi-pure mode frequencies of reference resonators in both air and a test fluid at ambient temperatures, calculating the normalized frequency changes between the air and fluid measurements as a reference point, measuring the test resonator in air then in the fluid and comparing the results.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: February 11, 2003
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: John R. Vig, Arthur Ballato
  • Patent number: 6518783
    Abstract: According to an example embodiment of the present invention, a semiconductor die having a buried insulator layer between a circuit side and a back side is selectively thinned. During thinning, a selected portion of the bulk silicon layer on the back side is removed and a void created. A circuit is formed in the void and is coupled to the existing circuitry on the circuit side of the die. The new circuit is used to analyze the die during operation, testing, or other conditions. The newly formed circuit enhances the ability to analyze the semiconductor die by adding flexibility to the traditional analysis methods used for integrated circuit dice. The newly formed circuit enables many new ways of interactively using the existing circuitry some of which include replacement of defective circuitry, modification of existing circuit operations, and stimulation of existing circuitry for testing.
    Type: Grant
    Filed: May 23, 2001
    Date of Patent: February 11, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jeffrey D. Birdsley, Michael R. Bruce, Brennan V. Davis, Rosalinda M. Ring, Daniel L. Stone, Rama R. Goruganthu
  • Patent number: 6518771
    Abstract: A method of monitoring contact burnoff in tap changers operating under load in which the load current is measured and for nominal variation of the voltage of the particular tap parameters are stored which are used to calculate the burnoff rate per contact per switching operation. From these values the cumulative burnoff rate of both the switching contact and resistance contact are determined and compared with limits or threshold values.
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: February 11, 2003
    Assignee: Pharmacia & Upjohn Company
    Inventors: Rainer Frotscher, Dieter Dohnal
  • Patent number: 6515493
    Abstract: A method and apparatus for determining the endpoint of a planarization process during chemical mechanical planarization (CMP) and more specifically for determining endpoint of a planarization process for a thin metal film deposited on a wafer's surface and/or a method of altering the plating and deplating of the thin metal film during the planarization process. The apparatus includes one or more probes embedded in a working surface. The probes are in electrical communication with the thin film on the wafer's surface as it is planarized against the working surface. The probes measure the thickness of the thin metal film and/or induce a current in the thin metal film to adjust the plating and deplating that occurs during the planarization process.
    Type: Grant
    Filed: April 12, 2000
    Date of Patent: February 4, 2003
    Assignee: SpeedFam-IPEC Corporation
    Inventors: John A. Adams, Thomas F. A. Bibby, Jr.
  • Patent number: 6512361
    Abstract: A circuit tester for both 14-volt and 42-volt automotive electrical systems includes a housing with a probe tip at one end and a ground connector at the other end. A battery-powered voltage detection circuit in the housing includes a plurality of comparators, each having one input connected to an input signal from the probe tip and a reference input connected to a tap of a tapped voltage divider providing plural reference signals having amplitudes respectively corresponding to industry-standard voltage levels, the comparators being arranged in two groups respectively corresponding to 14-volt and 42-volt automotive systems. Series-connected LEDs have their cathodes respectively connected to the outputs of the comparators, and are arranged for respectively being viewed through apertures in the housing arranged in two separate rows. The interconnections are such that only one LED at a time is illuminated, i.e.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: January 28, 2003
    Assignee: Snap-on Technologies, Inc.
    Inventor: Thomas P. Becker
  • Patent number: 6509744
    Abstract: The invention relates to a method and a device for measuring the distance between a sensor electrode and a workpiece. The sensor electrode forms, with the workpiece, a measuring capacitor through which an alternating current flows. A voltage present at the sensor electrode is tapped as a measuring voltage. In order to be able to remove the disturbing influence on the impedance of the measuring capacitor of a plasma forming between the sensor electrode and workpiece, the real part and the imaginary part from the measuring voltage are analyzed and used to determine the distance between the sensor electrode and the workpiece.
    Type: Grant
    Filed: February 16, 2000
    Date of Patent: January 21, 2003
    Assignee: precitec GmbH
    Inventors: Stephan Biermann, Georg Spörl
  • Patent number: 6509740
    Abstract: Methods and apparatus for determining the location of a fault or another region of interest in an electrical conductor such as an electrical cable. A preselected electrical signal is applied to the electrical conductor and a reflected signal produced thereby is generated. The reflected signal is compared to a plurality of preselected voltage values and time values are recorded representing times at which the voltage of the reflected signal crosses the preselected voltage values. Mathematical algorithms are applied using the recorded time and voltage values first to locate a suspected knee region in the reflected signal, then to confirm the presence of the knee within the suspected knee region. The location of the knee in the reflected signal is then used to calculate the distance to the fault or other region of interest. A further series of time values is recorded within the suspected knee region and used to more precisely determine the true location of the knee in the reflected signal.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: January 21, 2003
    Assignee: Jovial Test Equipment, Inc.
    Inventors: Dave Needle, Stan F. Shepard
  • Patent number: 6507202
    Abstract: A sensed-pressure-data converter having a circuit for reducing a fluctuation of the output due to a fluctuation of a resistance and a resistance changing characteristic of a pressure sensitive resistance element and for reducing the output offset and offset drift of the pressure sensitive resistance element. The converter of the invention comprises a pressure sensitive resistance element (1), and a controller (2). The controller is an electric circuit connected to the pressure sensitive resistance element for detecting the electric characteristic of the element and includes A/D converters (3, 4), a D/A converter (6), and a memory (5). The controller compensates the electric characteristic due to a resistance change of the pressure sensitive resistance element and issues it from the D/A converter (6).
    Type: Grant
    Filed: April 3, 2001
    Date of Patent: January 14, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kiyotaka Sasanouchi, Susumu Nishimoto, Norimitsu Kurihara
  • Patent number: 6501259
    Abstract: The analog phase frequency detecting apparatus includes the devices described below. The first frequency sensitive device is used to amplify a first input signal with a gain function, which changes responding to the frequency of the reference input signal. The transfer characteristic curve of the first frequency sensitive device includes a monotonous decrease (or increase) curve. The second frequency sensitive device is utilized to amplify an oscillating signal with the varying gain function responding to the frequency of the oscillating signal. The first and the second DC component extracting device is used to extract the direct current component of the first and the second amplified input signal. The comparing device is used to generate a frequency locking signal, in addition, the phase detecting device generates a phase locking signal when the phase of the reference input signal is equal to that of the oscillating signal.
    Type: Grant
    Filed: October 26, 2000
    Date of Patent: December 31, 2002
    Assignee: Industrial Technology Research Institute
    Inventor: Ting-Yuan Cheng
  • Patent number: 6501283
    Abstract: A circuit configuration for measuring the capacitance of structures in an integrated circuit having a test structure and a reference structure, includes first and second series circuits, each having two transistors connected in series and connected in parallel between supply terminals each providing one supply potential. The test structure is connected to a coupling node of the transistors of the first series circuit. The reference structure is connected to a coupling node of the transistors of the second series circuit. The supply terminals of the series circuits are connected to a controllable voltage source. A voltage-dependent differential capacitance measurement can be carried out on the test structure by using the circuit configuration.
    Type: Grant
    Filed: January 16, 2001
    Date of Patent: December 31, 2002
    Assignee: Infineon Technologies AG
    Inventors: Jürgen Lindolf, Stefanie Schatt
  • Patent number: 6498497
    Abstract: A microfluidic controller and detector system and method for performing screening assays are disclosed. The microfluidic controller and detector system comprises a fluidic chip that includes at least two intersecting channels and a detection zone, a fluid direction system comprising an electrical interface configured for electrical contact with the at least two intersecting channels, an optics block having an objective lens disposed adjacent the detection zone, and a control system coupled to the optics block and adapted to receive and analyze data from the optics block. The electrical interface generally includes electrodes configured for electrical contact with the intersecting channels and coupled to electrode channels for supplying electrical input to the electrodes. A reference channel is optionally provided to calibrate the electrode channels.
    Type: Grant
    Filed: August 13, 1999
    Date of Patent: December 24, 2002
    Assignee: Caliper Technologies Corp.
    Inventors: Calvin Y. H. Chow, Morten J. Jensen, Colin B. Kennedy, Michael M. Lacy, Robert E. Nagle
  • Patent number: 6496017
    Abstract: Apparatus and method for measuring an antenna signal strength (X). The apparatus includes a first amplifier section (3) for receiving an antenna signal and having a first automatic gain control stage; a second amplifier section (8) having a second automatic gain control stage; an automatic gain control system (12; 16′) for generating automatic gain control signals (VRF AGC, VIF AGC) for the first and second amplifier sections in accordance with a delayed automatic gain control scheme with a take-over-point. In order to measure the antenna signal strength, the take-over-point is automatically shifted towards the actual antenna signal strength.
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: December 17, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Janardhana Bhat
  • Patent number: 6495999
    Abstract: A magnetic field is measured with the aid of the Faraday effect. Light is coupled into a Faraday element subjected to the magnetic field, the light having a linearly polarized first component at a first wavelength and an unpolarized second component at a second wavelength different from the first. A light signal is coupled out of the Faraday element and is split optically into a first light signal component with the first wavelength and a second light signal component with the second wavelength. A first measurement signal is derived from the first light signal component and a second measurement signal is derived from the second light signal component and these are used to form a corrected measurement signal S. In this way, attenuation influences in the transmission paths can be largely compensated for, even when measuring a magnetic field which is constant over time or a magnetic field with a component which is constant over time.
    Type: Grant
    Filed: August 14, 2000
    Date of Patent: December 17, 2002
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ottmar Beierl, Thomas Bosselmann
  • Patent number: 6492821
    Abstract: A system and method are disclosed for detecting the occurrence of an external event. The system eliminates the need for users to adjust amplifier offsets as well as detection thresholds by continually analyzing the signal and optimizing the offset and threshold values accordingly. Additionally, the system detects the external events in a noisy environment when the duration of the events vary by several orders of magnitude by employing cascaded difference filters.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: December 10, 2002
    Assignee: Banner Engineering Corporation
    Inventors: Lawrence J. Marko, Brian P. Rosengren, Neal A. Schumacher
  • Patent number: 6492799
    Abstract: An electrical monitor circuit in which star points of taps on a first and a second side of a three-phase current limiting device are voltage compared. Possible applications are combinations with electrical switches, especially for power supplying and protecting circuits for electrical motors.
    Type: Grant
    Filed: February 14, 2001
    Date of Patent: December 10, 2002
    Assignee: ABB Research Ltd
    Inventors: Erkki Rajala, Ralf Strümpler, Timo Jokiniemi