Abstract: A non-volatile semiconductor memory device has a NAND string, in which multiple memory cells are connected in series. A read procedure is performed for a selected memory cell in the NAND string on the condition that the selected memory cell is applied with a selected voltage while unselected memory cells are driven to be turned on without regard to cell data thereof. In the read procedure, a first read pass voltage is applied to unselected memory cells except an adjacent and unselected memory cell disposed adjacent to the selected memory cell, the adjacent and unselected memory cell being completed in data write later than the selected memory cell, and a second read pass voltage higher than the first read pass voltage is applied to the adjacent and unselected memory cell.

Abstract: The invention relates to an assembly comprising a main device and an accessory, which can be connected by a safe connector and a safe detection method. According to the invention, the assembly comprises: —a main device (2), —an accessory (3) connectable to the main device (2), —the accessory (3) comprising an accessory connector (4) for mating with a device connector (5) of the main device (2), —the accessory connector (4) and the device connector (5) each comprising one or more supply contacts (7) for transmitting electric power from the main device (2) to the accessory (3), —the main device (2) comprising a detection device (9), which, if connecting the accessory (3) to the main device (2), receives complex accessory data stored by the accessory (3) and which by positive evaluation of the complex data enables applying a supply voltage at the one or more supply contacts (7) of the device connector (5).

Abstract: A system and method for dynamic RAID geometries. A computer system comprises client computers and data storage arrays coupled to one another via a network. A data storage array utilizes solid-state drives and Flash memory cells for data storage. A storage controller within a data storage array is configured to configure a first subset of the storage devices for use in a first RAID layout, the first RAID layout including a first set of redundant data. The controller further configures a second subset of the storage devices for use in a second RAID layout, the second RAID layout including a second set of redundant data. Additionally, when writing a stripe, the controller may select from any of the plurality of storage devices for one or more of the first RAID layout, the second RAID layout, and storage of redundant data by the additional logical device.

Abstract: An electronic apparatus controls a peripheral device by using a relay apparatus. The electronic apparatus includes an interface connected to the peripheral device; a communication unit that performs communication with the relay apparatus; a receiver that receives a control signal for controlling the electronic apparatus; and a controller that, when the control signal is received, performs an operation based on the control signal, and controls the communication unit to transmit information about the performed operation and information about the peripheral device to the relay apparatus in order to control the peripheral device to perform an operation that corresponds to the performed operation.

Abstract: In electronic equipment device 1, a limitation level on reading an access level to selectively control the ability to read data from a USB flash drive (storage device) 2 is set to a setting section by an access level setting unit 3 in advance. The USB flash drive 2 ascertains the setting at the setting section 3 access level when the USB flash drive is connected to the electronic equipment 1 and limits reading data based on the determined setting device. If the limitation access level does not match with the condition for permitting data read-out as determined in USB flash drive 2 permit the reading of data, the USB flash drive 2 prohibits the electronic equipment 1 device from reading out data from a memory 24 of the USB flash drive by removing an application of power from the external device to the memory. By executing the processing for limiting data read-out at the side of the USB flash drive 2, unauthorized leakage of data can easily be prevented.

Abstract: Systems and methods for estimating a time to cool down or warm up a building zone from a temperature setback condition are provided. A described method includes determining, by a controller for the building zone, at least one of a cooling demand for the building zone and a heating demand for the building zone for a time period corresponding to the temperature setback condition. The method further includes estimating a return time using at least one of the cooling demand and the heating demand. The return time is the time to cool down or warm up the building zone from the temperature setback condition.

Abstract: Methods and apparatus for operating a communication system comprising three or more communication transceivers. In illustrative embodiments, multiple unique start-of-packet delimiters are maintained. A data packet to be transmitted is constructed using a specified one of the plurality of start-of-packet delimiters to demarcate the start of said data packet. The chosen start-of-packet delimiter reflects one or more transceivers that are intended recipients of said data packet. When a data packet is received by a transceiver, the start-of-packet delimiter of the received data packet is compared to one or more valid start-of-packet delimiters for the receiving transceiver. If the start-of-packet delimiter of the received data packet matches a valid start-of-packet delimiter for the receiving transceiver, the data packet is accepted, otherwise it is rejected.

Abstract: A system and method for permuting known and unknown message bits before encoding to provide a beneficial rearrangement of bits. Such a method can improve distance properties in the resulting subcode. In various embodiments, the structure of a beneficial rearrangement is dependent on the parameters of how known and unknown bits are grouped and on the specific type of code being used. Given these two parameters, the message bits can be rearranged to more efficiently leverage any apriori knowledge.

Abstract: A three-dimensional (3D) flash memory includes a first dummy word line disposed between a ground select line and a lowermost main word line, and a second dummy word line of different word line configuration disposed between a string select line and an upper most main word line.

Abstract: Exemplary embodiments relate to methods, systems, and storage mediums for managing content storage and selection activities. The method includes aggregating content from content providers and presenting the content to a content device. The method also includes monitoring consumption of storage space with respect to storage capacity in the content device, relocating content contained in the storage space of the content device when a predetermined condition is met, and providing access to relocated content. The relocation is operable for freeing up the storage space of the content device.

Abstract: According to one embodiment, a semiconductor device includes a first voltage generator, a second voltage generator, a first MOS transistor, and a controller. The first voltage generator outputs a first voltage to a first node. The second voltage generator outputs a second voltage to a second node. The first MOS transistor is capable of short-circuiting the first node and second node. The controller performs a control operation to short-circuit the first node and second node by turning on the first MOS transistor. The controller controls a period in which the first MOS transistor is kept in an on state based on time.

Abstract: A method of testing a semiconductor device includes providing a first wafer that includes a first surface, a second surface that is allocated at an opposite side of the first surface, a first electrode penetrating the first wafer from the first surface to the second surface, and a pad formed on the first surface and coupled electrically with the first electrode, providing a second wafer that includes a second electrode penetrating the second wafer, stacking the first wafer onto the second wafer to connect the first electrode with the second electrode such that the second surface of the first wafer faces the second wafer, probing a needle to the pad, and supplying, in such a state that the first wafer is stacked on the second wafer, a test signal to the first electrode to input the test signal into the second wafer via the first electrode and the second electrode.

Abstract: According to one embodiment, an information processing apparatus includes a storage device, a volatile memory, and a processor. The storage device includes a controller, a first nonvolatile storage module, and a second nonvolatile storage module whose access speed is higher than an access speed of the first nonvolatile storage module. The processor is configured to execute an operating system and a cache driver that are loaded into the volatile memory. The cache driver uses at least part of an area in the second nonvolatile storage module as a cache for the first nonvolatile storage module.

Abstract: According to one embodiment, an information processing apparatus includes a storage device, a volatile memory, and a processor. The storage device includes a controller, a first nonvolatile storage module, and a second nonvolatile storage module whose access speed is higher than an access speed of the first nonvolatile storage module. The processor is configured to execute an operating system and a cache driver that are loaded into the volatile memory. The cache driver uses at least part of an area in the second nonvolatile storage module as a cache for the first nonvolatile storage module.

Abstract: A method of operating an input/output interface includes selecting one of a plurality of output driver circuits according to a mode selection signal, and outputting a data signal using the selected one of the plurality of output driver circuits. Another method of operating an includes generating a mode selection signal based on a received command signal, and controlling an on-die termination (ODT) circuit included in the input/output interface according to the mode selection signal. Another method of operating an includes generating a mode selection signal based on a received command signal, and controlling an ODT circuit included in the input/output interface according to the mode selection signal.

Abstract: A method of operating an input/output interface includes selecting one of a plurality of output driver circuits according to a mode selection signal, and outputting a data signal using the selected one of the plurality of output driver circuits. Another method of operating an includes generating a mode selection signal based on a received command signal, and controlling an on-die termination (ODT) circuit included in the input/output interface according to the mode selection signal. Another method of operating an includes generating a mode selection signal based on a received command signal, and controlling an ODT circuit included in the input/output interface according to the mode selection signal.

Abstract: Provided herein may be a storage device and a method of operating the same. In a storage device for controlling operational performance depending on temperature, a memory controller configured to control a memory device may include an internal temperature sensing unit configured to generate an internal temperature information by sensing a temperature of the memory controller and a performance adjustment unit configured to receive an external temperature information from an external temperature sensing unit, and controlling operational performance of the memory controller using the internal temperature information and the external temperature information, wherein the external temperature information represents a temperature of the memory device.

Abstract: An interface apparatus and method for transmission and reception of a control signal and a digital stream between an audio/video (A/V) system and a digital data recording and/or reproducing device are provided. The device for recording and/or reproducing digital data includes: a storage unit storing digital data encoded in a predetermined format; a decoder unit decoding digital data stored in the storage unit; an interface unit transmitting the decoded data to an external device; and a control unit controlling the storage unit, the decoder unit, and the interface unit.

Abstract: A memory device includes a nonvolatile semiconductor memory cell array, a plurality of terminals through which control signals are received to control the memory device, an on-die termination circuit connected to at least one of the terminals and having a variable resistor, and a control circuit. The control circuit is configured to enable the on-die termination circuit in response to an enabling signal to enable the on-die termination circuit, with a resistance of the variable registor resistor at different values depending on whether a control signal is asserted or deasserted when the enabling signal is received.

Abstract: According to one embodiment, an information processing apparatus includes a memory includes a buffer area, a first storage, a second storage and a driver. The buffer area is reserved in order to transfer data between the driver and a host system that requests for data writing and data reading. The driver is configured to write data into the second storage and read data from the second storage in units of predetermined blocks using the first storage as a cache for the second storage. The driver is further configured to reserve a cache area in the memory, between the buffer area and the first external storage, and between the buffer area and the second storage. The driver is further configured to manage the cache area in units of the predetermined blocks.