Patents Examined by Jared Rutz
  • Patent number: 10102127
    Abstract: Managing access to a cache memory includes dividing said cache memory into multiple of cache areas, each cache area having multiple entries; and providing at least one separate lock attribute for each cache area such that only a processor thread having possession of the lock attribute corresponding to a particular cache area can update that cache area.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: October 16, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES
    Inventors: Xiao Jun Dai, Subhendu Das, Zhi Gan, Zhang Yue
  • Patent number: 10102128
    Abstract: Managing access to a cache memory includes dividing said cache memory into multiple of cache areas, each cache area having multiple entries; and providing at least one separate lock attribute for each cache area such that only a processor thread having possession of the lock attribute corresponding to a particular cache area can update that cache area.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: October 16, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Xiao Jun Dai, Subhendu Das, Zhi Gan, Zhang Yue
  • Patent number: 10089277
    Abstract: A method and system are provided for configurable computation and data processing. A logical processor includes an array of logic elements. The processor may be a combinatorial circuit that can be applied to modify computational aspects of an array of reconfigurable circuits. A memory stores a plurality of instructions, each instruction including an instruction-fetch data portion and an output data transfer data portion. One or more memory controllers are coupled to the memory and receive instructions and/or output data from the memory. A back buffer is coupled with the memory controller and receives instructions from the memory controller. The back buffer sequentially asserts each received instruction upon one or more memory controllers. The memory controllers transfer data received from the memory to a target, such as an array of reconfigurable logic circuits that are optionally coupled to the memory, the back buffer, and one or more additional memory controllers.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: October 2, 2018
    Inventor: Robert Keith Mykland
  • Patent number: 10091172
    Abstract: A network memory system is disclosed. The network memory system comprises a first appliance configured to encrypt first data, and store the encrypted first data in a first memory device. The first appliance also determines whether the first data is available in a second appliance and transmits a store instruction comprising the first data based on the determination that the first data does not exist in the second appliance. The second appliance is configured to receive the store instruction from the first appliance comprising the first data, encrypt the first data, and store the encrypted first data in a second memory device. The second appliance is further configured to receive a retrieve instruction comprising a location indicator indicating where the encrypted first data is stored, process the retrieve instruction to obtain encrypted response data, and decrypt the encrypted response data.
    Type: Grant
    Filed: May 6, 2016
    Date of Patent: October 2, 2018
    Assignee: Silver Peak Systems, Inc.
    Inventor: David Anthony Hughes
  • Patent number: 10089041
    Abstract: A method for data storage includes, in a storage device that communicates with a host over a storage interface for executing a storage command in a memory of the storage device, estimating an expected data under-run between fetching data for the storage command from the memory and sending the data over the storage interface. A data size to be prefetched from the memory, in order to complete uninterrupted execution of the storage command, is calculated in the storage device based on the estimated data under-run. The storage command is executed in the memory while prefetching from the memory data of at least the calculated data size.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: October 2, 2018
    Assignee: Apple Inc.
    Inventor: Arie Peled
  • Patent number: 9959209
    Abstract: A data storage device is disclosed comprising a non-volatile memory. A command rate profile is initialized, wherein the command rate profile defines a limit on a number of access commands received from a host as a function of an internal parameter of the data storage device. The command rate profile is adjusted in response to a change in operating mode.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: May 1, 2018
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Scott E. Burton, Kenny T. Coker, Robert M. Fallone
  • Patent number: 9928165
    Abstract: A nonvolatile memory device includes a memory cell array, a row decoder, a page buffer, and control logic. The memory cell array includes memory cells connected to word lines and bit lines, the memory cell array being configured to store data. The row decoder is configured to selectively activate a string selection line, a ground selection line, and the word lines of the memory cell array. The page buffer is configured to temporarily store external data and to apply a predetermined voltage to the bit lines according to the stored data during a program operation, and to sense data stored in selected memory cells using the bit lines during a read operation or a verification operation. The control logic is configured to control the row decoder and the page buffer. During execution of commands, when a request to suspend the execution of the commands is retrieved, chip information is backed up to a storage space separate from the control logic.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: March 27, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dong-Hun Kwak
  • Patent number: 9923967
    Abstract: A storage control system adapted to operate as a remote copy pair by communicating between a primary and a secondary of the remote copy pair comprises a selector for selecting writes to be placed in a batch based on one or more criteria, a sequence number requester for requesting a sequence number for the batch, and a sequence number granter for granting a sequence number for the batch. The storage control system also comprises a batch transmitter for transmitting the batch to the secondary, a permission receiver for receiving a permission to write the batch from the secondary, and a write component responsive to the permission receiver to write the batch to completion, wherein the secondary is responsive to the completion to grant a further permission to write for a further batch.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: March 20, 2018
    Assignee: International Business Machines Corporation
    Inventors: Dale Burr, Henry Esmond Butterworth
  • Patent number: 9921754
    Abstract: Systems and techniques for dynamic coding of memory regions are described. A described technique includes monitoring accesses to a group of memory regions, each region including two or more portions of a group of data banks; detecting a high-access memory region based on whether accesses to a region of the group of memory regions exceeds a threshold; generating coding values of a coding region corresponding to the high-access memory region, the high-access memory region including data values distributed across the group of banks; and storing the coding values of the coding region in a coding bank.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: March 20, 2018
    Assignee: Futurewei Technologies, Inc.
    Inventors: Hao Luan, Alan Gatherer, Sriram Vishwanath, Casen Hunger, Hardik Jain
  • Patent number: 9904603
    Abstract: Systems and methods for checking data integrity of a data object copied between storage pools in a storage system by comparing data samples copied from data objects. A series of successive copy operations are scheduled over time for copying a data object from a source data store to a target data store. A first data sample is generated based on a sampling scheme comprising an offset and a period. A second data sample is generated using a similar sampling scheme. The blocks of data in the first data sample and the second data sample are compared to determine if they differ to thereby indicate that the data object at the target store differs from the corresponding data object at the source data store.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: February 27, 2018
    Assignee: Actifio, Inc.
    Inventors: Madhav Mutalik, Philip J. Abercrombie, Christopher A. Provenzano, Uday Tekade
  • Patent number: 9898406
    Abstract: A disk drive is disclosed that varies its caching policy for caching data in non-volatile solid-state memory as the memory degrades. As the non-volatile memory degrades, the caching policy can be varied such that the non-volatile memory is used more as a read cache and less as a write cache. Performance improvements and slower degradation of the non-volatile memory can thereby be attained.
    Type: Grant
    Filed: February 10, 2016
    Date of Patent: February 20, 2018
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventor: Robert L. Horn
  • Patent number: 9892047
    Abstract: A cache memory including: a plurality of parallel input ports configured to receive, in parallel, memory access requests wherein each parallel input port is operable to receive a memory access request for any one of a plurality of processing units; and a plurality of cache blocks wherein each cache block is configured to receive memory access requests from a unique one of the plurality of input ports such that there is a one-to-one mapping between the plurality of parallel input ports and the plurality of cache blocks and wherein each of the plurality of cache blocks is configured to serve a unique portion of an address space of the memory.
    Type: Grant
    Filed: September 17, 2009
    Date of Patent: February 13, 2018
    Assignee: Provenance Asset Group LLC
    Inventors: Jari Nikara, Eero Aho, Kimmo Kuusilinna
  • Patent number: 9880755
    Abstract: Techniques for improved copy on write functionality within an SSD are disclosed. In some embodiments, the techniques may be realized as a method for providing improved copy on write functionality within an SSD including providing, in memory of a device, an indirection data structure. The data structure may include a master entry for cloned data, the master entry having a reference to one or more indexes and a clone entry for the cloned data, the cloned entry having at least one of: a reference to a master index, a reference to a next index, and a value indicating an end of a data structure. The techniques may include traversing, using a computer processor, one or more copies of the cloned data using one or more of the references.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: January 30, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: Dylan Mark Dewitt, Adam Michael Espeseth, Colin Christopher McCambridge, David George Dreyer
  • Patent number: 9864691
    Abstract: The subject disclosure is generally directed towards caching property values in a sparse cache for use in translating notifications to contain property values related to a source instance, e.g., for use in SMI-S compliant notifications (deletion indications). When a deletion indication translation needs properties that are unavailable in the current source instance, a cache is accessed to obtain the previous related property values. The deletion indication is translated based upon the related property values, and output, e.g., as a translated deletion indication to a client subscriber.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: January 9, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Jeegn Chen, James O. Pendergraft, Norman D. Speciner, Yue Zhao
  • Patent number: 9824007
    Abstract: Systems, methods and/or devices are used to enable enhancing data integrity to protect against returning old versions of data. In one aspect, the method includes (1) receiving a write request from a host that specifies write data for a set of logical block addresses in a logical address space of the host, (2) mapping the set of logical block addresses to a set of physical addresses corresponding to physical pages of the storage device, and (3) performing one or more operations for each logical block specified by the set of logical block addresses, including: (a) generating metadata for the logical block, the metadata including a version number for the logical block, (b) storing the metadata, including the version number, in a header of a physical page in which the logical block is stored, and (c) storing the version number in a version data structure.
    Type: Grant
    Filed: February 24, 2015
    Date of Patent: November 21, 2017
    Assignee: SanDisk Technologies LLC
    Inventors: Girish B. Desai, William L. Guthrie
  • Patent number: 9817752
    Abstract: Systems, methods and/or devices are used to enhance data integrity to protect against returning old versions of data. In one aspect, a method includes (1) receiving a write request from a host that specifies write data for a set of logical block addresses, (2) mapping, using a mapping table, the set of logical block addresses to a set of physical addresses, where the mapping table includes a plurality of subsets, and (3) performing operations for each subset of the mapping table that includes at least one entry corresponding to a logical block specified by the set of logical block addresses, including: (a) generating metadata for the subset, the metadata including a version number for the subset, (b) calculating a Cyclic Redundancy Check (CRC) checksum for the subset, and (c) storing the version number for the subset and the CRC checksum for the subset in a version data structure.
    Type: Grant
    Filed: February 24, 2015
    Date of Patent: November 14, 2017
    Assignee: SanDisk Technologies LLC
    Inventors: Girish B. Desai, William L. Guthrie
  • Patent number: 9811427
    Abstract: A media agent is configured to perform substantially autonomously to initiate, continue, and manage information management operations such as a backup job of a certain client's primary data, manage the operations, and generate and store resultant system-level metadata from the operations, etc. The media agent is configured to do this even when out of communication with the storage manager that manages the information management system. When communications are restored, the media agent reports the relevant metadata to the storage manager such that the storage manager may seamlessly integrate the information into its management information infrastructure.
    Type: Grant
    Filed: May 6, 2014
    Date of Patent: November 7, 2017
    Assignee: COMMVAULT SYSTEMS, INC.
    Inventor: Michael Frank Klose
  • Patent number: 9778859
    Abstract: The present disclosure relates to methods and systems for performing operations in a communications protocol. An example method can include submitting, from a device, a request for a queue entry representing a command from a host comprising a request for data stored at a device memory location; receiving the command from the host; and executing the command. An example method can also include selecting a bit string representing whether a requested data stream has been received, and storing the bit string into a memory buffer portion to mark the buffer portion. The method can include receiving, into the memory buffer, the stream. The method can include retrieving contents of the buffer portion, and determining whether the contents contain the bit string. If so, the method can include determining that portions of the stream have not been received. Otherwise, the method can include determining that the stream has been received.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: October 3, 2017
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Dejan Vucinic, Zvonimir Z. Bandic, Cyril Guyot, Robert Mateescu, Qingbo Wang
  • Patent number: 9741436
    Abstract: In general, this disclosure is directed to techniques for adjusting the timing of operations for a storage device. According to one aspect of the disclosure, a method includes receiving, with at least one device, a workload indicator. The method further includes adjusting, with the at least one device, an operation execution time for the storage device responsive to at least the workload indicator. In some examples, the workload indicator may include a host demand indicator. In additional examples, the workload indicator may include a resource utilization indicator. In further examples, the operation execution time may be one of a write operation execution time or a read operation execution time.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: August 22, 2017
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Ryan J. Goss, Kevin A. Gomez, Mark A. Gaertner
  • Patent number: 9727493
    Abstract: Apparatuses and methods for providing data to a configurable storage area are disclosed herein. An example apparatus may include an extended address register including a plurality of configuration bits indicative of an offset and a size, an array having a storage area, a size and offset of the storage area based, at least in part, on the plurality of configuration bits, and a buffer configured to store data, the data including data intended to be stored in the storage area. A memory control unit may be coupled to the buffer and configured to cause the buffer to store the data intended to be stored in the storage area in the storage area of the array responsive, at least in part, to a flush command.
    Type: Grant
    Filed: August 14, 2013
    Date of Patent: August 8, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Graziano Mirichigni, Luca Porzio, Erminio Di Martino, Giacomo Bernardi, Domenico Monteleone, Stefano Zanardi, Chee Weng Tan, Sebastien LeMarie, Andre Klindworth