Patents Examined by Jason Blust
  • Patent number: 9928010
    Abstract: Methods, apparatus are articles of manufacture are disclosed to re-direct detected access requests in a modularized virtualization topology using virtual hard disks. An example method includes detecting, with a processor, a request to access a software asset at a first path location on a first virtual hard disk. The example method also includes determining, with the processor, whether the first path location is mapped to a second path location in a virtual computing environment, the second path location corresponding to a second virtual hard disk encapsulating a functionality originally associated with the first path location. The example method also includes, when the first path location is mapped to the second path location, re-directing, with the processor, the request to the second virtual hard disk.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: March 27, 2018
    Assignee: VMWARE, INC.
    Inventor: Ilan Uriel
  • Patent number: 9892123
    Abstract: An information management system according to certain aspects may determine whether snapshot operations will work prior to executing them. The system may check various factors or parameters relating to a snapshot storage policy to verify whether the storage policy will work at runtime without actually executing the policy. Some examples of factors can include: availability of primary storage devices for which a snapshot should be obtained, availability of secondary storage devices, license availability for snapshot software, user credentials for connecting to primary and/or second storage devices, available storage capacity, connectivity to storage devices, etc. The system may also check whether a particular system configuration is supported in connection with snapshot operations. The result of the determination can be provided in the form of a report summarizing any problems found with the snapshot storage policy.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: February 13, 2018
    Assignee: Commvault Systems, Inc.
    Inventors: Rajiv Kottomtharayil, Manoj Kumar Vijayan, Vimal Kumar Nallathambi, Unmil Vinay Tambe
  • Patent number: 9891845
    Abstract: Embodiments of the present invention provide methods, program products, and systems for reusing a duplex storage medium resource. Embodiments of the present invention can be used to transition between duplex media by determining that a prior transition from a first duplex storage media to a second duplex storage media is being performed and reinitializing the second duplex storage media to receive, for storage, duplex data transferred from the first duplex storage media. Embodiments of the present invention can be used to reduce potential collisions with naming conventions and reduce unwanted delay that results in forcing an offload by managing the recovery medium and keeping it available through policy based medium changes.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: February 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Joseph W. Gentile, Jie Hou, Andrew M. Sica, Douglas M. Zobre
  • Patent number: 9880758
    Abstract: Described are data replication techniques. Writes of cycle N directed to a first storage device of a first data storage system are received. Writes of cycle N?1 directed to the first storage device are transmitted to a second data storage system. Writes of cycle N?2 directed to the first storage device are applied to a second storage device of the second data storage system. An acknowledgement regarding cycle N?1 is sent to the first data storage system responsive to determining that the writes of cycle N?1 directed to the first storage device have been received by the second data storage system and that the writes of cycle N?2 have been applied to the second storage device. At least some writes of cycle N directed to the first storage device are transmitted to the second data storage system prior to the first data storage system receiving the acknowledgement regarding cycle N?1.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: January 30, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Bhaskar Bora, Benjamin Yoder
  • Patent number: 9880761
    Abstract: Various embodiments manage dynamic memory allocation data. In one embodiment, a set of memory allocation metadata is extracted from a memory heap space. Process dependent information and process independent information is identified from the set of memory allocation metadata based on the set of memory allocation metadata being extracted. The process dependent information and the process independent information at least identify a set of virtual memory addresses available in the memory heap space and a set of virtual memory addresses allocated to a process associated with the memory heap space. A set of allocation data associated with the memory heap space is stored in a persistent storage based on the process dependent information and the process independent information having been identified. The set of allocation data includes the process independent allocation information and a starting address associated with the memory heap space.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: January 30, 2018
    Assignee: International Business Machines Corporation
    Inventors: Michel Hack, Xiaoqiao Meng, Jian Tan, Yandong Wang, Li Zhang
  • Patent number: 9864538
    Abstract: Server computers often include one or more input/output (I/O) devices for communicating with a network or directly attached storage device. Data transferred between these devices may include blocks of data with a common often repeated and identifiable data pattern. Transfer and storage of data of this nature may be optimized by transferring primarily blocks of data that are not of the pre-determined data pattern. An indicator may be transferred and stored with transferred data that has been reduced in size in this manner.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: January 9, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Robert Michael Johnson, Mark Bradley Davis, Norbert Paul Kusters, Marc Stephen Olson, Marc John Brooker
  • Patent number: 9851908
    Abstract: A method, device and non-transitory computer readable medium that manages read access includes organizing a plurality of requests for objects on one or more storage media, such as tapes or spin-down disks, based on at least a deadline for each of the plurality of requests. One of one or more replicas for each of the objects on the one or more storage media is selected based on one or more factors. An initial schedule for read access is generated based at least on the deadline for each of the plurality of requests, the selected one of the replicas for each of the objects, and availability of one or more drives. The initial schedule for read access on the one or more of the drives for each of the plurality of requests for the objects is provided.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: December 26, 2017
    Assignee: NETAPP, INC.
    Inventors: Atish Kathpal, Giridhar Appaji Nag Yasa
  • Patent number: 9830077
    Abstract: A data writing method for a rewritable non-volatile memory module, and a memory control circuit unit and a memory storage apparatus using the same are provided. The method includes grouping physical erasing units of the rewritable non-volatile memory module into a temporary area and a storage area. The method also includes selecting a first physical erasing unit from the temporary area, copying a plurality of valid data of the first physical erasing unit to a second physical erasing unit of the temporary area, and performing an erasing operation on the first physical erasing unit. The method further includes selecting a third physical erasing unit from the temporary area, copying a plurality of valid data of the third physical erasing unit to a forth physical erasing unit of the storage area, and performing the erasing operation on the third physical erasing unit.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: November 28, 2017
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Patent number: 9798660
    Abstract: Data exchange between a memory mapped interface and a streaming interface may include receiving sub-packets of a packet from a first interface, storing the sub-packets within a memory at addresses determined according to a ratio of a width of the first interface and a width of a second interface, and determining occupancy, of the memory as the sub-packets are stored. Responsive to determining that the occupancy of the memory meets a trigger level, sub-packets may be read from the memory at addresses determined according to the ratio and sending the sub-packets using the second interface.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: October 24, 2017
    Assignee: XILINX, INC.
    Inventor: Robert Bellarmin Susai
  • Patent number: 9767015
    Abstract: Methods and apparatus for enhancing operating system integrity using non-volatile system memory are described. A computer system includes a system memory coupled to one or more processors. The system memory comprises at least a non-volatile portion. Memory is allocated from the non-volatile portion to store selected metadata associated with an operating system component that supports input-output (I/O) operations. In response to an operation that results in a metadata change at the component, a metadata entry is stored in the non-volatile portion. Subsequent to a failure event, contents of the metadata entry are read from the non-volatile portion to restore a state of the component.
    Type: Grant
    Filed: November 1, 2013
    Date of Patent: September 19, 2017
    Assignee: Amazon Technologies, Inc.
    Inventors: Samuel James McKelvie, Anurag Windlass Gupta
  • Patent number: 9766828
    Abstract: A Lock register can be associated with a mailbox. The Lock register can store a claim ID of a process that has allocated the mailbox. The Lock register can include a Lock port and a Lock Clear port, used to claim and release the Lock register. The Lock register only permits data to be written to the Lock Register when the Lock register is not currently allocated, and the Lock Clear port only permits the process that has allocated the Lock register to write a value.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: September 19, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: John H. Hughes, Jr.
  • Patent number: 9760480
    Abstract: Methods and apparatus for enhancing logging using non-volatile system memory are described. A computer system includes a system memory coupled to one or more processors. The system memory comprises at least a non-volatile portion. A range of memory locations within the non-volatile portion is selected as a low-latency high-durability log staging area. A plurality of log records representing respective events detected by one or more executable programs are generated, and at least a subset of the records is stored in the log persistence area. For analysis subsequent to a failure that results in a loss of data stored in a volatile portion of the system memory, log records written to the staging area within a time window immediately prior to the failure event are provided.
    Type: Grant
    Filed: November 1, 2013
    Date of Patent: September 12, 2017
    Assignee: Amazon Technologies, Inc.
    Inventors: Samuel James McKelvie, Anurag Windlass Gupta
  • Patent number: 9760309
    Abstract: A method for managing a memory is disclosed, the memory including a set of units and a unit comprising a set of pages, wherein a unit of the set of units is erasable as a whole by a unit reclaiming process resulting in a free unit available for writing data to. The method includes maintaining a first pool of units available for reclamation by the unit reclaiming process; maintaining a second pool of units not available for reclamation by the unit reclaiming process; moving a first unit from the first pool to the second pool in response to invalidating a first one of the pages contained in the first unit; returning the first unit from the second pool to the first pool after a defined number of units of the set have been written; and selecting a unit out of the first pool for reclamation by the unit reclaiming process.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: September 12, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikolas Ioannou, Ioannis Koltsidas, Roman A. Pletka, Sasa Tomic, Thomas D. Weigold
  • Patent number: 9760498
    Abstract: An electronic system for multiple agents, both coherent and non-coherent, to communicate with a hybrid cache, the hybrid cache to provide functionality associated with a cache for coherent agents in an outer shareable domain, and to provide functionality associated with a cache for non-coherent agents in a system shareable domain, the functionality provided by tag fields in cache lines stored in the hybrid cache. The tag fields are configured to indicate if a cache line of the hybrid cache belongs to at least one of a logical coherent cache or a logical system cache.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: September 12, 2017
    Assignee: QUALCOMM Incorporated
    Inventor: Laurent Rene Moll
  • Patent number: 9740606
    Abstract: Methods and apparatus for reliable distributed messaging are described. A computer system includes a system memory coupled to one or more processors. The system memory comprises at least a non-volatile portion. A particular location within the non-volatile portion is designated as a target location to which a sender module participating in a communication protocol is granted write permission. A receiver module participating in the communication protocol, subsequent to a failure event that results in a loss of data stored in a volatile portion of the system memory, reads a data item written by the sender program at the target location prior to the failure event. The receiver module performs an operation based on contents of the data item.
    Type: Grant
    Filed: November 1, 2013
    Date of Patent: August 22, 2017
    Assignee: Amazon Technologies, Inc.
    Inventors: Samuel James McKelvie, Anurag Windlass Gupta
  • Patent number: 9727456
    Abstract: A processing device identifies a plurality of solid state storage devices arranged in an array and determines, for at least one solid state storage device of the plurality of solid state storage devices, a first time window during which the at least one solid state storage device is permitted to perform one or more garbage collection operations. The processing device then sends, to the at least one solid state storage device, a message comprising the first time window allocated to the at least one storage device, wherein the at least one solid state storage device is to perform the garbage collection operations during the first time window allocated to the at least one solid state storage device.
    Type: Grant
    Filed: November 3, 2014
    Date of Patent: August 8, 2017
    Assignee: Pavilion Data Systems, Inc.
    Inventors: Kiron Balkrishna Malwankar, Raghuraman Govindasamy, Dan M. Melnic
  • Patent number: 9703707
    Abstract: A NOC comprises a die having a cache and a core area, a plurality of core tiles arranged in the core area in a plurality of subsets, at least one cache memory bank arranged in the cache area, whereby the at least one cache memory bank is distinct from each of the plurality of core files. The NOC further comprises an interconnect fabric comprising a request tree to connect to a first cache memory bank of the at least one cache memory bank, each core tile of a first one of the subsets, the first subset corresponding to the first cache memory bank, such that each core tile is connected to the first cache memory bank only, and a reply tree to connect the first cache memory bank to each core tile of the first subset.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: July 11, 2017
    Assignee: Ecole Polytechnique Fédérale de Lausanne (EPFL)
    Inventors: Babak Falsafi, Boris Grot, Pejman Lotfi Kamran
  • Patent number: 9697143
    Abstract: A memory system is configured for access by a plurality of computer processing units. An address lock bit is configured in a translation table of the memory system. The address lock supports both address lock shared and address lock exclusive functions. A storage manager of an operating system configured to obtain exclusive access to an entry in a DAT table either by obtaining an address space lock exclusive or obtaining an address space lock shared, and setting a lock bit in a DAT entry.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: July 4, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles E. Mari, Harris M. Morgenstern, Thomas F. Rankin, Peter J. Relson, Elpida Tzortzatos
  • Patent number: 9696924
    Abstract: A memory system is configured for access by a plurality of computer processing units. An address lock bit is configured in a translation table of the memory system. The address lock supports both address lock shared and address lock exclusive functions. A storage manager of an operating system configured to obtain exclusive access to an entry in a DAT table either by obtaining an address space lock exclusive or obtaining an address space lock shared, and setting a lock bit in a DAT entry.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: July 4, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles E. Mari, Harris M. Morgenstern, Thomas F. Rankin, Peter J. Relson, Elpida Tzortzatos
  • Patent number: 9690482
    Abstract: A data storage apparatus and method of storing data in a data storage apparatus are provided, where the data storage apparatus comprises multiple banks for storing data. The multiple banks form multiple bank groups, wherein each bank group comprising more than one bank. A first data item of a received data block is stored at a selected storage location in a selected bank and a subsequent data item of the data block is stored to a further storage location in a different bank according to a sequence of banks. The sequence of banks firstly comprises the selected bank followed by all other banks in the bank group of the selected bank. Moreover the sequence of banks respects a hierarchical pattern, wherein a finer granularity of the hierarchical pattern comprises all banks in a given bank group, and a coarser granularity of the hierarchical pattern comprises the given bank group followed by a different bank group to the given bank group. Access to the data storage apparatus is thereby improved.
    Type: Grant
    Filed: November 3, 2014
    Date of Patent: June 27, 2017
    Assignee: ARM Limited
    Inventors: Michele Riga, Maz Zardini