Patents Examined by Jason Bryan
  • Patent number: 9176806
    Abstract: In a memory inspection in a computer installing a x86 CPU, system software related to low-frequent processing is prevented from going down, and the suppression of performance degradation and the avoidance of a reduction in memory capacity by the memory inspection is realized. The computer having a processor, a memory, and an I/O device. The memory stores a system software realizing a system control unit, and an inspection program realizing an inspection unit. The processor has a memory fault notifying unit notifying the system control unit of a fault address. The system control unit includes an adjustment unit that determines whether the inspection program needs to be executed, or not, based on the type of event occurring, plural event processing units processing the event by using different storage areas of the memory, a fault recording unit recording the memory fault, and an event processing unit selector.
    Type: Grant
    Filed: May 7, 2013
    Date of Patent: November 3, 2015
    Assignee: HITACHI, LTD.
    Inventors: Naoya Hattori, Toshiomi Moriki
  • Patent number: 9170905
    Abstract: Embodiments relate to testing of a computing system using a base protocol layer testing device. An aspect includes, based on determining, by the base protocol layer testing device, that a current test comprises a test of a base protocol layer of the computing system, enabling a low level test assist device of the base protocol layer testing device for the current test, wherein the low level test assist device comprises a hardware device that is directly attached to an input/output (I/O) card of the computing system. Another aspect includes storing base protocol layer traffic that passes through the I/O card by the low level test assist device during performance of the current test by the base protocol layer testing device. Yet another aspect includes analyzing the stored base protocol layer traffic after completion of the current test to determine a result of the current test.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: October 27, 2015
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Tara Astigarraga, Louie A. Dickens, Carlos J. Lujan, Daniel J. Winarski
  • Patent number: 9170906
    Abstract: Embodiments relate to testing of a computing system using a base protocol layer testing device. An aspect includes, based on determining, by the base protocol layer testing device, that a current test comprises a test of a base protocol layer of the computing system, enabling a low level test assist device of the base protocol layer testing device for the current test, wherein the low level test assist device comprises a hardware device that is directly attached to an input/output (I/O) card of the computing system. Another aspect includes storing base protocol layer traffic that passes through the I/O card by the low level test assist device during performance of the current test by the base protocol layer testing device. Yet another aspect includes analyzing the stored base protocol layer traffic after completion of the current test to determine a result of the current test.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: October 27, 2015
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Tara Astigarraga, Louie A. Dickens, Carlos J. Lujan, Daniel J. Winarski
  • Patent number: 9164847
    Abstract: A method and system for checkpointing at least one application in an application group. At least one full checkpoint and at least one incremental checkpoint are created for the application in the application group. The at least one incremental application checkpoint is merged against the at least one full application checkpoint, and checkpointing across all applications in the application group is synchronized. A storage checkpoint is taken for at least one of the full checkpoint and the incremental checkpoint, and memory and storage checkpoints are synchronized and consistent.
    Type: Grant
    Filed: March 18, 2015
    Date of Patent: October 20, 2015
    Assignee: Open Invention Network, LLC
    Inventors: Allan Havemose, Keith Richard Backensto
  • Patent number: 9152492
    Abstract: To perform recovery of a headless computer, a direct connection is established by the headless computer with a recovery computer over a network link. After establishing the direct connection, the headless computer is initiated in recovery mode. The headless computer receives a recovery routine from the recovery computer, and the recovery routine is executed in the headless computer to implement a procedure to receive a recovery image from the recovery computer. The recovery image upon loading in the headless computer causes loading of software for recovery of the headless computer.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: October 6, 2015
    Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Greg J. Lipinski, Paul A. Boerger
  • Patent number: 9146802
    Abstract: Techniques for providing an error log include establishing, by a hub computing system, a connection with a back-end computing system, the back-end computing system executing a first computer-implemented programming language; receiving, at the hub computing system, a request for an error log from an Open Data Protocol (OData) application that resides on a mobile communications device, the mobile communications device executing a second computer-implemented programming language different than the first computer-implemented programming language, and the error log including error log entries associated with a runtime processing of a data model; registering, on the hub computing system, the error log as an OData service configured to be provided over an OData channel between the hub computing system and the mobile communications device; and providing, by the hub computing system, the error log to the OData application as the OData service over the OData channel.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: September 29, 2015
    Assignee: SAP SE
    Inventors: Duong-Han Tran, Andreas Hoffner, Timur Fichter
  • Patent number: 9146803
    Abstract: In a storage apparatus a control section writes, at the time of updating at least a part of first data stored in a first storage area by at least a part of second data, the second data to a second storage area other than the first storage area. In addition, the control section determines whether or not a write error occurs. When the write error does not occur, the control section combines the first data and the second data.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: September 29, 2015
    Assignee: FUJITSU LIMITED
    Inventor: Yuichi Ogawa
  • Patent number: 9146820
    Abstract: The WSAN simultaneous failures recovery method ranks each node based on the number of hops to a pre-designated root node in the network. The method identifies some nodes as cluster heads based on the number of their children in the recovery tree. The method assigns a recovery weight and a nearby cluster node to each node. Nearby cluster nodes serve as gateways to other nodes that belong to that cluster. The recovery weight is used to decide which node is better to move in order to achieve lower recovery cost. The recovery method uses the same on-going set of actors to restore connectivity. Simulation results have demonstrated that the recovery method can achieve low recovery cost per failed node in small and large networks. The results have also shown that clustering leads to lower recovery cost if the sub-network needs to re-establish links with the rest of the network.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: September 29, 2015
    Assignee: KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS
    Inventors: Abdullah Alfadhly, Uthman Baroudi, Mohamed Farag Younis
  • Patent number: 9141457
    Abstract: Techniques for predicting multiple disk failures are described herein. According to one embodiment, first values of a predetermined diagnostic parameter collected from a set of known failed disks of a storage system are received. A quantile distribution graph of the first values against percentiles of a number of known failed disk is generated. In response to second values of the predetermined diagnostic parameter collected from a set of target disks, each of the second values is applied to the quantile distribution graph to determine a corresponding percentile for each of the target disks, which represents a failure probability of a corresponding one of the target disks. A failure probability of two or more of the target disks is calculated based on the determined percentiles of the target disks.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: September 22, 2015
    Assignee: EMC Corporation
    Inventors: Ao Ma, Windsor W. Hsu
  • Patent number: 9141463
    Abstract: A method for specifying an error location by an information processing apparatus that includes a plurality of devices connected to each other through a transmission path includes deciding, when an interrupt is generated, whether the interrupt is a periodic interrupt or an error interrupt, and storing, where the generated interrupt is a periodic interrupt, history information of errors of each of the devices, but analyzing, where the generated interrupt is an error interrupt, the stored history information of errors of the devices to specify a suspect location of the error.
    Type: Grant
    Filed: May 3, 2013
    Date of Patent: September 22, 2015
    Assignee: FUJITSU LIMITED
    Inventor: Kimihiro Nishiyama
  • Patent number: 9141480
    Abstract: Data storage systems and methods for storing data are described herein. The storage system includes at least two data storage nodes for storing portions of a distributed hash table and related data. After a first node attempts to complete a write request at a second node and is unable to complete the request, the first node ceases responses to interactions from other nodes. Once the first node's failure to respond has caused a sufficient number of nodes to cease responding, the nodes enter a service mode to resolve the live lock. While in live lock, the nodes determine the oldest, unfulfilled request using a system-wide logical timestamp associated with write requests. Once the oldest request is determined, a removal vote to remove the non-responsive node from the group is initiated and, if other nodes agree, the non-responsive node is removed from the group of nodes.
    Type: Grant
    Filed: September 24, 2013
    Date of Patent: September 22, 2015
    Assignee: DataDirect Networks, Inc.
    Inventors: Paul Nowoczynski, Jason Micah Cope, Pavan Uppu, Don Molaro, Michael Piszczek, Gordon Manning
  • Patent number: 9141487
    Abstract: Embodiments described herein are directed to migrating affected services away from a faulted cloud node and to handling faults during an upgrade. In one scenario, a computer system determines that virtual machines running on a first cloud node are in a faulted state. The computer system determines which cloud resources on the first cloud node were allocated to the faulted virtual machine, allocates the determined cloud resources of the first cloud node to a second, different cloud node and re-instantiates the faulted virtual machine on the second, different cloud node using the allocated cloud resources.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: September 22, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Gaurav Jagtiani, Abhishek Singh, Ajay Mani, Akram Hassan, Thiruvengadam Venketesan, Saad Syed, Sushant Pramod Rewaskar, Wei Zhao
  • Patent number: 9075738
    Abstract: A method includes accepting a definition of a mother Error Correction Code (ECC) that is represented by a set of parity check equations and includes first code words, and a definition of a punctured ECC that includes second code words and is derived from the mother ECC by removal of one or more of the parity check equations and removal of one or more punctured check symbols selected from among check symbols of the first code words. A mother decoder, which is designed to decode the mother ECC by exchanging messages between symbol nodes and check nodes in accordance with a predefined interconnection scheme that represents the mother ECC, is provided. An input code word of the punctured ECC is decoded using the mother decoder by initializing one or more of the symbol nodes and controlling one or more of the messages, and while retaining the interconnection scheme.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: July 7, 2015
    Assignee: Apple Inc.
    Inventors: Micha Anholt, Naftali Sommer, Tal Inbar
  • Patent number: 9047260
    Abstract: This invention provides a method, computer program and system for updating of a model of a system under test for use in model-based testing. In one embodiment, the system includes a rules engine, a comparator and a message dictionary. The rules engine runs an action against the system under test and runs the action against a model under test. The comparator compares an output from the system under test with a corresponding output from the model under test, wherein the output from the model under test is selected from one of a plurality of output message records. The dictionary engine updates the output message record by changing the message record if the output of the model under test is different from the output of the system under test. If the output message record is empty, the dictionary engine adds an output message record based on the system under test.
    Type: Grant
    Filed: October 14, 2013
    Date of Patent: June 2, 2015
    Assignee: International Business Machines Corporation
    Inventor: James Clive Stewart
  • Patent number: 9037933
    Abstract: Devices, systems, methods, and other embodiments associated with generating a moving average are described. In one embodiment, a method includes inputting a new data value, wherein the new data value is a most recent data value in a series of M prior sequential data values that are input to an accumulator for the purpose of calculating a moving average having a window size of M. The method also includes detecting an error in the new data value and correcting the moving average, based at least in part, on the error.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: May 19, 2015
    Assignee: MARVELL INTERNATIONAL LTD.
    Inventor: Kiran Joshi
  • Patent number: 9021294
    Abstract: A survey tool for use in a Recover to Cloud (R2C) replication service environment that determines configuration information automatically (such as through SNMP messaging or custom APIs) and stores it in a survey database. A Virtual Data Center (VDC) representation is then instantiated from the survey database, with the VDC being a virtual replica of the production environment including dormant Virtual Machine (VM) definition files, applications, storage requirements, VLANs firewalls, and the like. The survey tool determines the order in which the replicas are brought on line to ensure orderly recovery, by determining the order in which each machine makes requests for connections to other machines.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: April 28, 2015
    Assignee: Sungard Availability Services LP
    Inventor: Chandra Reddy
  • Patent number: 9009539
    Abstract: A stack trace associated with an application program is received and at least one recognizable term is searched for in the stack trace. A digital signature is generated from at least a portion of the stack trace that includes the at least one recognizable term. If the digital signature matches a known digital signature among a plurality of known digital signatures, the stack trace is grouped with other stack traces associated with the known digital signature. Method call graphs in grouped stack traces may be analyzed to determine common pathways leading to an error.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: April 14, 2015
    Assignee: Splunk Inc
    Inventors: Alexandros Kompotis, Panagiotis Papadopoulos, Konstantinos Polychronis
  • Patent number: 8984345
    Abstract: A fault restoration technique for use in a virtual environment is provided. The fault restoration technique includes monitoring fault state values of a plurality of domains, detecting a faulty domain, if any, from the plurality of, and restoring the faulty domain by reloading the OS of the faulty domain.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: March 17, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Min Lee, Sang-Bum Suh
  • Patent number: 8984352
    Abstract: [This invention] inhibits the response time of the storage control apparatus from being longer even if the response time of the storage apparatus is long. The disk adapter (DKA), receiving a read message from the channel adapter (CHA), sets the timeout time in accordance with specified conditions, and tries to read data from the storage apparatus 4. As the timeout time, either the normal value or the shortened value is selected. If a timeout error occurs, the read job is reset, and correction read is started.
    Type: Grant
    Filed: April 14, 2010
    Date of Patent: March 17, 2015
    Assignee: Hitachi, Ltd.
    Inventor: Eiju Katsuragi
  • Patent number: 8977905
    Abstract: The disclosure discloses a method and a system for detecting an abnormality of a network processor. The method comprises the following steps: an abnormality detection operation code is added into an execution flow of each thread in a network processor, and the network processor sets a flag bit corresponding to a current thread in an abnormality protection flag data area in a shared memory to a first flag when executing the abnormality detection operation code in the current thread; and when a period of a timer is expire, a coprocessor detects all the flag bits in the abnormality protection flag data area in the shared memory, determines that a thread corresponding to a flag bit which is not the first flag is abnormal when detecting that not all the flag bits are the first flag, and sets all the flag bits to a second flag when detecting that all the flag bits are the first flag.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: March 10, 2015
    Assignee: ZTE Corporation
    Inventors: Yin Zhu, Yirong Wu