Patents Examined by Jason Bryan
  • Patent number: 8453039
    Abstract: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a data transfer system is disclosed that includes a data detector, a defect detector and a gating circuit. The data detector provides a soft output, and the defect detector is operable to receive the soft output and the data signal, and to assert a defect indication based at least in part on the soft output and the data signal. The gating circuit is operable to modify the soft output of the detector whenever the defect indication is asserted.
    Type: Grant
    Filed: October 1, 2007
    Date of Patent: May 28, 2013
    Assignee: AGERE Systems Inc.
    Inventor: Weijun Tan
  • Patent number: 8448013
    Abstract: A method, apparatus, and computer program product for handling a failure condition in a storage controller is disclosed. In certain embodiments, a method may include initially detecting a failure condition in a storage controller. The failure condition may be associated with a specific host and a specific storage device connected to the storage controller. The method may further include determining a failure ID associated with the failure condition. Using the failure ID, en entry may be located in a data collection and recovery table. This entry may indicate one or more data collection and/or recovery processes to execute in response to the failure condition. The method may then execute the data collection and/or recovery processes indicated in the entry. While executing the data collection and/or recovery processes, connectivity may be maintained between hosts and storage devices not associated with the failure condition.
    Type: Grant
    Filed: January 19, 2009
    Date of Patent: May 21, 2013
    Assignee: International Business Machines Corporation
    Inventors: Brian Dow Clark, Juan Alonso Coronado, Christina Ann Lara, Lisa R. Martinez, Phu Nguyen, Beth Ann Peterson, Jayson Elliott Tsingine
  • Patent number: 8443231
    Abstract: A node in a server cluster is designated as a quorum disk. The node stores a list of other nodes in the server cluster also designated as quorum disks. The node can replace the first list with a second and more recent list of quorum disks only if the second list is updated on at least a simple majority of quorum disks on the first list.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: May 14, 2013
    Assignee: Symantec Corporation
    Inventors: Sara Abraham, Craig Harmer, Prasanta Dash, Vishal Kher
  • Patent number: 8443270
    Abstract: A network controller receives data substantially simultaneously from multiple client nodes. The network controller assigns to each client node one or more sub-carriers of an orthogonal frequency-division multiplexing access frequency spectrum. The client nodes transmit substantially simultaneously M LDPC codewords that are encoded in a parity check matrix so that the number of rows m? depend on the code rate and are mapped on its assigned sub-carriers. The network controller computes a bit log-likelihood ratio for each received bit of the codewords and arranges the bit LLR by codeword to align with an equivalent parity check matrix. The network controller decodes the codewords with the equivalent parity check matrix.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: May 14, 2013
    Assignee: Entropic Communications, Inc.
    Inventors: Shaw Yuan, Arndt Mueller, Brian Eidson
  • Patent number: 8429459
    Abstract: An attribute collector may collect an attribute set for each test entity of a plurality of test entities associated with a software test executed in a software environment. An attribute analysis signal handler may receive an attribute analysis signal associated with a change in the software environment, and a view generator may provide an attribute-based view associated with an affected attribute set associated with the change, the attribute-based view identifying an affected test entity that is affected by the change.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: April 23, 2013
    Assignee: SAP AG
    Inventors: Suekrue Birakoglu, Roman Rapp
  • Patent number: 8429483
    Abstract: Systems, methods, and apparatus are provided for increasing decoding throughput in an LDPC decoder, such as in a wireless communications receiver or in a data retrieval unit. A checker-board parity check matrix and edge-based LDPC decoder structure are provided in which both vertical and horizontal processors are used simultaneously. Horizontal processors may be grouped into type-A and type-B horizontal processors, and similarly, vertical processors may be grouped into type-A and type-B vertical processors. Type-A processors may be used in different clock cycles than type-B processors to update memory locations in a decoding matrix without causing memory access conflicts.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: April 23, 2013
    Assignee: Marvell International Ltd.
    Inventors: Nedeljko Varnica, Seo-How Low, Lingyan Sun, Zining Wu
  • Patent number: 8429497
    Abstract: A method of dynamic data storage for error correction in a memory device is disclosed. Data for storage is received, and the received data is then encoded and associated error correction code (ECC) is generated. The encoded data is stored in a portion of a data partition of the memory device, wherein percentage of the stored data in the data partition is determined according to an amount of corrected errors associated with the data partition or is predetermined.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: April 23, 2013
    Assignee: Skymedi Corporation
    Inventors: Chih-Cheng Tu, Yan-Wun Huang, Han-Lung Huang, Ming-Hung Chou, Chien-Fu Huang, Chih-Hwa Chang
  • Patent number: 8381053
    Abstract: Devices, systems, methods, and other embodiments associated with generating a moving average are described. In one example method an average value of a sliding window of M sequential data values is calculated on a per clock basis, where M is an integer. A data value is detected that has an error. The data value is in the sliding window of M sequential data values. The method corrects the average value of the sliding window as a function of the error.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: February 19, 2013
    Assignee: Marvell International Ltd.
    Inventor: Kiran Joshi
  • Patent number: 8375246
    Abstract: According to one embodiment, an information recording apparatus for recording, in a free area, first low-quality recorded data having an error rate not less than a first error rate upon finalization of a recording medium, the information recording apparatus includes a reader, a measurement module, a detector, and a recorder. The reader is configured to read recorded data from a recording area of the recording medium. The measurement module is configured to measure an error rate of the recorded data of each predetermined data block. The detector configured to detect the first low-quality recorded data based on an error rate measurement result of the measurement module. The recorder is configured to correct an error in the first low-quality recorded data, and record error-corrected recorded data corresponding to the first low-quality recorded data at a spare recording position of the free area of the recording medium.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: February 12, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Seigo Ito
  • Patent number: 8365009
    Abstract: Subject matter described herein is directed to reallocating an application component from a faulty data-center resource to a non-faulty data-center resource. Background monitors identify data-center resources that are faulty and schedule migration of application components from the faulty data-center resources to non-faulty data-center resources. Migration is carried out in an automatic manner that allows an application to remain available. Thresholds are in place to control a rate of migration, as well as, detect when resource failure might be resulting from data-center-wide processes or from an application failure.
    Type: Grant
    Filed: September 10, 2010
    Date of Patent: January 29, 2013
    Assignee: Microsoft Corporation
    Inventors: Pavel A. Dournov, Haizhi Xu
  • Patent number: 8365018
    Abstract: An embodiment of the invention is a client on a local area network that periodically and automatically evaluates its physical connectivity with the local area network, exercises local-network services such as DHCP, and verifies Internet connectivity and function by pinging one or more numerically specified IP addresses and by pinging one or more IP addresses specified by an FQDN (Fully Qualified Domain Name) known to the assigned DNS servers. An embodiment of the invention may include a plurality of client elements monitoring one or more networks. Functionality according to embodiments of the invention can send notices, automatically initiate action, and otherwise assist in, among other things, remote monitoring and administration of networks, and particularly wireless networks.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: January 29, 2013
    Assignee: Sand Holdings, LLC
    Inventors: P. Stuckey McIntosh, David Lamar James, Li-Quan Tan
  • Patent number: 8359493
    Abstract: A system and method is provided for providing assured recovery for a distributed application. Replica servers associated with the distributed application may be coordinated to perform integrity testing together for the whole distributed application. The replica servers connect to each other in a manner similar to the connection between master servers associated with the distributed application, thereby preventing the replica servers from accessing and/or changing application data on the master servers during integrity testing.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: January 22, 2013
    Assignee: Computer Associates Think, Inc.
    Inventors: Hailin Peng, Zhenghua Xu, Victor Liu
  • Patent number: 8356225
    Abstract: A data derate matcher for supporting hybrid automatic repeat request (HARQ), includes a control parameter generation unit for generating control parameters to separate bits of an input bit stream ek; and a bit separation unit for separating the bits of the input bit stream ek into three types of bits streams v(0)k, v(1)k, and v(2)k by modulus operation of each of the bits of the input bit stream and the control parameters. Further, the data derate matcher for supporting the HARQ includes address generators for generating addresses (j) of valid data to be used in deinterleavers with respect to data of each of the bit streams output from the bit separation unit; and subblock deinterleavers for sequentially inputting data corresponding to the addresses generated by the address generators to output decoded data.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: January 15, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Nam Il Kim, Daeho Kim
  • Patent number: 8321764
    Abstract: Embodiments of the present disclosure provide methods, systems, and apparatuses related to multilevel encoding with error correction. In some embodiments, a plurality of bits may be encoded into a plurality of multilevel memory cells by level-shifting a subset of the plurality of multilevel memory cells for a bit of the plurality of bits. Other embodiments may be described and claimed.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: November 27, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Christopher Bueb
  • Patent number: 8321724
    Abstract: A device includes a taxonomy schema; a display link base; a calculation link base; an XBRL document memory unit which stores an instance; an error inference unit which compares a calculated value of an input value of the instance corresponding to an item element of the calculation value in accordance with the calculation link base with the input value of the instance corresponding to the calculated value based on the display link base, detects a discrepancy between the calculation value and the input value, specifies a calculation tree structure of the calculation link base including the item element in which the discrepancy is detected and a display tree structure of the display link base including the item element in which the discrepancy is detected, and infers that a state of too many or too few item elements is regarded as a discrepancy error in the case that such an item element is set only in either one of the trees and that the item element has an input that is consistent with an absolute value of the
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: November 27, 2012
    Assignee: Fujitsu Limited
    Inventor: Kazuya Tanahashi
  • Patent number: 8312363
    Abstract: In one embodiment, circuitry is provided to generate a residue based at least in part upon operations and a data stream generated based at least in part upon a packet. The operations may include at least one iteration of at least one reduction operation including (a) multiplying a first value with at least one portion of the data stream, and (b) producing a reduction by adding at least one other portion of the data stream to a result of the multiplying. The operations may include at least one other reduction operation including (c) producing another result by multiplying with a second value at least one portion of another stream based at least in part upon the reduction, (d) producing a third value by adding at least one other portion of the another stream to the another result, and (e) producing the residue by performing a Barrett reduction based at least in part upon the third value.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: November 13, 2012
    Assignee: Intel Corporation
    Inventors: Vinodh Gopal, Erdinc Ozturk, Gilbert Wolrich, Wajdi Feghali
  • Patent number: 8301976
    Abstract: A system including a data detection module, a reconstruction filter module, a first correlation module, and a second correlation module, The data detection module detects data bits from input signals. The reconstruction filter module generates reconstructed signals using the data bits. The first correlation module correlates the input signals and the reconstructed signals and generates first correlation values. The second correlation module self-correlates the reconstructed signals and generates second correlation values. In response to at least one of the input signals and the reconstructed signals including a B-bit floating number having a sign bit, at least one of the first correlation module and the second correlation module generates the first correlation values and the second correlation values based on the sign bit and K most significant bits (MSBs) of the B-bit floating number, where 0 <K <(B-1), and B is an integer greater than 1.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: October 30, 2012
    Assignee: Marvell International Ltd.
    Inventors: Shaohua Yang, Zining Wu
  • Patent number: 8296604
    Abstract: A method and circuit for providing temporal redundancy for a hardware circuit implemented in an integrated circuit is disclosed. The method comprises implementing a comparison circuit for comparing values in the integrated circuit; coupling an input signal to the hardware circuit; detecting an output signal of the hardware circuit at a first time, wherein the output signal is based upon the input signal; holding the input signal until at least a second time; detecting the output signal of the hardware circuit at the second time; determining, by the comparison circuit, whether the output signal of the hardware circuit at the first time corresponds to the output signal of the hardware circuit at the second time; and generating an error signal based upon determining whether the output signal of the hardware circuit at the first time corresponds to the output signal of the hardware circuit at the second time.
    Type: Grant
    Filed: October 12, 2009
    Date of Patent: October 23, 2012
    Assignee: Xilinx, Inc.
    Inventor: Stephen M. Trimberger
  • Patent number: 8276017
    Abstract: In a system management apparatus, a failure detection unit detects a readout failure in one of blocks constituting distributed data stored in a first RAID disk array. A request unit requests a computer to supplement one of the blocks of the distributed data stored in the first RAID disk array in which a readout failure irrecoverable by use of only the data stored in the first RAID disk array occurs, where the computer has a second RAID disk array storing a duplicate of the distributed data stored in the first RAID disk array. And an overwriting unit receives data corresponding to the one of the blocks from the computer, and overwrites the one of the blocks with the received data.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: September 25, 2012
    Assignee: Fujitsu Limited
    Inventors: Masahisa Tamura, Yasuo Noguchi, Kazutaka Ogihara, Yoshihiro Tsuchiya, Tetsutaro Maruyama, Riichiro Take, Seiji Toda
  • Patent number: 8266479
    Abstract: Described herein are techniques for dynamically monitoring process activeness of processes running on a computing node. Problems affecting processes to serve their designated functions on the computing node can be relatively quickly detected and dealt with, thereby making restoring process activeness on the computing node much more quickly than otherwise.
    Type: Grant
    Filed: April 6, 2009
    Date of Patent: September 11, 2012
    Assignee: Oracle International Corporation
    Inventors: Wilson Chan, Cheng-Lu Hsu, Angelo Pruscino