Patents Examined by Jason Bryan
  • Patent number: 8645746
    Abstract: Method and apparatus for providing failover operation for a connection between a first PCIE bridge and a first input/output (IO) device are provided. A first set of bussed bits is exchanged between the first PCIE bridge and the first IO device over a first link using a first set of lanes of the first PCIE bridge. In response to detecting the failure in the first link, the first set of bussed bits is exchanged between the first PCIE bridge and the first IO device using an unused portion of a second link connecting a second PCIE bridge and a second IO device.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: February 4, 2014
    Assignee: International Business Machines Corporation
    Inventors: Patrick A. Buckland, Jay R. Herring, Gregory M. Nordstrom, William A. Thompson
  • Patent number: 8645765
    Abstract: Method embodiments for triggering error injection into a function under test using a serialization resource are provided. A test process invokes the function under test immediately after relinquishing exclusive control of the serialization resource. An error-injection process injects the error into the running function after gaining exclusive control of the serialization resource from the test process. The error-injection process may add a delay to inject the error. If the processes are repeated, the error-injection process may vary the delay, perhaps randomly, over a specified time window to thoroughly exercise the function's error recovery routine.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: February 4, 2014
    Assignee: International Business Machines Corporation
    Inventors: Joel Leslie Masser, Eileen Patricia Tedesco
  • Patent number: 8645766
    Abstract: System, and computer program product embodiments for triggering error injection into a function under test using a serialization resource are provided. A test process invokes the function under test immediately after relinquishing exclusive control of the serialization resource. An error-injection process injects the error into the running function after gaining exclusive control of the serialization resource from the test process. The error-injection process may add a delay to inject the error. If the processes are repeated, the error-injection process may vary the delay, perhaps randomly, over a specified time window to thoroughly exercise the function's error recovery routine.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: February 4, 2014
    Assignee: International Business Machines Corporation
    Inventors: Joel L. Masser, Eileen P. Tedesco
  • Patent number: 8640010
    Abstract: Disclosed herein is a decoding apparatus that performs soft-decision decoding on a linear block code, the apparatus including a hard-decision decoder configured to perform hard-decision decoding on a received word using a hard-decision decoding algorithm; and a soft-decision decoder configured to perform, using a soft-decision algorithm, soft-decision decoding merely on a received word for which the hard-decision decoder has failed in the hard-decision decoding.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: January 28, 2014
    Assignee: Sony Corporation
    Inventors: Toshiyuki Miyauchi, Masayuki Hattori, Takashi Yokokawa
  • Patent number: 8635506
    Abstract: Provided is a Multimedia Broadcast Multicast Service (MBMS); and, more particularly, a data transmission/receiving method in a multimedia broadcast multicast service system, and an apparatus thereof. The data transmitting method in the MBMS system includes the step of checking a terminal receiving data provided from the MBMS and the step of determining whether there is error report feedback on retransmission of the data according to the number of the detected terminals.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: January 21, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jung-Im Kim, Kyoung-Seok Lee, Jae-Heung Kim, Byung-Han Ryu, Seung-Chan Bang
  • Patent number: 8607093
    Abstract: Embodiments relate systems and methods for detecting machine faults in a network using acoustic monitoring. In embodiments, one or more servers, clients, or other machines in a managed network can have a microphone or other acoustic sensor integrated into motherboard or other hardware. The sensor can sample acoustic signals from inside or near the machine, and can digitize that data. The resulting set of acoustic data can be transmitted to a management server or other destination for analysis of the operating sounds related to that machine. For instance, the acoustic data can be analyzed to detect indications of a failed or failing hard drive, for instance by detecting spindle whine or head movement noises, or a failed or failing power supply based on other sounds. The management server can respond to potential fault events for instance by issuing configuration commands, such as instructions to power down the malfunctioning component.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: December 10, 2013
    Assignee: Red Hat, Inc.
    Inventors: Michael Paul DeHaan, Adrian Karstan Likins, Seth Kelby Vidal
  • Patent number: 8601352
    Abstract: A method includes accepting a definition of a mother Error Correction Code (ECC) that is represented by a set of parity check equations and includes first code words, and a definition of a punctured ECC that includes second code words and is derived from the mother ECC by removal of one or more of the parity check equations and removal of one or more punctured check symbols selected from among check symbols of the first code words. A mother decoder, which is designed to decode the mother ECC by exchanging messages between symbol nodes and check nodes in accordance with a predefined interconnection scheme that represents the mother ECC, is provided. An input code word of the punctured ECC is decoded using the mother decoder by initializing one or more of the symbol nodes and controlling one or more of the messages, and while retaining the interconnection scheme.
    Type: Grant
    Filed: July 25, 2010
    Date of Patent: December 3, 2013
    Assignee: Apple Inc.
    Inventors: Micha Anholt, Naftali Sommer, Tal Inbar
  • Patent number: 8595559
    Abstract: This invention provides a method, computer program and system for updating a model of a system under test for use in model-based testing. In one embodiment, the system includes a rules engine, a comparator and a message dictionary. The rules engine runs an action against the system under test and runs the action against a model under test. The comparator compares an output from the system under test with a corresponding output from the model under test, wherein the output from the model under test is selected from one of a plurality of output message records. The dictionary engine updates the output message record by changing the message record if the output of the model under test is different from the output of the system under test. If the output message record is empty, the dictionary engine adds an output message record based on the system under test.
    Type: Grant
    Filed: May 20, 2008
    Date of Patent: November 26, 2013
    Assignee: International Business Machines Corporation
    Inventor: James Clive Stewart
  • Patent number: 8578257
    Abstract: A method and device for segmenting, CRC encoding and turbo encoding a CRC attached transport block.
    Type: Grant
    Filed: August 13, 2012
    Date of Patent: November 5, 2013
    Assignee: LG Electronics Inc.
    Inventors: Bong Hoe Kim, Ki Jun Kim, Joon Kui Ahn, Dong Youn Seo
  • Patent number: 8560889
    Abstract: A scalable and fault tolerant finite state machine engine, for example, for use in an automated incident management system, logs or records data in persistent storage at different points or levels during various internal processing of an event associated with an information technology element, and action taken associated with the event, by executing a finite state machine instance that encodes policies for handling incidents on such types of information technology elements. In the event that the finite state machine engine is shutdown during processing, the finite state machine engine is able to pick up from where it left off when it was shutdown, for each abnormally terminated finite state machine instance, by using the data logged in the persistent storage and determining a point of processing from where it should continue its execution.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: October 15, 2013
    Assignee: International Business Machines Corporation
    Inventors: Michael M. Behrendt, Rafah A. Hosn, Ruchi Mahindru, Harigovind V. Ramasamy, Soumitra Sarkar, Mahesh Viswanathan, Norbert G. Vogl
  • Patent number: 8560887
    Abstract: A scalable and fault tolerant finite state machine engine, for example, for use in an automated incident management system, logs or records data in persistent storage at different points or levels during various internal processing of an event associated with an information technology element, and action taken associated with the event, by executing a finite state machine instance that encodes policies for handling incidents on such types of information technology elements. In the event that the finite state machine engine is shutdown during processing, the finite state machine engine is able to pick up from where it left off when it was shutdown, for each abnormally terminated finite state machine instance, by using the data logged in the persistent storage and determining a point of processing from where it should continue its execution.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: October 15, 2013
    Assignee: International Business Machines Corporation
    Inventors: Michael M. Behrendt, Rafah A. Hosn, Ruchi Mahindru, Harigovind V. Ramasamy, Soumitra Sarkar, Mahesh Viswanathan, Norbert G. Vogl
  • Patent number: 8555117
    Abstract: A system including a detection module, a reconstruction module, and a correlation module. The detection module receives first signals from a medium and detects data bits from the first signals. The reconstruction module reconstructs the data bits and generates second signals. The correlation module generates first correlation values by correlating the first and second signals and generates second correlation values by self-correlating the second signals. In response to at least one of the first and second signals including a floating number having a plurality of bits and a sign bit, the correlation module generates at least one of the first and second correlation values based on a plurality of most significant bits of the floating number and the sign bit of the floating number. The first and second correlation values indicate whether the data bits detected from the first signals include errors due to defects in the medium.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: October 8, 2013
    Assignee: Marvell International Ltd.
    Inventors: Shaohua Yang, Zining Wu
  • Patent number: 8533528
    Abstract: A system comprising a plurality of subsystems and a master power sequencer. Each of the plurality of subsystems is coupled to an associated power switch and an associated slave power sequencer. The master power sequencer is coupled to each of the slave power sequencers and each of the power switches. Upon a slave power sequencer identifying a fault with its associated subsystem, the master power sequencer determines whether to provide power to any other subsystem. Further, the master power sequencer is configured to send a signal to each of the power switches indicating whether to provide power to the subsystem associated with each of the power switches.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: September 10, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: David Maciorowski
  • Patent number: 8527807
    Abstract: A method begins by a processing module receiving data to store and determining error coding dispersal storage function parameters. The method continues with the processing module encoding at least a portion of the data in accordance with the error coding dispersal storage function parameters to produce a set of data slices. The method continues with the processing module defining addressable storage sectors within the single hard drive based on a number of data slices within the set of data slices to produce a set of addressable storage sectors. The method continues with the processing module storing data slices of the set of data slices in corresponding addressable storage sectors of the set of addressable storage sectors.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: September 3, 2013
    Assignee: Cleversafe, Inc.
    Inventors: S. Christopher Gladwin, Gary W. Grube, Timothy W. Markison
  • Patent number: 8522074
    Abstract: A method begins by a processing module receiving a first request to store a program. The method continues with the processing module determining first error coding dispersal storage function parameters and encoding a data segment of the program. The method continues with the processing module determining whether a second request to store the program is received. The method continues with the processing module encoding a second data segment of the program in accordance with the first error coding dispersal storage function parameters when the second request is not received. The method continues with the processing module changing the first error coding dispersal storage function parameters based on the another request to produce second error coding dispersal storage function parameters when the second request is received. The method continues with the processing module encoding the second data segment in accordance with the second error coding dispersal storage function parameters.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: August 27, 2013
    Assignee: Cleversafe, Inc.
    Inventors: Timothy W. Markison, Gary W. Grube, S. Christopher Gladwin, Alan E. Holmes, Wesley Leggette, Jason K. Resch
  • Patent number: 8522085
    Abstract: A computer-enabled method of learning the behavior of a program. A processor can execute a target program during a learning interval while varying a plurality of stimuli provided to the target program so as to produce a multiplicity of different sequences of events which differ in combinations of types of events in respective sequences, orders in which the types of events occur in respective sequences, or in the combinations and in the orders in which the types of events occur. The multiplicity of event sequences can be recorded, and a second program can be executed by a processor to: determine a plurality of clusters based on similarities between the event sequences in their entirety; and determine a plurality of signatures corresponding to the plurality of clusters. Each signature can be the longest common subsequence of all sequences in the respective cluster and thus representative of the cluster.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: August 27, 2013
    Assignee: TT Government Solutions, Inc.
    Inventors: Hiralal Agrawal, Clifford Behrens, Balakrishnan Dasarathy
  • Patent number: 8495447
    Abstract: A controller for a communications device, comprising: a receiver arranged for receiving a first data block and a second data block, each data block comprising a plurality of analogue signals; a digitizer arranged for converting each analogue signal into a digital value and marking each digital value as saturated when the digital value exceeds a digital range; and a processor arranged for modifying at least one digital value of the first block by combination with a corresponding digital value of the second block except where the digital value of the first block is marked as saturated and marking each modified value as saturated when the modified value is outside a defined range.
    Type: Grant
    Filed: November 26, 2007
    Date of Patent: July 23, 2013
    Assignee: Cambridge Silicon Radio Limited
    Inventor: Andrew Papageorgiou
  • Patent number: 8495427
    Abstract: Detecting defects in deployed systems, in one aspect, identify one or more monitoring agents used in a computer program. Total execution metric of the computer program and execution metric associated with the one or more monitoring agents are measured and the measure execution metric is compared with a specified overhead criteria. The execution of the one or more monitoring agents is adjusted based on the comparing step while the computer program is executing to meet the specified overhead criteria.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: July 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: Matthew R. Arnold, Martin Vechev, Eran Yahav
  • Patent number: 8495439
    Abstract: Exemplary method, system, and computer program embodiments for performing deterministic data verification by a storage controller are provided. Each of a plurality of concurrent write tasks is configured to be placed in a plurality of overlapping data storage ranges by performing at least one of: implementing a data generation function for generating pseudo-random data using a data seed, and generating a range map, the range map utilized as a lookup data structure to verify a chronological order for performing the plurality of concurrent write tasks, wherein a data address space is first designated in the range map as undetermined. Each of a plurality of read tasks is analyzed by comparing data read from a sub range in the plurality of overlapping data storage ranges against the data seed associated with the sub range.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: July 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: Yair Gur-Aryeh Chuchem, Adi Goldfarb, Zohar Zilberman
  • Patent number: 8464128
    Abstract: In one embodiment, an LDPC decoder attempts to recover an originally-encoded LDPC codeword based on a set of channel soft-output values. If the decoder observes a trapping set, then the decoder compares the observed trapping set to known trapping sets stored in a trapping-set database to determine whether or not the observed trapping set is a known trapping set. If the observed trapping set is not known, then the decoder selects a most-dominant trapping set from the trapping-set database and identifies the locations of erroneous bit nodes in the selected trapping set. Then, the decoder adjusts the channel soft-output values corresponding to the identified erroneous bit nodes. Adjustment is performed by inverting some or all of the hard-decision bits of the corresponding channel soft-output values and setting the confidence value of each corresponding channel soft-output value to maximum. Decoding is then restarted using the adjusted channel soft-output values.
    Type: Grant
    Filed: August 12, 2009
    Date of Patent: June 11, 2013
    Assignee: LSI Corporation
    Inventor: Kiran Gunnam