Patents Examined by Jason M Crawford
  • Patent number: 9618335
    Abstract: A system and method for adjusting light emitter output for a railway track inspection system based on data feedback from one or more sensors.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: April 11, 2017
    Assignee: Tetra Tech, Inc.
    Inventor: Darel Mesher
  • Patent number: 9615434
    Abstract: Lighting units, lighting systems, and methods are described herein for automatic and decentralized commissioning of a replacement lighting unit (140, 150, 250). In various embodiments, a replacement lighting unit may receive, from one or more remote lighting units over one or more communication networks, one or more identifiers associated with the one or more remote lighting units. The replacement lighting unit may also receive, from at least one of the one or more remote lighting units over the one or more communication networks, the lighting operation parameters associated with an inoperative lighting unit. The replacement lighting unit may then selectively energize one or more light sources (258) associated with the replacement lighting unit to emit light having one or more properties indicated in the lighting operation parameters associated with the inoperative lighting unit.
    Type: Grant
    Filed: May 21, 2015
    Date of Patent: April 4, 2017
    Assignee: PHILIPS LIGHTING HOLDING B.V.
    Inventors: Jurgen Mario Vangeel, John Andre Van Beurden, Robbert Martinus Andreas Driessen, Bas Van Berkel, Wicher Ido-Jan Gispen
  • Patent number: 9613700
    Abstract: A content addressable memory (“CAM”) field enabling logic comprises fields and field enable logics. The fields each have local match lines and a corresponding field enable control for enabling the respective field. The field enable logics are serially connected. Each of the fields is coupled to a corresponding one of the field enable logics via the respective local match lines. The corresponding field enable control for each of the fields is coupled to the corresponding one of the field enable logic and to any ones of the field enable logics that come after the corresponding one of the field enable logic along the serially-connected field enable logics.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: April 4, 2017
    Assignee: Invecas, Inc.
    Inventors: Harold Pilo, Gerald P. Pomichter, Michael Lee, John Edward Barth, Jr.
  • Patent number: 9603226
    Abstract: An LED lighting device includes a light emitting assembly including at least one LED and a wireless network interface connecting the LED lighting device to a network. The wireless network interface includes a RF transceiver. An antenna is in electrical communication with the RF transceiver. A thermally conductive housing receives the light emitting assembly, the thermally conductive housing in thermal communication with the at least one LED. In one aspect the thermally conductive housing is formed of a thermally conductive and electrically nonconductive material. In another aspect, the thermally conductive housing includes a first portion attached to a second portion, wherein the first portion is formed of a first, thermally conductive material and defines an interior cavity receiving the wireless network interface. The second portion is formed of a second, electrically nonconductive material and defines an aperture allowing optical output of the at least one LED to pass therethrough.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: March 21, 2017
    Assignee: THERMAL SOLUTION RESOURCES, LLC
    Inventors: E. Mikhail Sagal, Gary R. Arnold
  • Patent number: 9602103
    Abstract: As a technique for attaining a reduction in power consumption, there is a technique for reducing power consumption using a spin wave. No specific proposal concerning spin wave generation, spin wave detection, and a latch technique for information has been made. A device applies an electric field to a first electrode of a nonmagnetic material using a thin line-shaped stacked body including a first ferromagnetic layer and a nonmagnetic layer to thereby generate a spin wave in the first ferromagnetic layer, and detects a phase or amplitude of the spin wave propagated in the first ferromagnetic layer using a second electrode of a ferromagnetic material with a magnetoresistance effect.
    Type: Grant
    Filed: May 22, 2013
    Date of Patent: March 21, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Katsuya Miura, Susumu Ogawa, Kenchi Ito, Masaki Yamada
  • Patent number: 9595969
    Abstract: One aspect of the present invention includes a reciprocal quantum logic (RQL) readout system. The system includes an input stage on which a read pulse is provided and an output stage configured to propagate an output pulse. The system also includes an RQL comparator comprising a first Josephson junction and a second Josephson junction that are coupled to a qubit. A bias current switches between a first Josephson junction in a first quantum state of the qubit and a second Josephson junction in a second quantum state of the qubit. The first Josephson junction triggers to provide the output pulse on the output stage in the first quantum state in response to the read pulse and the second Josephson junction triggers to provide no output pulse on the output stage in the second quantum state in response to the read pulse.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: March 14, 2017
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Donald L. Miller, Ofer Naaman
  • Patent number: 9595963
    Abstract: Described herein are a method and an apparatus for dynamically switching between one or more finite termination impedance value settings to a memory input-output (I/O) interface of a memory in response to a termination signal level. The method comprises: setting a first termination impedance value setting for a termination unit of an input-output (I/O) interface of a memory; assigning the first termination impedance value setting to the termination unit when the memory is not being accessed; and switching from the first termination impedance value setting to a second termination impedance value setting in response to a termination signal level.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: March 14, 2017
    Assignee: Intel Corporation
    Inventors: James A McCall, Kuljit S Bains
  • Patent number: 9587818
    Abstract: Provided is an LED lighting apparatus with an improved heat radiation property, which is capable of effectively radiating heat generated therein. The LED lighting apparatus may include: a light source unit comprising a plurality of LED groups each having one or more LEDs; and a driving unit configured to provide a current path corresponding to light emission of the light source unit. The light source unit and the driving unit may be arranged on the same substrate so as to be separated from each other. Among the plurality of LED groups, the LED group having the largest heat value may be arranged farthest away from the driving unit, compared to the other LED groups. Through the above-described arrangement, the heat radiation property of the LED lighting apparatus can be improved.
    Type: Grant
    Filed: September 14, 2015
    Date of Patent: March 7, 2017
    Assignee: SILICON WORKS CO., LTD.
    Inventors: Yong Geun Kim, Sang Young Lee, Ki Chul An, Eun Ji Jo, Yun Hee Ra
  • Patent number: 9590635
    Abstract: Techniques and mechanisms disclosed herein provide a partial reconfiguration bitstream for a region of configurable logic of a programmable logic device over a communications interface such as the Peripheral Component Interconnect Express (PCIe) protocol.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: March 7, 2017
    Assignee: Altera Corporation
    Inventor: Shayan Sengupta
  • Patent number: 9590631
    Abstract: A semiconductor device includes a 2-input NAND decoder and an inverter that have six MOS transistors arranged in a line. The MOS transistors of the decoder are formed in a planar silicon layer disposed on a substrate and each have a structure in which a drain, a gate, and a source are arranged vertically and the gate surrounds a silicon pillar. The planar silicon layer includes a first active region having a first conductivity type and a second active region having a second conductivity type. The first and second active regions are connected to each other via a silicon layer on a surface of the planar silicon layer.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: March 7, 2017
    Assignee: UNISANTIS ELECTRONICS SINGAPORE PTE. LTD.
    Inventors: Fujio Masuoka, Masamichi Asano
  • Patent number: 9590633
    Abstract: A carry-skip one-bit full adder and a field programmable gate array device, the full adder includes: a first multiplexer, a second multiplexer, and an adder, the first multiplexer includes a first addend input end and a first constant input end configured to input a first constant to the first multiplexer; the second multiplexer includes a second addend input end and a second constant input end configured to input a second constant to the second multiplexer; when the first addend input end is not used for input of a first addend, and/or when the second addend input end is not used for input of a second addend, the first multiplexer selects to output the first constant input, and the second multiplexer selects to output the second constant input.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: March 7, 2017
    Assignee: Capital Microelectronics Co., Ltd.
    Inventors: Ping Fan, Jia Geng, Yuanpeng Wang
  • Patent number: 9584124
    Abstract: A semiconductor device may include a first channel provided in a first die. The semiconductor device may include a second channel provided in a second die and disposed adjacent to the first channel, and configured to exchange signals and data with the first channel. The first channel and the second channel may receive and output calibration-related signals from and to each other through bonding, and may share calibration start signals. The calibration start signal may be respectively generated in the first channel and the second channel.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: February 28, 2017
    Assignee: SK hynix Inc.
    Inventors: Won Kyung Chung, Saeng Hwan Kim
  • Patent number: 9584128
    Abstract: A structure of a multi-mode supported and configurable six-input look-up table (LUT), and a field-programmable gate array (FPGA) device. The six-input LUT has six signal input ends and two signal output ends. The six-input LUT includes: a first five-input LUT, a second five-input LUT, a first multiplexer, and a second multiplexer. The first five-input LUT outputs a first output signal according to five data signals input by five signal input ends of the six-input LUT, where the first output signal is output by a first signal output end of the six-input LUT; the second five-input LUT outputs a second output signal according to the five data signals input by the five signal input ends of the six-input LUT; and the first multiplexer outputs a control signal according to a set configuration mode, to control the second multiplexer to output the first output signal or the second output signal.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: February 28, 2017
    Assignee: Capital Microelectronics Co., Ltd.
    Inventors: Ping Fan, Jia Geng, Yuanpeng Wang
  • Patent number: 9574134
    Abstract: A voltage driven light emitting device includes an electroluminescent material and semiconductor nanocrystals, luminescent organic small molecules, mixtures of emissive species molecules, or conductive polymers. The semiconductor nanocrystals, luminescent organic small molecules, mixtures of emissive species molecules, or conductive polymers emit light. The semiconductor nanocrystals, luminescent organic small molecules, mixtures of emissive species molecules, or conductive polymers can be doped to provide desired emission characteristics. Devices that share a substrate and emit more than one color may be conveniently made.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: February 21, 2017
    Assignee: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
    Inventors: Vanessa Wood, Matthew J. Panzer, Jonathan E. Halpert, Moungi G. Bawendi, Vladimir Bulovic
  • Patent number: 9577641
    Abstract: Disclosed herein are semiconductor device arrays, such as, Field Programmable Gate Arrays (FPGAs) and Complex Programmable Logic Arrays (CPLAs) that use high-density Spin Transfer Torque (STT)-based memory elements. STT-based memory elements can either be stand-alone FPGAs/CPLAs, or can be embedded in microprocessors and/or digital signal processing (DSP) system-on-chip (SoC) to provide design flexibility for implementing low power, scalable, secure and reconfigurable hardware architecture. Because the configuration is stored on the FPGA/CPLA die itself, the need for loading the configuration from external storage every time is eliminated when the device is powered on. In addition to instant startup, eliminating configuration I/O traffic results in power savings and possible pin count reduction. Security is greatly improved by eliminating the need to store configuration data in an external memory.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: February 21, 2017
    Assignee: INTEL CORPORATION
    Inventors: Arijit Raychowdhury, James W. Tschanz, Vivek De
  • Patent number: 9575923
    Abstract: A method of operating an input/output interface includes selecting one of a plurality of output driver circuits according to a mode selection signal, and outputting a data signal using the selected one of the plurality of output driver circuits. Another method of operating an includes generating a mode selection signal based on a received command signal, and controlling an on-die termination (ODT) circuit included in the input/output interface according to the mode selection signal. Another method of operating an includes generating a mode selection signal based on a received command signal, and controlling an ODT circuit included in the input/output interface according to the mode selection signal.
    Type: Grant
    Filed: August 5, 2015
    Date of Patent: February 21, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young Chul Cho, Jung Bae Lee, Jung Hwan Choi
  • Patent number: 9564878
    Abstract: Apparatuses and methods are described that include a plurality of drivers corresponding to a single via. A number of drivers can be selected to operate individually or together to drive a signal through a single via. Additional apparatus and methods are described.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: February 7, 2017
    Assignee: Micron Technology, Inc.
    Inventor: Feng Lin
  • Patent number: 9565743
    Abstract: In a load control unit, three R, G, and B LED chips that constitute each light source (33a-33d) of reading lamps (25-31) and a connector (35) with a built-in controller are mounted on a circuit board (37) to thereby eliminate the connection of a controller (35b) built into the connector (35) with the built-in controller and the respective light sources (33a-33d) by signal lines. In addition, the controller (35b) and a lighting ECU (43) are connected by a multiplex communication line (39), and the multiplex communication line (39) is routed in pillars (15, 17) of a vehicle (1). Consequently, the number of wires can be reduced compared with when individual wires connected to the respective light sources (33a-33d) are passed through the pillars (15, 17), and thereby making it possible to effectively use limited spaces within the pillars (15, 17) through which many other wires are passed.
    Type: Grant
    Filed: October 1, 2013
    Date of Patent: February 7, 2017
    Assignee: YAZAKI CORPORATION
    Inventors: Terumitsu Sugimoto, Yasushi Oba, Masahiro Takamatsu
  • Patent number: 9565739
    Abstract: The present invention relates to a lamp control device of a construction machine and a lamp control method therefor, wherein the control of a plurality of lamps (for example: a working lamp, a deck lamp, a cabin lamp and a rear lamp) which are provided in a construction machine can be carried out by a first key input means which is a single typical switch button and a second key input means which is provided with a plurality of sub-setting keys such that unnecessary switches are removed from the inside of a cabin, thereby providing a more convenient and simplified equipment operation environment for workers.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: February 7, 2017
    Assignee: VOLVO CONSTRUCTION EQUIPMENT AB
    Inventor: Dong-Soo Kim
  • Patent number: 9565730
    Abstract: A backlight device includes: a light emitting unit that includes a plurality of light sources having different light emission colors from each other; a detection unit that detects light emission states of the plurality of light sources; a temperature sensor that measures a temperature in a proximity of the plurality of light sources; a brightness conversion unit that converts values indicating the detected light emission states to obtain a detection value for each color of the light emission colors; and a calculation unit that corrects the obtained detection value for each of the light emission colors by using information indicating a relationship between the measured temperature and a correction value, and determines drive values for the light sources based on the corrected detection value.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: February 7, 2017
    Assignee: NEC DISPLAY SOLUTIONS, LTD.
    Inventor: Katsuyuki Matsui