Patents Examined by Jason M Crawford
  • Patent number: 9730280
    Abstract: A ripple reduction circuit is provided. The ripple reduction circuit may include a ripple capacitor configured to drive at least a first segment of a string of light emitting diodes (LEDs), a first diode having an anode coupled to the ripple capacitor, and a cathode configured to be coupled to an input end of the first LED segment, a second diode having a cathode coupled to the ripple capacitor and the anode of the first diode, and an anode configured to be coupled between the first LED segment and a second LED segment of the string of LEDs, a third diode having an anode coupled to the ripple capacitor, and a cathode configured to be coupled to a last LED segment of the string of LEDs, and a fourth diode having a cathode coupled to the ripple capacitor and the anode of the third diode.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: August 8, 2017
    Assignee: Microchip Technology Inc.
    Inventor: Scott Lynch
  • Patent number: 9729148
    Abstract: To provide a semiconductor device including element layers that are stacked. A first wiring layer and a second wiring layer are stacked between a first element layer and a second element layer. A third wiring layer and a fourth wiring layer are stacked over the second element layer. Transistors of logic cells are provided in the first element layer. Wirings of the logic cells are provided in the first wiring layer or the second wiring layer. Input ports and output ports of the logic cells are provided in the third wiring layer. The input port of one of the logic cells is connected to the output port of another logic cell through the wiring of the third wiring layer or the fourth wiring layer. Connecting the logic cells through the wiring layers over the second element layer improves the efficiency of steps of arranging and connecting the logic cells.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: August 8, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hikaru Tamura, Naoaki Tsutsui, Atsuo Isobe
  • Patent number: 9720434
    Abstract: An electronic device 2 has circuitry 4 which operates in a first voltage domain 6 supplied with a first voltage level VDD1 and a reference voltage level. A voltage regulator 14 generates the first voltage level VDD1 from a second voltage level VDD2 higher than the first voltage level VDD1. At least one power gate 20, 30 is provided for selectively coupling the circuitry 4 to one of the first voltage level VDD1 or the reference level. The control signal 22 for the power gate 20, 30 is generated in a second voltage domain supplied with a higher voltage level VDD2 or VDD3 derived from the second voltage level VDD2 supplied to the voltage regulator 14. Hence, an existing high voltage source within the device 2 can be reused for applying a boosted voltage to power gates to improve efficiency of power gating.
    Type: Grant
    Filed: June 4, 2015
    Date of Patent: August 1, 2017
    Assignee: ARM Limited
    Inventors: James Edward Myers, David Walter Flynn, David William Howard
  • Patent number: 9723697
    Abstract: A system for alternating lighting-emitting of dynamic random access memory (DRAM) is provided, including a plurality of DRAMs and an application program. Each DRAM includes a processing unit and a lighting-emitting unit. The processing unit is able to trigger the lighting-emitting unit to emit light in a preset mode. The lighting-emitting units define a lighting-emitting module. The application program is installed in a mobile electronic device. The application program sends a signal to the processing units of the DRAMs via the mobile electronic device to match with and identify the DRAMs, and the application program can make each said processing unit control the light-emitting unit to emit light and make the light-emitting module emit light in a preset mode.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: August 1, 2017
    Assignee: ALSON TECHNOLOGY LIMITED
    Inventors: Han-Hung Cheng, Chi-Fen Kuo
  • Patent number: 9717132
    Abstract: An intelligent lighting control system is provided. The system includes at least one smart lighting device, including a control module, a lighting module, a microphone module and a wireless communication module, where the control module is connected to the lighting module, the microphone module, and the wireless communication module, respectively; the microphone module is configured to receive a voice instruction from a user and send the voice instruction to the control module; and the control module is configured to convert the voice instruction to a voice data signal. The system also includes a cloud server configured to perform voice recognition analysis on the voice data signal, convert the voice data signal to a control signal, and send the control signal to at least one smart home device. Further, the system includes the at least one smart home device configured to receive the control signal and perform a corresponding function.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: July 25, 2017
    Assignee: SENGLED OPTOELECTRONICS CO., LTD
    Inventors: Chaoqun Sun, Jinxiang Shen
  • Patent number: 9713213
    Abstract: An LED luminescence apparatus is provided, which includes a rectifying unit rectifying an AC voltage and generating a rectified voltage; a plurality of LEDs connected in series to an output terminal of the rectifying unit; a plurality of switches having drain terminals connected to cathodes of the plurality of LEDs, respectively; and a switch control unit sensing current through a plurality of resistors connected to source terminals of the plurality of switches, respectively, comparing the sensed current with a set reference current, and outputting a voltage corresponding to a difference between the sensed current and the set reference current to a gate terminal of each of the plurality of switches.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: July 18, 2017
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Hye Man Jung, Hyun Gu Kang, Snag Wook Han, Young Do Jung
  • Patent number: 9713232
    Abstract: A method of determining a distance from a first luminaire (22) to a second luminaire (22) comprises causing a light source co-located with the second luminaire to emit light directed towards a reflecting surface (A). The method further comprises detecting a level of reflected light from the reflecting surface using a sensor co-located with the first luminaire (22), and accessing a reflectance value determined for the reflecting surface (A). The method further comprises modifying the level of reflected light to take into account the accessed reflectance value, and using the modified measure to provide a measure of a distance between the first and second luminaires.
    Type: Grant
    Filed: September 1, 2014
    Date of Patent: July 18, 2017
    Assignee: PHILIPS LIGHTING HOLDING B.V.
    Inventors: Martinus Petrus Creusen, Alexander James
  • Patent number: 9705281
    Abstract: A semiconductor light source driving apparatus of the present disclosure includes a switching power supply that supplies a DC voltage, a power source switching FET, a coil, an inverting FET driver, a semiconductor light source device, and a free-wheeling diode. The power source switching FET switches on/off an output of a positive terminal of the switching power supply in accordance with an input PWM signal. The coil has a first end connected to the output of the power source switching FET. The inverting FET driver is connected between a second end of the coil and a negative terminal of the switching power supply and switched on/off in accordance with an input signal. The semiconductor light source device is connected between the second end of the coil and the negative terminal of the switching power supply. The first end of the coil and the negative terminal of the switching power supply are connected to the free-wheeling diode.
    Type: Grant
    Filed: August 3, 2016
    Date of Patent: July 11, 2017
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Takaaki Gyoten, Shinji Miyoshi
  • Patent number: 9706614
    Abstract: An illumination system includes a master power supply providing power to several illumination modules. The master power supply is constructed and arranged to generate high-frequency and low-voltage electrical power provided to a primary wire forming a current loop. Each illumination module includes an electromagnetic coupling element and several light sources.
    Type: Grant
    Filed: November 14, 2015
    Date of Patent: July 11, 2017
    Assignee: EMD TECHNOLOGIES INC.
    Inventors: Robert Beland, Giampaolo Carli
  • Patent number: 9704886
    Abstract: A plurality of writing transistors are connected in series, and a gate of a pass transistor, an input terminal of an inverter, or the like is directly or indirectly connected to each connection portion of the writing transistors. For example, a signal processing device includes first to third pass transistors, one semiconductor layer, and first to third wirings that overlap with the semiconductor layer and do not overlap with each other. Potentials of the first to third wirings can each change conductivities of at least portions of the semiconductor layer that overlap with the respective wirings. Gates of the first to third pass transistors are electrically connected to the semiconductor layer and are brought into a floating state depending on the conductivities of the portions of the semiconductor layer. Conduction between sources and drains of the pass transistors is controlled by potentials of the gates in the floating state.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: July 11, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yasuhiko Takemura
  • Patent number: 9698780
    Abstract: This disclosure relates to leakage current reduction in integrated circuits (ICs). In one aspect, an IC can include a digital logic circuit and a polarization circuit. The digital logic circuit can have a plurality of inputs and can include a plurality of logic gates. The polarization circuit can receive a standby signal and a digital input signal comprising a plurality of bits. When the standby signal is deactivated, the polarization circuit can control the plurality of inputs of the digital logic circuit based on the digital input signal. However, when the standby signal is activated the polarization circuit can control the plurality of inputs of the digital logic circuit to a low power state associated with a smaller leakage current of the plurality of logic gates relative to at least one other state of the digital logic circuit.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: July 4, 2017
    Assignee: MICRON TECHNOLOGY, INC.
    Inventor: Christophe Vincent Antoine Laurent
  • Patent number: 9693429
    Abstract: A system for controlling power supply according to the present disclosure includes a controlled device, a waveform control circuitry and a power detection and control circuitry. A supply voltage is provided to the controlled device for supplying power and, at the same time is applied to the waveform control circuitry for changing its waveform so as to generate a control signal. The control signal is then received and analyzed by the power detection and control circuitry to output a control command, which is used to control the controlled device. Based on the system for controlling power supply, there is also provided a method for controlling power supply, which may be implemented by a smart dimming system to realize remote control of lighting-on, lighting-off, dimming and color temperature regulation.
    Type: Grant
    Filed: June 6, 2016
    Date of Patent: June 27, 2017
    Assignee: Delta Greentech (China) Co., Ltd.
    Inventors: Bo Yang, Hu Peng, Xu Wang
  • Patent number: 9691760
    Abstract: A 3D device, including: a first layer including first transistors, the first transistors interconnected by a first layer of interconnection; a second layer including second transistors, the second transistors overlaying the first layer of interconnection, where the first layer includes a first clock distribution structure, where the second layer includes a second clock distribution structure, where the device includes a Phase Lock Loop (“PLL”) circuit, where the second clock distribution structure is connected to the Phase Lock Loop (“PLL”) circuit, and where the second transistors are aligned to the first transistors with less than 200 nm alignment error.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: June 27, 2017
    Assignee: MONOLITHIC 3D INC
    Inventors: Zvi Or-Bach, Zeev Wurman
  • Patent number: 9693432
    Abstract: A lighting device includes: a metal casing; a power supply circuit which is disposed in the metal casing and supplies power to a light source; an antenna disposed in the metal casing; a radio circuit which is disposed in the metal casing and receives a radio signal via the antenna; a control circuit which controls the power supply circuit according to the radio signal received by the radio circuit; at least one opening that communicatively connects an inside and an outside of the metal casing; and a line which is inserted in the at least one opening and insulated from the metal casing, the line being conductive and having open ends.
    Type: Grant
    Filed: February 11, 2016
    Date of Patent: June 27, 2017
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventor: Tamotsu Ando
  • Patent number: 9685953
    Abstract: In one form, a logic circuit includes an asynchronous logic circuit, a synchronous logic circuit, and an interface circuit coupled between the asynchronous logic circuit and the synchronous logic circuit. The asynchronous logic circuit has a plurality of asynchronous outputs for providing a corresponding plurality of asynchronous signals. The synchronous logic circuit has a plurality of synchronous inputs corresponding to the plurality of asynchronous outputs, a stretch input for receiving a stretch signal, and a clock output for providing a clock signal. The synchronous logic circuit provides the clock signal as a periodic signal but prolongs a predetermined state of the clock signal while the stretch signal is active. The asynchronous interface detects whether metastability could occur when latching any of the plurality of the asynchronous outputs of the asynchronous logic circuit using said clock signal, and activates the stretch signal while the metastability could occur.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: June 20, 2017
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventor: Greg Sadowski
  • Patent number: 9681525
    Abstract: The present disclosure provides systems and methods associated with controlling lighting based on a presentation display, such as a television, mobile device, white board, etc. The disclosed embodiments can involve a lighting system, a presentation display, a monitoring system, and a controller. The lighting system provides light to an area and may include a light source and an adjustment mechanism to adjust the light source. The lighting system can include natural light sources and/or artificial light sources. The adjustment mechanism may adjust, for example, one or more of an intensity, orientation, polarization, color, flicker rate, polarization, and other characteristics of the light source. The presentation display can be monitored by a monitoring system to monitor a status of the presentation display. The controller processes the status of the presentation display and signal the adjustment mechanism to adjust the light source, based on the status of the presentation display.
    Type: Grant
    Filed: April 2, 2015
    Date of Patent: June 13, 2017
    Assignee: ELWHA LLC
    Inventors: Roderick A. Hyde, Nathan P. Myhrvold, Tony S. Pan
  • Patent number: 9679164
    Abstract: A logic circuit includes n storage elements (n is a positive integer) which can each store 1-bit information, and an attack detection circuit. The attack detection circuit includes an error determination circuit which can detect through a logic operation that k-bit or less errors (k is a positive integer) have occurred in n-bit codes stored in the n storage elements, and a light irradiation detection circuit which has light detection elements and can detect that light has been irradiated to (k+1) or more of the n storage elements, and it is determined that the logic circuit has been attacked from outside when the error determination circuit detects an error or the light irradiation detection circuit detects light irradiation.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: June 13, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Yoshiyuki Amanuma, Takanori Miyoshi
  • Patent number: 9680472
    Abstract: Embodiments include apparatuses, methods, and systems for voltage level shifting a data signal between a low voltage domain and a high voltage domain. In embodiments, a voltage level shifter circuit may include adaptive keeper circuitry, enhanced interruptible supply circuitry, and/or capacitive boosting circuitry to reduce a minimum voltage of the low voltage domain that is supported by the voltage level shifter circuit. Other embodiments may be described and claimed.
    Type: Grant
    Filed: June 14, 2016
    Date of Patent: June 13, 2017
    Assignee: INTEL CORPORATION
    Inventors: Amit R. Trivedi, Jaydeep P. Kulkarni, Carlos Tokunaga, Muhammad M. Khellah, James W. Tschanz
  • Patent number: 9680476
    Abstract: A PLD in which a configuration memory is formed using a nonvolatile memory with a small number of transistors and in which the area of a region where the configuration memory is disposed is reduced is provided. Further, a PLD that is easily capable of dynamic reconfiguration and has a short startup time is provided. A programmable logic device including a memory element, a selector, and an output portion is provided. The memory element includes a transistor in which a channel is formed in an oxide semiconductor film, and a storage capacitor and an inverter which are connected to one of a source and a drain of the transistor. The inverter is connected to the selector. The selector is connected to the output portion.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: June 13, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Takayuki Ikeda
  • Patent number: 9678494
    Abstract: The present disclosure provides systems and methods associated with controlling lighting based on a presentation display, such as a television, mobile device, white board, etc. The disclosed embodiments can involve a lighting system, a presentation display, a monitoring system, and a controller. The lighting system provides light to an area and may include a light source and an adjustment mechanism to adjust the light source. The lighting system can include natural light sources and/or artificial light sources. The adjustment mechanism may adjust, for example, one or more of an intensity, orientation, polarization, color, flicker rate, polarization, and other characteristics of the light source. The presentation display can be monitored by a monitoring system to monitor a status of the presentation display. The controller processes the status of the presentation display and signal the adjustment mechanism to adjust the light source, based on the status of the presentation display.
    Type: Grant
    Filed: April 2, 2015
    Date of Patent: June 13, 2017
    Assignee: ELWHA LLC
    Inventors: Roderick A. Hyde, Nathan P. Myhrvold, Tony S. Pan