Patents Examined by Jenny L Wagner
  • Patent number: 9368947
    Abstract: A system and method for connecting supply power to motor control components includes use of a motor control center subunit with moveable supply power contacts. After a motor control center subunit is secured into a motor control center compartment, the supply power contacts may be advanced to engage supply power buses. For disconnection, the supply power contacts may be retracted and isolated from the buses before physical removal of the subunit.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: June 14, 2016
    Assignee: Eaton Corporation
    Inventors: Edgar Yee, Robert A. Morris, Scott E. McPherren, Neal Edward Rowe
  • Patent number: 9363897
    Abstract: Provided is a substrate with built-in electronic component including a component storage layer and two buildup layers. The component storage layer includes an electronic component and a cover portion having an insulating property. The electronic component includes a terminal surface and a main body. The cover portion includes a first surface formed to be flush with the terminal surface, covers the main body of the electronic component, and has a first linear expansion coefficient. The two buildup layers each include an insulating layer and a via portion. The insulating layer is adjacent to the cover portion and has a second linear expansion coefficient larger than the first linear expansion coefficient. The via portion is provided in the insulating layer and connected to the terminal surface. The insulating layer of one of the two buildup layers is formed to be in contact with the terminal surface and the first surface.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: June 7, 2016
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Yuichi Sugiyama, Tatsuro Sawatari, Yusuke Inoue, Masashi Miyazaki
  • Patent number: 9363894
    Abstract: A compact circuit device wherein a semiconductor element that performs high current switching is embedded is provided. The hybrid integrated circuit device (10) is provided with: a circuit board (12); a plurality of ceramic substrates (22A-22G) disposed on the top surface of the circuit board (12); circuit elements such as transistors mounted on the top surface of the ceramic substrates (22A-22G); and a lead (29) or the like that is connected to the circuit elements and is exposed to the outside. Furthermore, in the present embodiment, leads (28, 30, 31A-31C) are disposed superimposed in the vicinity of the center of the circuit board (12), and a circuit element such as an IGBT is disposed and electrically connected approaching the region at which the leads are superimposed. The alternating current transformed by the IGBT is output externally via the leads (31A, etc.).
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: June 7, 2016
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Takashi Shibasaki, Hidefumi Saito, Takahisa Makino, Masanori Shimizu, Daisuke Sasaki
  • Patent number: 9362205
    Abstract: A compact circuit device wherein a semiconductor element that performs high current switching is embedded is provided. A lead (30) and lead (28) though which high current passes are disposed superimposed on the upper surface of a circuit board (12). Also, a plurality of ceramic substrates (22A-22F) are affixed to the circuit board (12), and transistors, diodes, or resistors are mounted to the upper surface of the ceramic substrates. Furthermore, the circuit elements such as the transistors or diodes are connected to the lead (28) or the other lead (30) via fine metal wires.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: June 7, 2016
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Takashi Shibasaki, Hidefumi Saito, Takahisa Makino, Masanori Shimizu, Daisuke Sasaki
  • Patent number: 9357642
    Abstract: A circuit board laminate includes a metal substrate, an insulation layer disposed on the metal substrate, and a metal foil disposed on the insulation layer. A metal-based circuit board includes a metal substrate, an insulation layer disposed on the metal substrate, and a circuit pattern disposed on the insulation layer. The insulation layer contains a liquid crystal polyester and 50% by volume or more of an inorganic filler. The inorganic filler is made of boron nitride and at least one of aluminum nitride and aluminum oxide. A proportion of boron nitride in the inorganic filler is within a range of 35 to 80% by volume.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: May 31, 2016
    Assignees: NHK SPRING CO., LTD., SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Katsumi Mizuno, Kazuhiko Konomi, Yutaka Natsume, Ryo Miyakoshi, Takeshi Kondo
  • Patent number: 9343889
    Abstract: There is provide an electric wire fixing device improving storage performance of electric wires while preventing the electric wires from being displaced along a longitudinal direction of the electric wire. An electric wire fixing device includes a bottom wall at which an electric wire is disposed and a pair of side walls extending from the bottom wall to position the electric wire between each other, one side wall being provided with a hole through which a fixation member for fixing the electric wire is passed. The fixation member is passed through the hole and wound around the electric wires so that the electric wires are placed close to the bottom wall and fixed. The bottom wall includes a projecting piece extending from the bottom wall and located between the electric wires and the bottom wall, and the fixation member is passed between the projecting piece and the bottom wall.
    Type: Grant
    Filed: November 8, 2011
    Date of Patent: May 17, 2016
    Assignee: Yazaki Corporation
    Inventors: Koki Sato, Takeshi Onoda
  • Patent number: 9343204
    Abstract: An electrical insulator apparatus and methods of using the same are provided. The apparatus includes an insulator body formed about a central axis, the insulator body having a plurality of spaced fins positioned along an exterior of the insulator body. A first jaw portion is positioned on an upper portion of the insulator body. A second jaw portion is positioned proximate to the first jaw portion and is movable with respect to the first jaw portion. At least one fastener is connected between the first and second jaw portions. A jaw platform is positioned at least partially between the first and second jaw portions, wherein the first and second jaw portions and the jaw platform form a notch sized to receive an electrical conductor, wherein the jaw platform substantially lies within a first plane angled substantially between 6° and 184° with respect to the central axis of the insulator body.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: May 17, 2016
    Assignee: Marmon Utility, LLC
    Inventors: Charles J. Clement, Guberson Mercedat, Michael L. Williams, May Cho, Leonard P. Jean
  • Patent number: 9343361
    Abstract: In one embodiment, a semiconductor device includes a semiconductor substrate having a first surface, and a second surface opposite to the first surface. The second surface defines a redistribution trench. The substrate has a via hole extending therethrough. The semiconductor device also includes a through via disposed in the via hole. The through via may include a via hole insulating layer, a barrier layer, sequentially formed on an inner wall of the via hole. The through via may further include a conductive connector adjacent the barrier layer. The semiconductor device additionally includes an insulation layer pattern formed on the second surface of the substrate. The insulation layer pattern defines an opening that exposes a region of a top surface of the through via. The semiconductor devices includes a redistribution layer disposed in the trench and electrically connected to the through via. The insulation layer pattern overlaps a region of the conductive connector.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: May 17, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ho-Jin Lee, Tae-Je Cho, Dong-Hyeon Jang, Ho-Geon Song, Se-Young Jeong, Un-Byoung Kang, Min-Seung Yoon
  • Patent number: 9343887
    Abstract: An apparatus and method is provided for inhibiting theft of electrical wiring through the access opening of the frangible base of a highway utility pole, such as a light pole. Prior to securing the pole to the frangible base, a hollow body having an upper flange is inserted into the base so the flange is positioned on the upper surface of the frangible base. The electrical power supply cable is run up through the center of the hollow body and clamped to the hollow body and/or to a theft protection device used for a utility pole with a standard base. The electrical connection cable from the pole's electrical fixture is then attached to the power supply cable, and the pole and the hollow body are secured to the base by fastening means.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: May 17, 2016
    Inventor: Timothy Earnest Butler
  • Patent number: 9343426
    Abstract: An assembly process properly positions and align a plurality of first die within a carrier substrate. The first die are positioned within cavities formed in the carrier substrate. The carrier substrate is then aligned with a second substrate having a plurality of second die fabricated therein. The first die and the second die are fabricated using different technologies. Aligning the carrier substrate and the second substrate aligns the first die with the second die. One or more first die can be aligned with each second die. Once aligned, a wafer bonding process is performed to bond the first die to the second die. In some cases, the carrier substrate is removed, leaving behind the first die bonded to the second die of the second substrate. In other cases, the carrier substrate is left in place as a cap. The second substrate is then cut to form die stacks.
    Type: Grant
    Filed: January 7, 2013
    Date of Patent: May 17, 2016
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Pirooz Parvarandeh
  • Patent number: 9335496
    Abstract: A photoelectric conversion module includes a circuit board including a plurality of first board-side electrodes and a plurality of second board-side electrodes that are alternately arranged on a mounting surface of the circuit board in an array direction and each extend into strips in a direction orthogonal to the array direction, a photoelectric conversion array element mounted on the circuit board and including, on a surface facing the mounting surface, a plurality of light receiving/emitting portions, first element-side electrodes connected to the first board-side electrodes and second element-side electrodes connected to the second board-side electrodes, and an IC chip mounted on the circuit board. The circuit board further includes, on the mounting surface, a connecting portion for connecting the first board-side electrodes to each other and a first electrode land portion connected to the first board-side electrode or the connecting portion to contact with a first test electrode probe.
    Type: Grant
    Filed: January 12, 2012
    Date of Patent: May 10, 2016
    Assignee: Hitachi Metals, Ltd.
    Inventors: Masanobu Ito, Hiroki Yasuda, Kouki Hirano
  • Patent number: 9330945
    Abstract: An integrated circuit package system with multi-chip module is provided including: providing an upper substrate having an upper chip thereon; positioning a lower chip under the upper chip, the lower chip having bottom interconnects thereon; encapsulating the upper chip and the lower chip with a chip encapsulant on the upper substrate with the bottom interconnects exposed; mounting the lower chip over a lower substrate with a gap between the chip encapsulant and the lower substrate; and filling the gap with a package encapsulant or chip attach adhesive.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: May 3, 2016
    Assignee: STATS ChipPAC Ltd.
    Inventors: Sungmin Song, SeungYun Ahn, JoHyun Bae, Jong-Woo Ha
  • Patent number: 9330944
    Abstract: An implantable bio-compatible integrated circuit device and methods for manufacture thereof are disclosed herein. The device includes a substrate having a recess. An input/output device including at least one bio-compatible electrical contact is coupled to the substrate in the recess. A layer of hermetic bio-compatible, hermetic insulator material is deposited on a portion of the input/output device. An encapsulating layer of bio-compatible material encapsulates at least a portion of the implantable device, including the input/output device. At least one bio-compatible electrical contact of the input/output device is then exposed. The encapsulating layer and the layer of bio-compatible, hermetic insulator material form a hermetic seal around the at least one exposed bio-compatible electrical contact.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: May 3, 2016
    Assignee: THE CHARLES STARK DRAPER LABORATORY, INC.
    Inventors: Brian R. Smith, Tirunelveli S. Sriram, Bryan L. McLaughlin
  • Patent number: 9324502
    Abstract: Provided is a lithium ion capacitor that can maintain a high capacity retention rate and suppress an increase in internal resistance even after high-load charging-discharging is repeated many times and that has long service life because the occurrence of a short circuit due to precipitation of lithium on the negative electrode is prevented. The lithium ion capacitor comprises a positive electrode, a negative electrode, and an electrolyte solution, the negative electrode including a current collector and electrode layers that contain a negative electrode active material and are formed on front and back surfaces of the current collector, wherein, in the negative electrode, ratios of deviations of respective thicknesses of the electrode layers formed on the front and back surfaces of the current collector from an average of the thicknesses of the electrode layers to the average is ?10 to 10%.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: April 26, 2016
    Assignee: JM Energy Corporation
    Inventors: Naoshi Yasuda, Takashi Chiba, Kazuyoshi Okada, Kuniyasu Hiraiwa
  • Patent number: 9326370
    Abstract: Provided is a printed circuit board capable of increasing an inductance value of a power pattern and a ground pattern while keeping a low electric resistance value of the power pattern and the ground pattern. The printed circuit board includes a printed wiring board including: a power layer having a power pattern formed therein; and a ground layer having a ground pattern formed therein. On the printed wiring board, an LSI as a semiconductor device and an LSI as a power supply member are mounted. The ground pattern has a first ground region that overlaps the power pattern as viewed from the direction perpendicular to the surface of the printed wiring board. In the first ground region, at least one defect portion is formed. In the first ground region, the defect portion forms a region that is narrower than the power pattern.
    Type: Grant
    Filed: March 28, 2013
    Date of Patent: April 26, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Yusuke Murai, Sou Hoshi, Nobuaki Yamashita
  • Patent number: 9326411
    Abstract: A connection device is provided connecting an electronic component that is arranged on a carrier to a housing part. The connection device has a first bush for receiving a first fastening unit which is used to fasten the connection device to the carrier and a second bush for receiving a second fastening unit for fastening the connection device to the housing part. The first bush is thermally insulated from the second bush. A controller has an electronic component which is arranged on the carrier and which is connected or can be connected to the housing part by use of such a connection device.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: April 26, 2016
    Assignee: KNORR-BREMSE Systeme fuer Nutzfahrzeuge GmbH
    Inventors: Markus Eichner, Thomas Uhland
  • Patent number: 9320151
    Abstract: A sleeve structure includes an electrically insulating protective sleeve having clips that retain and capture component pins and regulate a mounting distance of the electrical component from a wiring structure. A method of component wiring assembly is also included.
    Type: Grant
    Filed: October 17, 2012
    Date of Patent: April 19, 2016
    Assignee: General Electric Company
    Inventor: Khanh Q. Nguyen
  • Patent number: 9320133
    Abstract: A surface mount electrical interconnect is disclosed that provides an interface between a PCB and solder balls of a BGA device. The electrical interconnect includes a socket substrate and a plurality of electrically conductive contact members. The socket substrate has a first layer with a plurality of openings configured to receive solder balls of the BGA device and has a second layer with a plurality of slots defined therethrough that correspond to the plurality of openings. The contact members may be disposed in the openings in the first layer and through the plurality of slots of the second layer of the socket substrate. The contact members can be configured to engage a top portion, a center diameter, and a lower portion of the solder ball of the BGA device. Each contact member electrically couples a solder ball on the BGA device to the PCB.
    Type: Grant
    Filed: December 5, 2011
    Date of Patent: April 19, 2016
    Assignee: HSIO Technologies, LLC
    Inventor: James Rathburn
  • Patent number: 9320147
    Abstract: A semiconductor module assembly is provided. The semiconductor module assembly includes a motherboard, a socket, and a semiconductor module. The motherboard includes an opening for receiving the semiconductor module, the opening including at least three sides. The socket is disposed in the opening along at least a first side, second side, and third side of the at least three sides. The semiconductor module is disposed in the socket. The semiconductor module includes at least one semiconductor device mounted on a module board. The socket includes at least a first side along the first side of the opening, and a second side along the second side of the opening, and the semiconductor module electrically connects to the motherboard through at least the first and second sides of the socket.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: April 19, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong-Hyeon Cho, Jae-Jun Lee, Jung-Joon Lee, Baek Kyu Choi, Seung-Jin Seo
  • Patent number: 9313880
    Abstract: A determination mark formation portion is provided in each suspension board. In the determination mark formation portion, a recess having a given depth is provided in a base insulating layer. An outer peripheral portion is formed on the base insulating layer to surround the recess. A plating layer is formed on the outer peripheral portion. A circular hole is formed on a support substrate. The hole of the support substrate and the recess of the base insulating layer overlap each other.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: April 12, 2016
    Assignee: NITTO DENKO CORPORATION
    Inventors: Terukazu Ihara, Naohiro Terada