Patents Examined by Jenny L Wagner
  • Patent number: 9780460
    Abstract: There is provided an electric cable connection terminal. A first connection part is configured to connect the one electric cable thereto. A second connection part is configured to connect the other electric cable thereto. A waterproof member is configured to be melted to seal leading end portions of core wires of the electrics cable when being heated and configured to be solidified to waterproof the leading end portions when being cooled. An accommodation part accommodating the waterproof member therein is provided between the first and second connection parts. A thermal shrinkage member is provided to cover the first and second connection parts and the accommodation part and configured to be shrunken when being heated to closely contact the first and second connection parts and the accommodation part. When the cables are connected to the first and second connection part, respectively, the core wires are arranged at an interval.
    Type: Grant
    Filed: June 18, 2012
    Date of Patent: October 3, 2017
    Assignee: YAZAKI CORPORATION
    Inventor: Naoki Koto
  • Patent number: 9763318
    Abstract: The present invention discloses a circuit, a display substrate and a display device, the circuit comprises a plurality of circuit modules, distances of at least one circuit module from two circuit modules adjacent thereto are a first distance and a second distance, respectively, the first distance is smaller than the second distance, and the absolute value of the difference between the second distance and the first distance is not equal to an integer multiple of the first distance. In the present invention, distances of at least one circuit module from two circuit modules adjacent thereto satisfy the above specific condition, so that at least one circuit module can be prevented from being positioned at the middle position of the standing wave field between the two circuit modules adjacent thereto, therefore, interference of standing wave to transmission signals is reduced, and signal distortion and signal attenuation are alleviated.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: September 12, 2017
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xingchen Shangguan, Pan Li, Jian Xu, Yongda Ma
  • Patent number: 9735477
    Abstract: Terminal pin for electrically connecting a carrier of electrical leads or an electronic component by means of a solder connection between the carrier or component and the terminal pin, wherein an end of a pin body is provided with a swaged cap of a material which is harder than the material of the pin body and which has an outer surface which is suitable for making the solder connection, wherein the cap has an inner circumferential edge where the cap is at least locally narrowed to inside of the outer circumference of the pin body, and wherein there is no additional material between the pin body and the cap.
    Type: Grant
    Filed: October 14, 2014
    Date of Patent: August 15, 2017
    Assignee: BIOTRONIK SE & Co. KG
    Inventors: John Roos, Frederik Sporon-Fiedler
  • Patent number: 9734736
    Abstract: An electronic device includes a self-emitting display panel, a first transparent substrate, a second transparent substrate and two combining elements. The first transparent substrate includes two first edge portions and a first cover portion. The second transparent substrate includes two second edge portions and a second cover portion. The self-emitting display panel is disposed between the first cover portion and the second cover portion. The self-emitting display panel has a first surface facing to and covered entirely by the first cover portion and a second surface facing to and covered entirely by the second cover portion. One of the two combining elements is connected between one of the two first edge portions and one of the two second edge portions, and the other of the two combining elements is connected between the other of the two first edge portions and the other of the two second edge portions.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: August 15, 2017
    Assignee: AU OPTRONICS CORP.
    Inventor: Hsu-Sheng Hsu
  • Patent number: 9715951
    Abstract: A cable includes one or more conductor sets. Each conductor set includes one or more central conductors surrounded by a dielectric material. Shielding films are disposed on opposite sides of the conductor sets. In cross-section, cover portions of the shielding films in combination substantially surround each conductor set, and pinched portions of the shielding films in combination form pinched portions of the cable on each side of each conductor set. For at least one shielding film in a pinched portion, the conductive layer, but not the non-conductive layer, includes a break.
    Type: Grant
    Filed: July 13, 2016
    Date of Patent: July 25, 2017
    Assignee: 3M Innovative Properties Company
    Inventor: Douglas B. Gundel
  • Patent number: 9685776
    Abstract: A sealing unit (28) fits within the sealing unit opening (26) of a housing 22. The sealing unit (28) including a sealant arrangement (32) that define a plurality of cable ports (30). The sealing arrangement is also configured for providing a peripheral seal between the housing (22) and the sealing unit (28). The sealing unit (28) includes an actuation arrangement (31) for pressurizing the sealant arrangement (32) within the sealing unit opening (26). The sealant arrangement (32) includes a plurality of sealing modules (33a-33e) each sized to form only a portion of the pressure actuated sealant arrangement (32).
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: June 20, 2017
    Assignee: CommScope Connectivity Belgium BVBA
    Inventors: Philippe Coenegracht, Mohamed Aznag, Paul Joseph Claes, Dirk Jozef G. Van De Weyer, Maarten Michiels, Diederik Houben, Pieter Doultremont, Eddy Maes, Geert Van Genechten, Maddy Nadine Frederickx, Emilie De Groe
  • Patent number: 9681566
    Abstract: An electronic arrangement (1) comprising a carrier (2), on which at least one connecting area (6) is arranged. At least one electronic component (3a, 3b, 3c) is fixed on the connecting area (6) by means of a contact material (4). A covering area (5) surrounds the connecting area (6) on the carrier (2). At least one covered region (15, 16, 17, 18, 19) is covered by a covering material (10). The covering material (10) is designed in such a way that an optical contrast between the covering area (5) and the covered region (15, 16, 17, 18, 19) is minimized.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: June 13, 2017
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Thomas Bemmerl, Simon Jerebic, Markus Pindl
  • Patent number: 9681547
    Abstract: An electronic device includes: a housing including an opening; a connector configured to be exposed from the opening and to allow a connection member to be coupled thereto; and a cable configured to cover at least a portion of a gap between the connector and the opening and to be electrically coupled to the connector.
    Type: Grant
    Filed: March 20, 2013
    Date of Patent: June 13, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Daisuke Mihara, Hirohisa Nakabayashi, Ikki Tatsukami
  • Patent number: 9673598
    Abstract: A cover assembly for an electrical box, such as a fire-rated poke through, includes a frame defining an opening, the frame including a first frame location and a second frame location, the first frame location being substantially opposite the second frame location, a cover movable between a closed position over the opening and an open position away from the opening, the cover having a perimeter including a proximal end and a distal end, the proximal end being substantially opposite the distal end, and a hinge attaching the cover to the rear frame portion, the hinge having two substantially parallel pivot axes, at least one of which is movable towards and away from the other, one pivot axis located at the first frame location and the other pivot axis located at the proximal end of the cover.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: June 6, 2017
    Assignee: Hubbell Incorporated
    Inventors: Joseph V. DeBartolo, Jr., Sorin I. Mortun, Stephen R. Ewer
  • Patent number: 9674970
    Abstract: In a method of manufacturing a module board, an electronic component is mounted on a first principal surface of a small board. A cavity defining a through hole is formed in a core board. The electronic component is housed in the cavity by mounting the small board on a surface electrode arranged around the cavity. Resin layers are formed on both principal surfaces of the core board, and resin flows through a gap between the core board and the small board. Hence, the inside of the cavity is filled with the resin, and the electronic component is sealed with the resin.
    Type: Grant
    Filed: November 26, 2012
    Date of Patent: June 6, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Issei Yamamoto, Akihiko Kamada
  • Patent number: 9668346
    Abstract: A terminal portion configured to obtain electrical connection with a printed circuit board includes a first signal pad that is formed in a first conductor layer and is electrically separated from a ground layer, a pair of first ground pads that is formed in the first conductor layer to sandwich the first signal pad and is connected to the ground layer, a second signal pad that is formed in a second conductor layer and is connected to a signal line, a pair of second ground pads that is formed in the second conductor layer to sandwich the second signal pad and is electrically separated from the signal line, a third signal pad formed in a third conductor layer, and a pair of third ground pads formed in the third conductor layer to sandwich the third signal pad. The second signal pad is wider than the third signal pad.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: May 30, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Mizuki Shirao, Nobuo Ohata, Nobuyuki Yasui, Hiroshi Aruga
  • Patent number: 9653656
    Abstract: An LED package with trenches traversing a die pad to provide a mechanical interlock mechanism to strengthen bonding between the die pad and an insulator such that de-lamination is less likely to occur between the die pad and the insulator. A chip carrying region is defined by a barrier portion formed by the insulator in the trenches and in gaps between electrodes and the die pad, such that a light converting layer is confined within the barrier portion.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: May 16, 2017
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Hsun-Wei Chan
  • Patent number: 9648794
    Abstract: The present disclosure provides a wiring board including a thin film member configured to include an inorganic dielectric film formed over an overall area of a mounting face thereof for an electronic part, a first conductive film formed over an overall area of one of faces of the inorganic dielectric film and including a plurality of patch electrode portions disposed in a predetermined pattern corresponding to a predetermined electromagnetic band gap structure in at least part of the area, and a second conductive film formed over an overall area of the other face of the inorganic dielectric film.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: May 9, 2017
    Assignee: SONY CORPORATION
    Inventor: Shinji Rokuhara
  • Patent number: 9648761
    Abstract: A cover covers a fuse unit to which a terminal is fixed in a manner such that a nut is fastened onto a bolt placed with the tip thereof facing outward. The cover is provided, on the inner surface thereof in a position corresponding to the nut, with a protrusion having a height set in a manner such that the protrusion does not interfere with the nut located in a fastened position, but interferes with the nut located in another position other than the fastened position. A thin portion is formed on the circumference of the protrusion.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: May 9, 2017
    Assignee: YAZAKI CORPORATION
    Inventor: Yusuke Matsumoto
  • Patent number: 9620288
    Abstract: A chip-component structure includes an interposer and a multilayer capacitor mounted thereon. The interposer includes a substrate, a component connecting electrode, an external connection electrode, and a side electrode. The component connecting electrode and the external connection electrode are electrically connected by the side electrode. The component connecting electrode is joined to an external electrode of the multilayer capacitor. The substrate includes a communication hole that communicates between opposite spaces opening in both principal surfaces of the substrate.
    Type: Grant
    Filed: August 3, 2012
    Date of Patent: April 11, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuo Hattori, Isamu Fujimoto
  • Patent number: 9612705
    Abstract: An electroconductive film includes a transparent conductive layer having a plurality of electrodes which extend in one direction. The electrodes have different electrode widths depending on the site, and are configured of a plurality of polygonal cells formed of fine metal wires. The sizes of the respective cells are not uniform. The average size of the cells is greater than or equal 1/30, and less than 1/3, of the narrowest width of the electrodes. The average size of the cells is uniform in the electrodes overall.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: April 4, 2017
    Assignee: FUJIFILM Corporation
    Inventor: Hiroshige Nakamura
  • Patent number: 9615453
    Abstract: A substrate comprising a solid glass core having a first surface and a second surface opposed to the first surface; multiple conductors extending through the solid glass core beginning at the first surface and ending at the second surface, wherein one of the conductors has a third surface and a fourth surface, wherein the third surface and the first surface are substantially coplanar, wherein the second surface and the fourth surface are substantially coplanar, wherein one of the conductors comprise a copper-tungsten alloy material, wherein the solid glass core is directly contact with the conductor; and a first dielectric layer and a first metal layer formed at the first surface, wherein the first metal layer at the first surface is electrically coupled with one of the conductors.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: April 4, 2017
    Inventor: Ping-Jung Yang
  • Patent number: 9613732
    Abstract: A wire harness manufacturing method prevents inadvertent deformation of thermoplastic material and separation of thermoplastic material. A predetermined part of an electric wire 91 is accommodated in a through hole of a tubular body formed by connection between a first and second nest members (123, 124) of a nozzle (12), by integrally connecting first and second case body members (121, 122) of the nozzle (12), with the predetermined part of the electric wire 91 therebetween. An approximately tubular covering member (92) covering the predetermined part of the electric wire (91) is molded integrally with the thermoplastic material, by discharging thermoplastic material plasticized by a material plasticizing unit (11) from thermoplastic material discharge orifices (1213) and (1223) in the nozzle (12) to the outer periphery of the electric wire (91), while moving the electric wire (91) and the nozzle (12) relatively to each other.
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: April 4, 2017
    Assignees: AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Osamu Sato
  • Patent number: 9615473
    Abstract: A flexible electronic device is disclosed, including: a case frame, comprising a plurality of unit case frames space at regular intervals, engaged to move relative to one another, a substrate, disposed in an inner space defined by an interior of the case frame, and electrically coupling a plurality of unit substrates that are spaced at regular intervals using a flexible electrical coupler, a battery pack, disposed in the inner space, including a plurality of unit battery cells at regular intervals using a flexible electrical connection means, the unit battery cells configured to move relative to one another, and a flexible display, coupled to the case frame and positioned so that a display surface of the flexible display is exposed.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: April 4, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: In-Soo Kim
  • Patent number: 9607771
    Abstract: A flexible supercapacitor, a method of manufacturing the same, and a device including the same are provided, the flexible supercapacitor includes a first flexible electrode assembly, a second flexible electrode assembly corresponding to the first flexible electrode assembly, a separator for preventing contact between the first flexible electrode assembly and the second flexible electrode assembly, and an electrolyte between the first flexible electrode assembly and the second flexible electrode assembly. The flexible supercapacitor may include a tube including the first flexible electrode assembly, the second flexible electrode assembly, the separator, and the electrolyte.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: March 28, 2017
    Assignees: Samsung Electronics Co., Ltd., Georgia Tech Research Corporation
    Inventors: Young-jun Park, Jong-min Kim, Zhong-lin Wang, Joon-ho Bae