Abstract: A multilayer wiring substrate includes first principal surface side connection terminals arranged on a first principal surface of a stacked configuration; wherein, the first principal surface side connection terminals include an IC chip connection terminal, and a passive element connection terminal; the IC chip connection terminal is located in an opening formed in a resin insulating layer of an uppermost outer layer; the passive element connection terminal is formed of an upper terminal part formed on the resin insulating layer, and a lower terminal part located in an opening formed at a portion of an inner side of the upper terminal part in the resin insulating layer; and, wherein an upper face of the upper terminal part is higher than a reference surface, and an upper face of the IC chip connection terminal and the lower terminal part are identical in height to or lower in height than the reference surface.

Abstract: A mounting adapter for mounting a device on a support rail includes a central body, at least one rail attaching member, and at least one detent. The rail attaching member projects rearward from the body and is configured for releasable attachment to at least one of the upper and lower flanges of the support rail. The detent projects forward from the body. The detent is resiliently deflectable relative to the body and configured for releasable attachment to the electronic device.

Abstract: A semiconductor device is of a PoP structure such that first electrode portions provided on a first device mounting board constituting a first semiconductor module and second electrode portions provided in a second semiconductor module are joined together by solder balls. A first insulating layer having an opening is provided on one main surface of an insulating resin layer which is a substrate, and an electrode portion, whose top portion protrudes above the top surface of the first insulating layer, is formed in the opening. A second insulating layer is provided on top of the first insulating layer in the periphery of the top portion of the first electrode portion; the second insulting layer is located slightly apart from the top portion of the first electrode portion. The first electrode portion is shaped such that the top portion is formed by a curved surface or formed by a curved surface and a plane surface smoothly connected to the curved surface.

Abstract: A wiring substrate includes a heat sink to dissipate heat generated in an electronic part mounted in an electronic part loading area on a principal surface of the wiring substrate, an encapsulation resin to cover the heat sink, an inner connection terminal having an end face electrically connected to an electrode of the electronic part, and an outer connection terminal electrically connected to the inner connection terminal via a wiring and having an end face for inputting and outputting of a signal with an external device. The encapsulation resin is arranged to cover a part of the wiring, the inner connection terminal except the end face, and the outer connection terminal except the end face. A surface of the heat sink, the end face of the inner connection terminal, and the end face of the outer connection terminal are flush with and exposed to the principal surface.

Abstract: A composite substrate is disclosed. In one aspect, the substrate has a stretchable and/or flexible material. The substrate may further have patterned features embedded in the stretchable and/or flexible material. The patterned features have one or more patterned conducting layers.

Abstract: A circuit board (2) includes an insulation layer (7) where a via conductor (10) is embedded. The via conductor (10) includes: a first conductor portion (10a) having an lower portion narrower than an upper portion; and a second conductor portion (10b) which is formed immediately below the first conductor portion (10a), connected to the first conductor portion (10a), and has a maximum width greater than the upper end width of the first conductor portion (10a). The insulation layer (7) has a plurality of indentations (T1a, T1b) on the surface in contact with the via conductor (10). Convex portions (T2a, T2b) of the via conductor are arranged in the indentations (T1a, T1b).

Abstract: An electromagnetic interference (EMI) shielding material includes a matrix of a dielectric or partially conducting polymer, such as foamed polystyrene, with carbon nanotubes or other nanostructures dispersed therein in sufficient concentration to make the material electrically conducting. The composite is formed by dispersing the nanotube material in a solvent in which the dielectric or partially conducting polymer is soluble and mixing the resulting suspension with the dielectric or partially conducting polymer. A foaming agent can be added to produce a lightweight foamed material. An organometallic compound can be added to enhance the conductivity further by decomposition into a metal phase.

Abstract: A lead pin comprising including a body having a shaft portion and a flange portion. The flange portion has at least one flat portion configured to face a connection pad and groove portions positioned to face toward the connection pad and extending from a peripheral portion toward a center portion of the flange portion, the flat portion includes extending portions extending from a center of the flange toward the peripheral portion of the flange and connected at the center of the flange, and the groove portions are tilted to become deeper toward the peripheral portion of the flange.

Abstract: Packaged optoelectronic device include a first barrier layer having a plurality of feedthrough apertures communicating with at least one electrode layer of the device, and a plurality of conductive patches disposed on at least one of the plurality of feedthrough apertures for electrically connecting the device to a power supply. Each conductive patch includes a conductive metal surface layer and a non-conducting surface layer having an opening exposing the metal surface layer.

Abstract: A photosensitive conductive film 10 according to the invention includes a support film 1, a conductive layer 2 containing conductive fiber formed on the support film 1, and a photosensitive resin layer 3 formed on the conductive layer 2.

Abstract: In a printed wiring board, a first inner layer wiring line is formed on one surface of a wiring line formation layer, a resin film made of electric insulation resin is formed on an area other than the first inner layer wiring line formed on the wiring line formation layer. The resin film and the first inner layer wiring line have the same plane surface. A second wiring line is formed on the resin film, and the second wiring line is thinner in thickness than the first inner layer wiring line. A limit of error in thickness of the resin film and the first inner layer wiring line is within 10% of the thickness of each of the resin film and the first inner layer wiring line.

Abstract: The present invention discloses an electrode of a biosensor, a manufacturing method thereof, and a biosensor thereof. The electrode of the biosensor comprises a flexible insulation layer, a resin layer, a first metal layer, a second metal layer, a third metal layer and a fourth metal layer. The resin layer is disposed between the flexible insulating layer and the first metal layer. The second metal layer is disposed between the first metal layer and the third metal layer, and the fourth metal layer is disposed on the third metal layer. The material of the first metal layer comprises copper foil. The material of the second metal layer comprises palladium. The material of the third metal layer comprises nickel, and the material of the fourth metal layer comprises gold or palladium. The electrode further comprises a biological active substance immobilized on the surface of the plurality of metal layers.

Abstract: The present invention relates to a multi-layer laminate or substrate manufacturing process for forming soldering surfaces on a substrate of a module without requiring a solder mask. In one embodiment, a substrate is provided having a substrate body, soldering pads, and a metal segment. A patterned mask is formed over the substrate such that soldering surfaces of the soldering pads remain exposed. The soldering surfaces of the soldering pads are plated to create plated soldering surfaces over the soldering pads. The plated soldering surfaces are the regions for solder placement. The patterned mask is then removed from the substrate. Next, an anti-wetting treatment is applied to the substrate such that any unplated metal surfaces react to the anti-wetting treatment to form treated surfaces. As such, the plated soldering surfaces will wet solder while the treated surface will not wet solder. In a preferred embodiment, the anti-wetting treatment is an oxidation process.

Abstract: The present invention relates to a coreless substrate and a method for making the same. The method for making the coreless substrate includes: (a) providing a carrier and a first conductive layer, wherein the carrier has a first surface and a second surface, and the first conductive layer is disposed on the first surface of the carrier; (b) forming a first embedded circuit on the first conductive layer; (c) forming a first dielectric layer so as to cover the first embedded circuit; (d) removing the carrier; (e) removing part of the first conductive layer so as to form at least one first pad; and (f) forming a first solder mask so as to cover the first embedded circuit and the first dielectric layer and to expose the first pad. Therefore, the coreless substrate of the present invention has high density of layout and involves low manufacturing cost.

Abstract: A module substrate includes a multilayer substrate that includes a plurality of layers, a bottommost of the layers being a ceramic layer. Solderable contacts, which include fired pads composed of a conductive paste, are applied to the bottommost ceramic layer. A covering layer overlies the pads. The covering layer covers all outer edges of the pads. A window is cut out of the covering layer. A metallic coating is applied to each pad exclusively within the window.

Abstract: An electronic apparatus wiring harness is provided that includes: a fixed-side casing and a moving-side casing, the moving-side casing being provided with a moving-side casing base which is rotatably journalled to the fixed-side casing, and a sliding portion which is provided so as to be slidable on a slide surface provided in the moving-side casing base. The circuit of the sliding portion and the circuit of the fixed-side casing are electrically connected together by an electric wire, which is a wiring harness having a flat cable portion having electric wire bodies arranged in parallel and formed in a tape shape having a jacket strip portion in which a number of the electric wire bodies are bundled; the flat cable portion is arranged in a bent manner so as to form a U shape on the slide surface of the moving-side casing base.

Abstract: A mounting apparatus includes a chassis, a mounting tray configured for being secured to an expansion card, and an expansion piece configured for securing the expansion card. The chassis includes a front plate. The mounting tray includes a front panel secured to the front plate, and a side panel connected to the front panel. A stopper piece is located on the front plate, and a clipping hole is defined on an end near to the front plate of the side plate. A flange and an inserting portion are positioned on opposite ends of the expansion piece, wherein the flange is secured to the stopper piece, and the inserting portion is inserted into the clipping hole.

Abstract: Disclosed herein are a printed circuit substrate and a method of manufacturing the same. The printed circuit substrate includes an insulating layer, and a circuit layer that includes a circuit pattern disposed on the insulating layer and a barrier layer that is disposed to cover at least one surface of the circuit pattern and suppresses electrochemical migration from the circuit pattern, thereby making it possible to achieve high-density and secure reliability, and the method of manufacturing the same.

Abstract: A process of copper plating a through-hole in a printed circuit board, and the printed circuit board made from such process. The process comprises: providing a printed circuit board with at least two copper interconnect lines separated by an insulator in the vertical direction; providing a through-hole in the printed circuit board in the vertical direction such that the interconnect lines provide a copper land in the through-hole; applying a seed layer to an interior surface of the through-hole; removing an outermost portion of the seed layer from the interior surface of the through-hole with a laser; applying copper on the seed layer.

Abstract: An LNBF is disclosed. The LNBF includes a housing, a spacer, down-converter circuit, and an F-connector. The spacer is disposed on the housing, wherein a hole is formed on the spacer. The down-converter circuit board is disposed between the housing and the spacer. The F-connector is disposed on the spacer and electrically connected to the down-converter circuit board via the hole.