Abstract: Disclosed herein is a semiconductor device wherein a thyristor protective element and a trigger element are provided in a semiconductor layer formed on a buried insulating layer, and a trigger electrode (gate) of the thyristor protective element and a back gate of the trigger element are provided in the same p well and electrically connected to each other to thereby drive the thyristor protective element based on a substrate current produced by the breakdown of the trigger element.

Abstract: An LED based on a two well system with charge asymmetric resonance tunnelling comprises first and second coupled wells, one being a wide well and the other an active quantum well. The wells are coupled via a resonance tunnelling barrier which is transparent for electrons and blocking for holes.

Abstract: A chip-type light-emitting device (10) with case includes a chip (12), and the chip is die-bonded onto an electrode (16a) formed on a substrate (14). Furthermore, the light-emitting device includes a case (20) having holes (24a, 24b) at an approximately center of respective lower portions on first side surfaces of the case, and steps (26a, 26b) formed on respective upper edges of second side surfaces. A transparent resin for sealing the chip is filled from the holes to be filled in the case 2. At this time, the transparent resin is flowed from bottom to top in the case, and an air is discharged from an air vent which includes the steps.

Abstract: Disclosed is a blue light emitting diode comprising a laminate structure formed in the center of a first conductive nitride semiconductor layer, a first electrode formed on a part of a transparent metal layer included in the laminate structure and a second electrode formed on a peripheral part of the first conductive nitride semiconductor layer, which is not covered by the laminate structure. By altering the locations of the first electrode and the second electrode and forming electrode extensions thereof, it is possible to disperse effectively the current density. Accordingly, the concentration of the current density contributing to the rapid increase of the temperature can be avoided without a significant change of the laminate structure of the conventional light emitting diode. In addition it is possible to improve resistance to electrostatic discharge and to reduce the driving voltage.

Abstract: A microelectronic structure with a low voltage part and high voltage part, such that the low voltage part is protected against the high voltage part and process of obtaining this protection. The structure includes at least one low-voltage element (2) and at least high-voltage element (4) formed on a semi-conductor substrate (6). According to the invention, at least one channel (18) is formed, passing through the low-voltage element and one semi-conductor zone is formed with doping opposite to that of the substrate, at least around the walls of the channel or channels and a contact point (24) is established in this zone. Application to smart power integrated circuits.

Abstract: A semiconductor substrate has a main surface, a well, a plurality of memory cells, a first memory cell region, a second memory cell region, a border region, a well contact region, a first dummy element, a second dummy element, a first transistor and a second transistor. The first and second memory cell regions are located over the well. The memory cells are formed in the first and second memory cell regions. The border region is located over the well on a border between the first memory cell region and the second memory cell region. The well contact region is formed in the well in the border region and is electrically connected to a wiring layer for fixing the voltage of the well. The first and second dummy elements are formed in the border. The first transistor, that is a component of the memory cell, is formed in the first memory cell region and is located adjacent to the first dummy element.

Abstract: To suppress spike voltage generated at turn-off operation, a semiconductor device according to the invention comprises a first region composed of a first conductor, a second region composed of a second conductor formed on top of the first region, a third region composed of the first conductor formed on top of the second region and a fourth region composed of the second conductor formed on top of the third region. The second region is comprised of a depletion-layer forming auxiliary layer having a short lifetime and formed in the vicinity of the third region, a tail-current suppression layer having a shorter lifetime than that of the depletion-layer forming auxiliary layer and formed in the vicinity of the first region and a depletion-layer forming suppression layer having a longer lifetime than that of the depletion-layer forming auxiliary layer and formed between the depletion-layer forming auxiliary layer and the tail-current suppression layer.

Abstract: A semiconductor memory device has a semiconductor substrate, a peripheral circuit region and a memory cell region on the principal surface of the semiconductor substrate. The semiconductor memory device has a first well formed in the peripheral circuit region, a second well of first conductivity type and a third well of second conductivity type formed in the memory cell region having substantially the same depth, and a device element isolator formed in the memory cell region for isolating a device element formed in the second well from a device element formed in the third well. The second and third wells extend to an area under the device element isolator. The second and third wells extend to a level under the device element isolator. The second and third wells may include a first layer having a depth shallower than the first well, and a second layer having substantially the same depth as the first well.

Abstract: In an accumulation mode MOSFET, a surface channel layer is disposed on a p− type base region between an n+ type source region and an n− type epi layer. The surface channel layer is composed of an n type channel layer formed on the p− type base region and a p type channel layer formed on the n type channel layer. A gate insulating film is formed on the p type channel layer. A channel is formed in the n type channel layer. Accordingly, channel mobility can be improved and on-resistance can be reduced without being affected by a state of an interface between the gate insulating film and the surface channel layer.

Abstract: High power LED lamps for use in lighting products, such as flashlights and the like, are formed of a plurality of LED die arranged in a multi-dimensional array, each of the LED die having a gallium nitride semiconductor layer and phosphor material for creation of white light. Each of the LED die emits light from the top, bottom and sides of the die and is arranged on the multi-dimensional array so that the emitted light from each of the die does not contact another die. A reflector gathers and focuses the light from each of the die to approximate a high power LED lamp. A thermally conducting, electrically insulating material or phase change material is incorporated into the lamp to act as a source of heat removal.

Abstract: An improved LED lead frame packaging assembly includes a thermally conducting, electrically insulating material that enhances the thermal conduction and structural integrity of the assembly, a UV-resistant encapsulantmaterial, and an integral ESD material that reduces electrostatic discharge. The thermally conducting, electrically insulating material creates an electrically insulating, thermally conductive path in the lead frame assembly for dissipation of power and also acts as a mounting structure thus allowing for the use of a soft encapsulant material, preferably a silicone.

Abstract: A capacitor having a signal electrode connected to a signal conductor, a ground electrode connected to a ground conductor and a dielectric disposed between the two. In the capacitor, delay-time-dependent limits are moved to higher frequency ranges in order to extend the applicability in the frequency range. This is accomplished by the signal conductor or the ground conductor being spaced apart from the signal electrode or the ground electrode and thus from the dielectric having a high dielectric constant. The signal conductor or the ground conduct is subdivided into at least two conductor regions that are separated in the direction of signal propagation. Each of the conductor regions is electrically connected via at least one conductor connector to the signal conductor or to the ground conductor, respectively.