Patents Examined by John B Freal
  • Patent number: 11564316
    Abstract: An apparatus comprising a stack of printed circuit board (PCB) layers having a primary longitudinal structure forming a radio frequency (RE) via including a principal tuning section (223) and a constant longitudinal structure (227) along a conductive column support (255) journaled through the layers in the via. The principal section (221) comprising a first tuning sub-assembly (229 A) in a first portion of the RE via above the longitudinal structure (227) and at an entrance of the primary longitudinal structure (221) and comprising a first set of pad, anti-pad pairs (445, 545, 645) tuned to receive an RE band. A second principal tuning sub-assembly (229B) in a second portion of the via below the longitudinal structure (227) and at an exit of the primary longitudinal structure and comprising a second set of pad, anti-pad pairs (445, 545, 645) tuned to receive the band and mirroring the first set of pairs.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: January 24, 2023
    Assignee: LOCKHEED MARTIN CORPORATION
    Inventor: Jesse Michael Zamarron
  • Patent number: 11553587
    Abstract: A display panel with display and non-display regions has pixel units in the display region. The non-display region defines a bonding region in which there are traces and driving chips. The driving chips are bonded in a flexible printed circuit, and electrically connect with the pixel units. The traces include high-speed signal traces, power traces, and grounding traces. The grounding traces are adjacent to the power traces and so disposed as to shield against electromagnetic interference affecting the signal and power traces, the grounding traces serving as reference ground to the power traces, and form a shield against electromagnetic interference.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: January 10, 2023
    Assignee: JADARD TECHNOLOGY INC.
    Inventors: Yi-Wei Hung, Gang Liu
  • Patent number: 11545793
    Abstract: A printed circuit board is housed in a connector. A temperature sensor is mounted on the printed circuit board between two connection pads located on one of the faces of the printed circuit board. A contact housed in the connector is placed in thermal continuity with two thermal conduction lands, one of which is arranged on the same face of the printed circuit board as the connection pads and the other of which is arranged beneath the temperature sensor. Each of the connection pads is connected to a temperature measurement circuit.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: January 3, 2023
    Assignee: APTIV TECHNOLOGIES LIMITED
    Inventors: Olivier Malandain, Stéphane Barlerin
  • Patent number: 11540390
    Abstract: Forming, in a printed-wiring board, a via sufficiently filled without residual smear, for use in an insulating layer and the size of the via to be formed. A via of a printed-wiring board comprises a first filling portion which fills at least a center portion of a hole, and a second filling portion which fills a region of the hole that is not filled with the first filling portion. An interface which exists between the second and first filling portions, or an interface which exists between the second filling portion and an insulating layer and the first filling portion has the shape of a truncated cone comprising a tapered surface which is inclined to become thinner from a first surface toward a second surface, and an upper base surface which is positioned in parallel to the second surface and closer to the first surface than to the second surface.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: December 27, 2022
    Assignee: KYOCERA Corporation
    Inventors: Tomoya Nagase, Shinri Saeki
  • Patent number: 11523499
    Abstract: A flexible wiring board includes a layer including an impedance control line capable of transmitting a high frequency signal and a conductive layer including a conductor positioned along the impedance control line. The flexible wiring board is capable of transmitting high frequency signals well.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: December 6, 2022
    Assignee: KYOCERA Corporation
    Inventor: Akira Ukon
  • Patent number: 11516911
    Abstract: A glass circuit board includes, on a glass substrate, a stress relief layer, a seed layer, and an electroplated layer including copper plating. The stress relief layer is an insulator formed by dry coating method and applies a compressive residual stress to the glass substrate at room temperature. The stress relief layer thus reduces cracking, fracturing or warpage of the glass substrate caused by thermal expansion and shrinkage of the copper plating due to heating and cooling of the glass circuit board during manufacturing or thermal cycling, ensuring high connection reliability of the glass circuit board.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: November 29, 2022
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventor: Masahiko Kijima
  • Patent number: 11516912
    Abstract: Disclosed is a printed circuit board (PCB) module including a first PCB comprising a base PCB, a sidewall disposed on a periphery of the base PCB, and conductive vias penetrating the sidewall, a second PCB disposed on the sidewall to cover a cavity formed by the sidewall of the first PCB, and at least one electronic component disposed inside the cavity and located on the first PCB and/or the second PCB, wherein the sidewall comprises a first layer disposed on an upper face of the base PCB and constructed of an insulating member, a second layer disposed on the first layer and comprising a polyimide, a third layer disposed on the second layer and constructed of an insulating member, and a fourth layer disposed on the third layer and comprising a conductive member conductive with respect to the conductive vias.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: November 29, 2022
    Inventors: Jongmin Jeon, Eunseok Hong
  • Patent number: 11516905
    Abstract: A method may include receiving a first and a second complementary signal to provide differential signaling. The method may further include providing a first conductor trace to transport the first complementary signal; providing a second conductor trace to transport the second complementary signal, the second conductor trace immediately adjacent to the first conductor trace; providing a third conductor trace to transport the first complementary signal, the third conductor trace immediately adjacent to the second conductor trace; and providing a fourth conductor trace to transport the second complementary signal, the fourth conductor trace immediately adjacent to the third conductor trace.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: November 29, 2022
    Assignee: Dell Products L.P.
    Inventors: Sandor Farkas, Bhyrav Mutnury
  • Patent number: 11510321
    Abstract: An electronic device includes a flexible circuit structure. The flexible circuit structure includes a flexible substrate and an insulator. The flexible substrate has a surface on which a plurality of pads are disposed. The insulator is disposed on the flexible substrate and is disposed between two adjacent pads of the plurality of pads.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: November 22, 2022
    Assignee: INNOLUX CORPORATION
    Inventors: Wei-Cheng Chu, Chia-Cheng Liu, Ming-Fu Jiang
  • Patent number: 11503709
    Abstract: A printed wiring board includes resin insulating layers including an outermost resin insulating layer, conductor layers laminated on the resin insulating layers, a copper layer formed in the outermost insulating layer, and metal bumps formed on the copper layer such that the bumps have upper surfaces protruding from the outermost insulating layer and that each metal bump includes Ni film, Pd film and Au film. The copper layer is reduced in diameter toward upper surface side such that the copper layer has upper and bottom surfaces and each upper surface has diameter that is smaller than diameter of each bottom surface, the outermost insulating layer has cylindrical sidewalls formed such that at least part of the copper layer is not in contact with the sidewalls, and the bumps are formed such that the Ni film is filling spaces between the copper layer and the sidewalls of the outermost insulating layer.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: November 15, 2022
    Assignee: IBIDEN CO., LTD.
    Inventor: Shota Tachibana
  • Patent number: 11490549
    Abstract: A high-frequency module includes: a chassis which is made of a conductor and which has an internal space; a high-frequency circuit board which is housed in the internal space of the chassis; and a resistive element provided between an inner wall that opposes the high-frequency circuit board among inner walls of the chassis which define the internal space and the high-frequency circuit board.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: November 1, 2022
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Hiroshi Hamada, Hideyuki Nosaka
  • Patent number: 11489417
    Abstract: Design and packaging of wide bandgap (WBG) power electronic power stages are disclosed herein. An example apparatus includes a first printed circuit board (PCB) including: a first voltage phase circuit cluster; a second voltage phase circuit cluster; and a cluster of traces, the cluster of traces routed substantially perpendicular to the second voltage phase circuit cluster; a second PCB positioned below the first PCB; and a connector to connect the first PCB to the second PCB, the connector electrically coupled to the first voltage phase circuit cluster by the cluster of traces.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: November 1, 2022
    Assignee: Deere & Company
    Inventor: Brij N Singh
  • Patent number: 11490520
    Abstract: A PCB, a method of manufacturing the PCB, and a mobile terminal are provided. The PCB includes a PCB body and a PCB element. A first surface of the PCB body is provided with a groove. The PCB element includes a connection terminal, and a part of the PCB element is arranged within the groove. The connection terminal includes a first portion arranged within the groove and a second groove arranged outside the groove, and the first portion is electrically connected to conductive layers in the PCB body.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: November 1, 2022
    Assignee: VIVO MOBILE COMMUNICATION CO., LTD.
    Inventor: Houxun Tang
  • Patent number: 11483924
    Abstract: A substrate support structure includes: a substrate support including: a support body; and a protrusion including a base portion and a leading-end portion, the protrusion protruding from the support body; and a substrate having: a substrate body; a through hole provided at the substrate body; and a protruded portion surrounding the through hole, the protruded portion protruding from a first face of the substrate body, in which the base portion of the protrusion passes through the through hole, and the leading-end portion protrudes from the first face of the substrate body inside the protruded portion and engages with the substrate body such that the through hole is covered.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: October 25, 2022
    Assignee: YAZAKI CORPORATION
    Inventors: Keitaroh Nozawa, Hidehiko Shimizu, Shinji Kawai
  • Patent number: 11477892
    Abstract: A PCB, printed circuit board, structure for forming at least one embedded electronic component. The structure comprises a multi-layer PCB board comprising at least one through-hole via, the via comprising a plurality of electrodes vertically aligned within the via, each electrode comprising a plated ring; and an isolation section separating each of the electrodes.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: October 18, 2022
    Assignee: UNIVERSITY OF LIMERICK
    Inventors: John Harris, Jennifer Hennessy, Seamus Clifford, Mark Southern
  • Patent number: 11477924
    Abstract: An interface for mitigating electromagnetic interference (EMI) on a printed circuit board (PCB) is disclosed. The PCB can contain circuit components and includes one or more signal planes sandwiched between corresponding ground planes. The PCB has a first and second side and an interface region separating the first and second sides that includes a partition wall projecting outward from the interface region, configured for EMI shielding between the first side and second sides, one or more pairs of input and output pads straddling the interface region on respective first and second sides and configured to accommodate an EMI line filter, and a ground barrier within the printed circuit board under the interface region. A method of mitigating EMI using the interface is also disclosed.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: October 18, 2022
    Assignee: HAMILTON SUNDSTRAND CORPORATION
    Inventors: Constantinos J. Mantis, Edward John Marotta, James A. Gosse
  • Patent number: 11469582
    Abstract: The present invention can provide a twisting antigalloping device for securing to a span of a cable for torsionally twisting the cable, and includes a grip or clamp portion having a grip or clamp axis for gripping or clamping to the cable along the clamp axis. A variable weight portion can be connected to the clamp portion and extend along a variable weight axis offset from the clamp axis. The variable weight portion can include an elongate member with a plurality of individual weights secured on the elongate member.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: October 11, 2022
    Assignee: AR PATENTS, LLC
    Inventor: Albert S. Richardson, Jr.
  • Patent number: 11468799
    Abstract: A flexible circuit board assembly and a flexible display device include a first flexible circuit board, a T-shaped flexible circuit board, and a second flexible circuit board. The first flexible circuit board and the second flexible circuit board are located on a top of the T-shaped flexible circuit board and are coplanar with the T-shaped flexible circuit board. Two ends of a top of the T-shaped flexible circuit board are connected respectively to the first flexible circuit board and the second flexible circuit board perpendicularly.
    Type: Grant
    Filed: January 8, 2020
    Date of Patent: October 11, 2022
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventor: Hao Xia
  • Patent number: 11470713
    Abstract: A circuit board with inbuilt heat dissipating structure includes a stacked structure and the heat dissipation structure. The stacked structure includes first and second copper layers and a cover plate. The embedded heat dissipation structure includes a base body, a thermally conductive adhesive, and a phase changing liquid. The base body penetrates the first copper layer and the first substrate layer, is connected to the second copper layer, and defines grooves. The grooves contain the phase changing liquid. The thermally conductive adhesive seals the ends of the grooves and the cover plate is located on a surface of the stacked structure and covers the thermally conductive adhesive. A method for manufacturing the circuit board is further disclosed.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: October 11, 2022
    Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD
    Inventor: Si-Hong He
  • Patent number: 11470721
    Abstract: A printed circuit board according to an embodiment includes: a first insulating portion having a cavity; a second insulating portion disposed on the first insulating portion; a third insulating portion disposed under the first insulating portion; and an electronic device disposed in the cavity, wherein a number of layers of the second insulating portion is different from a number of layers of the third insulating portion, and has an asymmetric structure with respect to the first insulating portion in which the electronic device is disposed.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: October 11, 2022
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Won Suk Jung