Patents Examined by John B Freal
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Patent number: 11638348Abstract: A conductive interconnect structure comprises a polymeric substrate (e.g., a thermoplastic) and a plurality of compliant conductive microstructures (e.g., conductive carbon nanofibers) embedded in the polymeric substrate. The microstructures can be arranged linearly or in a grid pattern. In response to heating, the polymeric substrate transitions from an unshrunk state to a shrunken state to move the microstructures closer together, thereby increasing an interconnect density of the compliant conductive microstructures. Thus, the gap or pitch between adjacent microstructures is reduced in response to heat-induced shrinkage of the polymeric substrate to generate finely-pitched microstructures that are densely pitched, thereby increasing the current-carrying capacity of the microstructures.Type: GrantFiled: July 21, 2020Date of Patent: April 25, 2023Assignee: Raytheon CompanyInventors: Kyle L. Grosse, Catherine Trent
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Patent number: 11632862Abstract: A wiring board includes a core layer having a first through hole formed therein, a magnetic resin filled inside the first through hole, a second through hole formed in the magnetic resin, and a plating film covering an inner wall surface of the second through hole. The plating film includes an electroless plating film, and an electrolytic plating film. The electroless plating film makes direct contact with an inner wall surface of the second through hole.Type: GrantFiled: August 2, 2021Date of Patent: April 18, 2023Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Junichi Nakamura, Takeshi Takai, Yusuke Karasawa, Yoshihisa Kanbe, Shuhei Momose, Toshiki Shirotori
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Patent number: 11632861Abstract: The invention, which relates to the technical field of circuit boards, specifically discloses a method for manufacturing an embedded circuit board, an embedded circuit board, and an application thereof. The method includes: providing a substrate, wherein an electronic component is embedded in the substrate, a pad is arranged on a side surface of the electronic component, and an end surface of the pad is flush with a same side surface of the substrate; forming a metallic layer on a side surface of the substrate adjacent to the pad by sputtering, evaporation, electroplating or chemical vapor deposition; and patterning the metallic layer to obtain a circuit board covered with the metallic layer on the pad, wherein the metallic layer on the pad protrudes beyond the same side surface of the substrate.Type: GrantFiled: December 28, 2020Date of Patent: April 18, 2023Assignee: SHENNAN CIRCUITS CO., LTD.Inventors: Lixiang Huang, Zedong Wang, Hua Miao
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Patent number: 11632858Abstract: Proposed is an anodic aluminum oxide structure made of anodic aluminum oxide and, more particularly, is an anodic aluminum oxide structure that minimizes damage to a material in the vicinity of a conductor and prevents a problem of delamination between the conductor and a member existing thereon.Type: GrantFiled: March 22, 2021Date of Patent: April 18, 2023Inventors: Bum Mo Ahn, Seung Ho Park, Dong Eun Lee
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Patent number: 11616331Abstract: An adapter assembly including a power box that has a housing containing internal components, a longitudinal axis and a storage portion. The adapter assembly also includes a first cord coupled to and extending from the housing, an adapter including an engagement portion that is removably coupled to the storage portion of the housing and that selectively engages a power source-receiving portion of a tool, and a second cord having a first end coupled to the adapter and a second end coupled to the housing.Type: GrantFiled: April 17, 2019Date of Patent: March 28, 2023Assignee: Milwaukee Electric Tool CorporationInventors: Dean Nowalis, David M. Schwalbach, Paul Rossetto, Brian Alves
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Patent number: 11589457Abstract: A wiring substrate includes: an insulating substrate comprising a corner constituted by two adjacent surfaces; wiring located continuously across the corner; wherein on at least one of the two adjacent surfaces, a part of the wiring disposed at an edge located at the corner has a thickness larger than a part of the wiring disposed away from the edge.Type: GrantFiled: June 28, 2019Date of Patent: February 21, 2023Assignee: KYOCERA CorporationInventor: Seiichirou Itou
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Patent number: 11581721Abstract: The present invention can provide a twisting antigalloping device for securing to a span of a cable for torsionally twisting the cable, and includes a grip or clamp portion having a grip or clamp axis for gripping or clamping to the cable along the clamp axis. A variable weight portion can be connected to the clamp portion and extend along a variable weight axis offset from the clamp axis. The variable weight portion can include an elongate member with a plurality of individual weights secured on the elongate member.Type: GrantFiled: April 12, 2022Date of Patent: February 14, 2023Assignee: AR PATENTS, LLCInventor: Albert S. Richardson, Jr.
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Patent number: 11582872Abstract: A circuit board with conductive wiring which is precisely shaped and sized includes a two-part conductive element, namely a first conductive wiring layer and a second conductive wiring layer, a first cover film and a second cover film. The first conductive wiring layer and the second conductive wiring layer are in direct contact to each other. A projection of the first conductive wiring layer and a projection of the second conductive wiring layer along a direction perpendicular to the circuit board overlap with each other. The first and the second cover films wrap the first and the second conductive wiring layers, respectively.Type: GrantFiled: June 6, 2019Date of Patent: February 14, 2023Assignees: Avary Holding (Shenzhen) Co., Limited., HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd.Inventors: Ke-Jian Wu, Fang-Bo Xu, Peng Wu, Jian-Quan Shen
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Patent number: 11570893Abstract: In an electrical connection device in which an adhesive layer is disposed on a flexible base and a conductor pattern is provided on the adhesive layer, an elastomer pattern obtained by curing an ink containing an elastomer composition is formed on the adhesive layer, the conductor pattern obtained by curing an ink containing a conductive particle is formed on the elastomer pattern, and a longitudinal elastic modulus of the elastomer pattern is set to be larger than a longitudinal elastic modulus of the adhesive layer.Type: GrantFiled: May 4, 2022Date of Patent: January 31, 2023Assignee: JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITEDInventors: Junya Sato, Ryosuke Mitsui, Yoshiaki Yamabayashi, Atsushi Tanaka
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Patent number: 11564316Abstract: An apparatus comprising a stack of printed circuit board (PCB) layers having a primary longitudinal structure forming a radio frequency (RE) via including a principal tuning section (223) and a constant longitudinal structure (227) along a conductive column support (255) journaled through the layers in the via. The principal section (221) comprising a first tuning sub-assembly (229 A) in a first portion of the RE via above the longitudinal structure (227) and at an entrance of the primary longitudinal structure (221) and comprising a first set of pad, anti-pad pairs (445, 545, 645) tuned to receive an RE band. A second principal tuning sub-assembly (229B) in a second portion of the via below the longitudinal structure (227) and at an exit of the primary longitudinal structure and comprising a second set of pad, anti-pad pairs (445, 545, 645) tuned to receive the band and mirroring the first set of pairs.Type: GrantFiled: November 21, 2019Date of Patent: January 24, 2023Assignee: LOCKHEED MARTIN CORPORATIONInventor: Jesse Michael Zamarron
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Patent number: 11553587Abstract: A display panel with display and non-display regions has pixel units in the display region. The non-display region defines a bonding region in which there are traces and driving chips. The driving chips are bonded in a flexible printed circuit, and electrically connect with the pixel units. The traces include high-speed signal traces, power traces, and grounding traces. The grounding traces are adjacent to the power traces and so disposed as to shield against electromagnetic interference affecting the signal and power traces, the grounding traces serving as reference ground to the power traces, and form a shield against electromagnetic interference.Type: GrantFiled: June 11, 2021Date of Patent: January 10, 2023Assignee: JADARD TECHNOLOGY INC.Inventors: Yi-Wei Hung, Gang Liu
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Patent number: 11545793Abstract: A printed circuit board is housed in a connector. A temperature sensor is mounted on the printed circuit board between two connection pads located on one of the faces of the printed circuit board. A contact housed in the connector is placed in thermal continuity with two thermal conduction lands, one of which is arranged on the same face of the printed circuit board as the connection pads and the other of which is arranged beneath the temperature sensor. Each of the connection pads is connected to a temperature measurement circuit.Type: GrantFiled: June 26, 2020Date of Patent: January 3, 2023Assignee: APTIV TECHNOLOGIES LIMITEDInventors: Olivier Malandain, Stéphane Barlerin
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Patent number: 11540390Abstract: Forming, in a printed-wiring board, a via sufficiently filled without residual smear, for use in an insulating layer and the size of the via to be formed. A via of a printed-wiring board comprises a first filling portion which fills at least a center portion of a hole, and a second filling portion which fills a region of the hole that is not filled with the first filling portion. An interface which exists between the second and first filling portions, or an interface which exists between the second filling portion and an insulating layer and the first filling portion has the shape of a truncated cone comprising a tapered surface which is inclined to become thinner from a first surface toward a second surface, and an upper base surface which is positioned in parallel to the second surface and closer to the first surface than to the second surface.Type: GrantFiled: July 29, 2019Date of Patent: December 27, 2022Assignee: KYOCERA CorporationInventors: Tomoya Nagase, Shinri Saeki
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Patent number: 11523499Abstract: A flexible wiring board includes a layer including an impedance control line capable of transmitting a high frequency signal and a conductive layer including a conductor positioned along the impedance control line. The flexible wiring board is capable of transmitting high frequency signals well.Type: GrantFiled: February 12, 2021Date of Patent: December 6, 2022Assignee: KYOCERA CorporationInventor: Akira Ukon
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Patent number: 11516912Abstract: Disclosed is a printed circuit board (PCB) module including a first PCB comprising a base PCB, a sidewall disposed on a periphery of the base PCB, and conductive vias penetrating the sidewall, a second PCB disposed on the sidewall to cover a cavity formed by the sidewall of the first PCB, and at least one electronic component disposed inside the cavity and located on the first PCB and/or the second PCB, wherein the sidewall comprises a first layer disposed on an upper face of the base PCB and constructed of an insulating member, a second layer disposed on the first layer and comprising a polyimide, a third layer disposed on the second layer and constructed of an insulating member, and a fourth layer disposed on the third layer and comprising a conductive member conductive with respect to the conductive vias.Type: GrantFiled: December 17, 2020Date of Patent: November 29, 2022Inventors: Jongmin Jeon, Eunseok Hong
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Patent number: 11516911Abstract: A glass circuit board includes, on a glass substrate, a stress relief layer, a seed layer, and an electroplated layer including copper plating. The stress relief layer is an insulator formed by dry coating method and applies a compressive residual stress to the glass substrate at room temperature. The stress relief layer thus reduces cracking, fracturing or warpage of the glass substrate caused by thermal expansion and shrinkage of the copper plating due to heating and cooling of the glass circuit board during manufacturing or thermal cycling, ensuring high connection reliability of the glass circuit board.Type: GrantFiled: November 23, 2020Date of Patent: November 29, 2022Assignee: TOPPAN PRINTING CO., LTD.Inventor: Masahiko Kijima
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Patent number: 11516905Abstract: A method may include receiving a first and a second complementary signal to provide differential signaling. The method may further include providing a first conductor trace to transport the first complementary signal; providing a second conductor trace to transport the second complementary signal, the second conductor trace immediately adjacent to the first conductor trace; providing a third conductor trace to transport the first complementary signal, the third conductor trace immediately adjacent to the second conductor trace; and providing a fourth conductor trace to transport the second complementary signal, the fourth conductor trace immediately adjacent to the third conductor trace.Type: GrantFiled: April 14, 2020Date of Patent: November 29, 2022Assignee: Dell Products L.P.Inventors: Sandor Farkas, Bhyrav Mutnury
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Patent number: 11510321Abstract: An electronic device includes a flexible circuit structure. The flexible circuit structure includes a flexible substrate and an insulator. The flexible substrate has a surface on which a plurality of pads are disposed. The insulator is disposed on the flexible substrate and is disposed between two adjacent pads of the plurality of pads.Type: GrantFiled: March 1, 2021Date of Patent: November 22, 2022Assignee: INNOLUX CORPORATIONInventors: Wei-Cheng Chu, Chia-Cheng Liu, Ming-Fu Jiang
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Patent number: 11503709Abstract: A printed wiring board includes resin insulating layers including an outermost resin insulating layer, conductor layers laminated on the resin insulating layers, a copper layer formed in the outermost insulating layer, and metal bumps formed on the copper layer such that the bumps have upper surfaces protruding from the outermost insulating layer and that each metal bump includes Ni film, Pd film and Au film. The copper layer is reduced in diameter toward upper surface side such that the copper layer has upper and bottom surfaces and each upper surface has diameter that is smaller than diameter of each bottom surface, the outermost insulating layer has cylindrical sidewalls formed such that at least part of the copper layer is not in contact with the sidewalls, and the bumps are formed such that the Ni film is filling spaces between the copper layer and the sidewalls of the outermost insulating layer.Type: GrantFiled: January 29, 2021Date of Patent: November 15, 2022Assignee: IBIDEN CO., LTD.Inventor: Shota Tachibana
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Patent number: 11490520Abstract: A PCB, a method of manufacturing the PCB, and a mobile terminal are provided. The PCB includes a PCB body and a PCB element. A first surface of the PCB body is provided with a groove. The PCB element includes a connection terminal, and a part of the PCB element is arranged within the groove. The connection terminal includes a first portion arranged within the groove and a second groove arranged outside the groove, and the first portion is electrically connected to conductive layers in the PCB body.Type: GrantFiled: January 25, 2019Date of Patent: November 1, 2022Assignee: VIVO MOBILE COMMUNICATION CO., LTD.Inventor: Houxun Tang