Patents Examined by John Poos
  • Patent number: 10096993
    Abstract: It is disclosed a technique to reduce significantly the arc flash incident energy in commercial and industrial electrical installations connected to typical electric distribution networks, by limiting transformer inrush current and allowing more sensitive protection settings. It also disclosed a technique to increase the energy capacity of these installations. Inrush current reduction is achieved through the use of a Controlled Switching Device (CSD). It is disclosed a method for lowering an arc flash inside an electrical circuit comprising a breaker and being electrically fed with an electrical current, the method comprising the step of providing the electrical circuit with a CSD adapted to send an open or close command to the breaker in order to synchronize an open and close mechanical operation, preferably at an optimal electrical angle. It is also disclosed an electric circuit comprising a CSD for lowering an arc flash inside the circuit.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: October 9, 2018
    Assignees: VIZIMAX INC.
    Inventors: Pierre Taillefer, Eric Sleigh
  • Patent number: 10090842
    Abstract: A frequency divider may be provided. The frequency divider may be configured to generate a division signal having a variable cycle according to transition timing information and a division ratio signal.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: October 2, 2018
    Assignee: SK hynix Inc.
    Inventor: In Hwa Jung
  • Patent number: 10090729
    Abstract: A machine includes a drive train having a drive unit, an output unit, and a gear unit interconnecting the drive unit and the output unit and configured to be in a non-grounded state with respect to the machine environment during a normal operation of the machine. An insulation is provided to electrically insulate a connection between the gear unit and the drive unit and/or a connection between the gear unit and the output unit.
    Type: Grant
    Filed: February 20, 2015
    Date of Patent: October 2, 2018
    Assignee: Siemens Aktiengesellschaft
    Inventors: Jan-Dirk Reimers, Joachim Rohde
  • Patent number: 10090681
    Abstract: Synchronization system and method for a power generation unit coupled to an electrical power system, in order to facilitate the synchronization between the power generation unit and the electrical power system. A synchronization signal (SS) is generated by means of at least one Phase-Locked Loop (4) from a main electrical signal (Se) received from the electrical power system. The Phase-Locked Loop (4) comprises a controller scheme with a plurality of gain parameters (Kmn) to eliminate at least some of the deviations of the synchronization signal (Ss) in respect of the main electrical signal (Se), and said gain parameters (Kmn) are adjusted depending on the frequency and the amplitude of said main electrical signal (Se).
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: October 2, 2018
    Assignee: INGETEAM POWER TECHNOLOGY, S.A.
    Inventors: Pedro Catalan Lago, Eneko Olea Oregi, Jose Ignacio Candela Garcia, Alvaro Luna Alloza, Kumars Rouzbehi
  • Patent number: 10084447
    Abstract: A semiconductor device having excellent data retention characteristics. A transistor with a low off-state current is utilized to save and retain data stored in a memory circuit, and a potential to be applied to a back gate of the transistor is applied from a battery provided for each memory circuit. The potential applied to the back gate of the transistor and a potential for charging the battery are generated in a voltage generation circuit. The battery is charged utilizing power gating of the memory circuit and data retention characteristics is improved.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: September 25, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Takayuki Ikeda
  • Patent number: 10082814
    Abstract: A method of operating an electrical feeder permits the electrical feeder voltage to be maintained at the minimum voltage within a voltage range based upon dynamic grouping together of electrical generators on the electrical feeder with demand response loads on the electrical feeder. A method of assessing the proper operation of a voltage control device on the electrical feeder involves detecting a number of properties of the electrical power in the electrical feeder both prior to and subsequent to a change in an operational parameter of a voltage control device. An expected effect upon the electrical feeder of one or more distributed generators is filtered from this in order to determine a net effect of the voltage control device itself on the electrical feeder. Based upon the detected net effect and a predicted baseline effect for the voltage control device, it can be determined whether the voltage control device is functioning properly.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: September 25, 2018
    Assignee: EATON INTELLIGENT POWER LIMITED
    Inventors: Dongbo Zhao, Yigang Wang, Chinmaya Baburao Patil
  • Patent number: 10084438
    Abstract: A clock generator has a buffer stage circuit, a passive mixer, and a channel selecting circuit. The buffer stage circuit receives a plurality of first reference clocks having a same first frequency but different phases. The passive mixer receives the first reference clocks from the buffer stage circuit, receives a plurality of second reference clocks having a same second frequency but different phases, and mixes the first reference clocks and the second reference clocks to generate a mixer output, wherein the second frequency is different from the first frequency. The channel selecting circuit extracts a plurality of third reference clocks from the mixer output, wherein the third reference clocks have a same third frequency but different phases, and the third frequency is different from the first frequency and the second frequency.
    Type: Grant
    Filed: January 22, 2017
    Date of Patent: September 25, 2018
    Assignee: MEDIATEK INC.
    Inventor: Hsi-Liang Lu
  • Patent number: 10084437
    Abstract: An integrated circuit includes a clock generator to generate a first clock signal, a delay circuit to generate a second clock signal as a delayed version of the first clock signal, and a plurality of series-connected delay elements having a plurality of outputs, wherein each output from an initial output to a last output is configured to provide the second clock signal delayed by an increasing number of series-connected delay elements. The circuit includes a plurality of flip-flops, wherein a first input of each flip flop is coupled to receive the first clock signal and a second input of each flip flop from an initial flip-flop to a last flip-flop is coupled to receive a corresponding output of the series-connected delay elements from the initial output to the last output, respectively. The circuit includes a plurality of sticky flops, each corresponding to a flip-flop of the plurality of flip-flops.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: September 25, 2018
    Assignee: NXP USA, Inc.
    Inventors: Jifeng Chen, Dat Tat Tran, Anis Mahmoud Jarrar, Jorge Arturo Corso, LeRoy Winemberg, Balaji Rajasekaran
  • Patent number: 10084444
    Abstract: Disclosed herein is a gate-driving apparatus configured for stably providing a voltage having a negative value to a gate of a switch, including a SiC (silicon carbide)-based FET (Field Effect Transistor), which requires a negative voltage having a negative value to implement a stable OFF state. The gate-driving apparatus includes a negative-voltage application circuit including a Zener diode and a capacitor connected in parallel to the Zener diode, wherein the Zener diode may have a cathode connected to a secondary coil of a pulse transformer and an anode connected to the gate of the switch.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: September 25, 2018
    Assignee: Hyundai Motor Company
    Inventors: Dae Woo Lee, Jin Myeong Yang, In Yong Yeo, Jin Young Yang, Youn Sik Lee, Byeong Seob Song, Woo Young Lee
  • Patent number: 10079379
    Abstract: The present invention relates to a layer disposed between a positive electrode and a negative electrode, which is a layer containing particles and a resin material, and having a porous structure with a heat capacity per unit area of 0.0001 J/Kcm2 or more and a heat capacity per unit volume of 3.0 J/Kcm3 or less.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: September 18, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kazuhito Hatta, Toshitsugu Ono
  • Patent number: 10075022
    Abstract: A power supplying system magnetically resonates between a primary resonant coil that configures a primary core unit and a secondary resonant coil that configures a secondary core unit for contactlessly supplying the power. The primary and secondary resonant coils are wound around the primary and secondary ferrite cores respectively, and face each other in the direction perpendicular to the axial direction of the primary and secondary resonant coils when supplying the power. The primary and secondary ferrite cores are divided into a plurality of portions along the axial direction of the primary and secondary resonant coils such that a width of the both end portions is shorter than a width of the center portion.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: September 11, 2018
    Assignee: Yazaki Corporation
    Inventors: Kazuyoshi Kagami, Hajime Terayama, Shingo Tanaka
  • Patent number: 10069334
    Abstract: A device and a corresponding method are provided for reducing an electromagnetic field in a vehicle. A control unit for a vehicle is designed to determine one or more properties of an electromagnetic interference field. The control unit is further designed to incite an emission unit in the vehicle to emit an opposing field which reduces a strength of the interference field in a first zone around and/or in the vehicle.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: September 4, 2018
    Assignee: Bayerische Motoren Werke Aktiengesellschaft
    Inventors: Andreas Barbul, Helmut Wagatha, Stefan Drozkowski
  • Patent number: 10063105
    Abstract: Disclosed herein are systems and methods addressing the shortcomings in the art, and may also provide additional or alternative advantages as well. The embodiments described herein provide a wireless charging proximity transmitter configured to intelligently generate waveforms of various types, such as radio-frequency waves and ultrasound waves, among others. The wireless charging transmitter may be used for providing energy to a receiver that is proximately located to the transmitter. The receiver may be coupled to, or may be a component of, an electrical device that is intended to receive the power from the wave-based energy produced by the wireless proximity transmitter.
    Type: Grant
    Filed: December 24, 2015
    Date of Patent: August 28, 2018
    Assignee: Energous Corporation
    Inventor: Michael A. Leabman
  • Patent number: 10063051
    Abstract: The present invention relates to a socket box. The socket box includes a base, a socket insert, a facia insert and an internal electrically conductive substrate. The socket insert comprises a body having an upper surface and a lower surface, wherein the upper surface is provided with a plurality of apertures which are sized and spaced so as to receive the pins of an electrical plug, and wherein further the lower surface is provided with a plurality of sprung electrical contacts. The socket insert and electrically conductive substrate are supported and held in spaced relationship to one another by the facia insert such that the sprung electrical contacts are compressed against the electrically conductive substrate, and wherein further the facia insert in turn is supported by the base.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: August 28, 2018
    Inventor: Barry Foley
  • Patent number: 10063245
    Abstract: In a reference signal generator including a synchronization circuit configured to convert a digital signal into an analog signal, supply this signal to a voltage controlled oscillator, and control the voltage controlled oscillator to obtain a signal synchronized with the reference signal, without an accumulation of quantization error in a holdover control in which an acquisition of a reference signal is not available. The reference signal generator includes a phase synchronization circuit and a controller. The phase synchronization circuit controls the reference signal outputted from the oscillator, according to a control signal obtained based on the reference signal. The controller generates a free-running control signal and controls the oscillator when the reference signal becomes unavailable. The oscillator receives discrete values and oscillates accordingly.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: August 28, 2018
    Assignee: Furuno Electric Co., Ltd.
    Inventor: Kunihiko Hashimoto
  • Patent number: 10062789
    Abstract: A thin film includes a substrate, a bottom gate, a channel layer, a source and a drain, and a top gate. The bottom gate is disposed on the substrate. The channel layer is disposed on the bottom gate. The source and the drain are disposed on two different sides of the channel layer. The top gate is disposed on the channel layer, wherein the channel layer is disposed between the bottom gate and the top gate, and the bottom gate and the top gate are electrically isolated from each other. A related method is also provided.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: August 28, 2018
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Yu-Xin Yang, Kuo-Kuang Chen, Tsung-Hsiang Shih, Ming-Yen Tsai, Ting-Chang Chang
  • Patent number: 10056785
    Abstract: A wireless power transmission (WPT) system. Implementations may include a power source coupled with a first wireless power transmission (WPT) system and a load coupled with a second WPT system including a sense circuit. The second WPT system, using the sense circuit, may be configured to dynamically tune a resonance of the second WPT system with the first WPT system to a desired resonance frequency value to allow transfer of a desired voltage or a desired power to the load. The desired resonance frequency value may be less than a maximum possible resonance frequency value. The first WPT system may be capable of transmitting more voltage or more power than the second WPT system or the load can receive without inducing damage to the second WPT system or the load.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: August 21, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Abdullah Ahmed, Gareth Pryce Weale
  • Patent number: 10056760
    Abstract: The subject of the invention is an installation (10) able to be electrically autonomous comprising elements to be powered (12, 20) from among which: —a building (12) comprising at least one room delimited by at least one wall and one roof, and —an electricity distribution terminal (20), situated outside the building and comprising means of connection for the connection to at least one external electrical apparatus, the installation comprising means for powering the elements comprising: —means for generating energy (16) on the basis of a natural source, —means for storing energy (56), —means of interconnection (58, 62, 64) of the means of storage and/or of the means of generation to the elements to be powered, the installation also comprising: —means of measurement (72) of at least one parameter relating to the energy stored in at least one part of the energy storage means, and —means of control (66, 68, 67) of the means of interconnection as a function of the values obtained by the measurement means, so that
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: August 21, 2018
    Assignee: BLUE SOLUTIONS
    Inventors: Jacques Colin, Christian Sellin, Yvon Le Paven, Jean Caron, Pierre-Luc Etienne, Valery Florimond, Karim Sammouda, Alain Vallee
  • Patent number: 10056898
    Abstract: An input stage of a chip includes a source driver and a sensing and clamping circuit. The source follower is arranged for receiving an AC-coupled signal to generate an output signal at an output terminal. The sensing and clamping circuit is coupled to the source follower, and is arranged for clamping the output terminal of the source follower at a fixed DC voltage.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: August 21, 2018
    Assignee: MEDIATEK INC.
    Inventor: Mu-Chen Huang
  • Patent number: 10050619
    Abstract: Unique systems, methods, techniques and apparatuses of a gate driver are disclosed herein. One exemplary embodiment is a gate driver comprising a first and second DC rail, a first converter arm including a first and second semiconductor device, a second converter arm including a third and fourth semiconductor device, an inductor, and a controller. The controller is configured to open and close the primary switching device by operating the semiconductor devices so as to transmit power between the gate driver and a gate of a primary switching device. The controller is configured to transmit a gate signal to the primary switching device by closing the second semiconductor device, then opening the second semiconductor device and closing the fourth semiconductor device in response to the gate of the primary switching device receiving power with a voltage greater than or equal in magnitude to the voltage of the second DC rail.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: August 14, 2018
    Assignee: ABB Schweiz AG
    Inventors: Jukka-Pekka Sjoroos, Kari Tikkanen