Abstract: A switching gate driver and method of operating the gate driver is described. The gate driver includes a first voltage source, and a clamping voltage source configured to have a voltage that is less than that of the first voltage source. There is also a current path, for initial charging of a gate voltage of the switching gate, between the first voltage source and a ground source; and a comparator which is configured to clamp the gate voltage to the clamping voltage source as it approaches the voltage of said clamping voltage source.

Abstract: A circuit arrangement for transferring energy includes an energy source, a control device and an energy distribution network. The energy distribution network has a base element and at least one load element. The base element includes a first intermediate circuit energy storage element which can be electrically connected to or disconnected from the energy source via two first controllable switching elements by way of the control device to form a first energy circuit. The at least one load element includes an energy consumer which can be electrically connected to or disconnected from the connections of the first intermediate circuit energy storage element via two second controllable switching elements by way of the control device to form a second energy circuit.

Abstract: Circuitry capable of performing fractional clock multiplication by using an injection-locked oscillator is described. Some embodiments described herein perform fractional clock multiplication by periodically changing the injection location, from a set of injection locations, where the injection signal is injected and/or by periodically changing a phase, from a set of phases, of the injection signal that is injected into the ILO.

Abstract: Foreign substance detection can be performed with a simple configuration in a power transmission system. A power transmitting apparatus that wirelessly transmits power to a power receiving apparatus, the power transmitting apparatus comprises: determination means for, in a case where an initial impedance value and the detected output impedance value do not match and there is no change in the output impedance value between before and after the transmission of a predetermined detection signal, determining that a foreign substance is present within a predetermined power transmission range, and, in a case where the initial impedance value and the detected output impedance value do not match and there is a change in the output impedance value between before and after the transmission of the predetermined detection signal, determining that a power receiving apparatus is present within the predetermined power transmission range.

Abstract: When a signal of high amplitude is outputted, a drain-to-source voltage exceeding a withstand voltage may be applied. The semiconductor device according to the present invention includes a level shift circuit that outputs a high amplitude signal from the input of a low amplitude logical signal. The level shift circuit includes a series coupling circuit, a first gate control circuit coupled to a first power supply, a second gate control circuit coupled to a second power supply of a potential higher than the potential of the first power supply, and a potential conversion circuit arranged between the first gate control circuit and the series coupling circuit. The potential conversion circuit supplies a first level potential, which is lower than the potential of the first power supply and higher than the potential of the reference power supply, to a gate of an N-channel MOS transistor of the series coupling circuit.

Abstract: Systems and methods for allocating electrical current among battery sets connected in a substantially parallel configuration. A respective state of health is determined for each respective battery set in a plurality of battery sets. The respective state of health reflects a respective present amount of total energy able to be stored by each respective battery set relative to a specification of the respective battery set. A respective allocation of electrical current for each battery set in the plurality of battery sets is determined based on the respective state of health for each respective battery set. A current flow through each respective battery set is configured to its respective allocation of electrical current based on determining the respective allocation.

Abstract: A semiconductor device which makes it possible to reduce a wasteful standby time at power-on is provided. In this semiconductor device, a reset of an internal circuit is canceled as described below. When a data signal stored in a storage section is at “0,” the reset is canceled by bringing an internal reset signal to the “H” level when a relatively short time has passed after the rising edge of a power on reset signal. When the data signal is at “1,” the reset is canceled by bringing the internal reset signal to the “H” level when a relatively long time has passed after the rising edge of the power on reset signal. Therefore, a wasteful standby time at power-on can be reduced by writing the data signal logically equivalent to the rise time of supply voltage to the storage section.

Abstract: A second resonant type transmission power supply device 1b includes a transmission power state detecting circuit 11b that detects a transmission power state of a second transmission antenna 2b, a foreign object detecting circuit 124b that detects the presence or absence of a foreign object in an overlapping range of electromagnetic fields on the basis of a detection result acquired by the transmission power state detecting circuit 11b, and a power control circuit 125b that, when a foreign object is detected by the foreign object detecting circuit 124b, controls a first resonant type transmission power supply device 1a in such a way as to reduce or stop the supply of electric power to a first transmission antenna 2a.

Abstract: A Schmitt trigger's hysteresis is established by standard and non-standard MOSFETs having different (lower/higher) threshold voltages. For example, a standard n-channel transistor having a relatively low threshold voltage (e.g., 1V) sets the lower trigger switching voltage, and a non-standard n-channel transistor (e.g., an n-channel source/drain and a polysilicon gate doped with a p-type dopant) exhibits a relatively high threshold voltage (e.g., 2V) that sets the higher trigger switching voltage. An output control circuit generates the Schmitt trigger's digital output signal based on the on/off states of the two (non-standard and standard) MOSFETs, whereby the changes digital output signal between two values when the analog input signal falls below the lower threshold voltage (i.e., when both MOSFETs are turned on/off) and rises above the higher threshold voltage (i.e., when both MOSFETs are turned off/on). Self-resetting and other circuits utilize the Schmitt trigger to facilitate, e.g.

Abstract: A two-point modulation Phase-Locked Loop (PLL) has a gain-adjustable voltage-controlled oscillator (VCO). A digital data modulation signal is combined with a carrier and input to a feedback divider. The data modulation signal is also input to a Digital-to-Analog Converter (DAC) to generate an analog voltage to a second input of the VCO. A calibration unit divides the VCO output and counts pulses. During calibration, the data modulation signal is set to minimum and then maximum values and VCO output pulses counted. A count difference for the data modulation signal at maximum and minimum values is input to a Look-Up Table (LUT) to read out a gain calibration value. During normal operation mode, the gain calibration value from the LUT is applied to a second input of the DAC, which drives the VCO to adjust VCO gain. A switch before the VCO opens the loop for faster open-loop calibration.

Abstract: A power supplying device is provided for providing electrical power to a power receiving device, the power supplying device comprising two plates, two electrode structures being arranged to be coupled to an AC power source and at least one power transmitter. Each electrode structure is attached to one of said two plates. The power transmitter is situated in between the two plates and comprises an electrically conductive coil and at least two electrical contacts coupled to the electrically conductive coil. The plates and the power transmitter are arranged such that the power transmitter is movable in a direction parallel to the surfaces of the plates with the electrical contacts in contact with the respective two electrode structures for obtaining power from the AC power source.

Abstract: A circuit includes an active element, a drive circuit for the active element and a control logic for providing a control signal for the drive circuit. Further, an interface circuit is provided, which includes a primary terminal for receiving a primary signal and a secondary terminal that is galvanically isolated from the primary terminal. The interface circuit is implemented to provide the primary signal received at the primary terminal to the control logic via the secondary terminal, and to provide, based on the primary signal received at the primary terminal, by means of a rectifier circuit, an auxiliary energy signal for the drive circuit at the secondary terminal.

Abstract: An electrical device having one or more settings associated therewith, the electrical device includes a wireless communication unit structured to wirelessly communicate with an external device and to wirelessly receive settings information from the external device, a processor structured to configure one or more settings associated with the electrical device based on the received settings information, and a function module structured to provide an additional function associated with a type of the electrical device.

Abstract: A phase or frequency locked-loop circuit includes an oscillator configured to generate an output clock signal having a frequency set by an oscillator control signal. A modulator circuit receives a first signal and a second signal and is configured to generate a control signal having a value modulated in response to the first and second signals. A filter circuit generates the oscillator control signal by filtering the control signal. A delta-sigma modulator circuit operates to modulate the second signal in response to a modulation profile. As a result, the output clock signal is a spread spectrum clock signal.

Abstract: A method for synchronizing and connecting a first sub power system with a second sub power system with an intelligent electronic device (IED) by use of at least one switching device between the first sub power system and the second sub power system in an electrical power system is provided. The IED monitors power supply parameters such as voltage magnitude, phase and other derived parameters such as voltage and phase differences in the first sub power system and the second sub power system to identify at least one instance for fast bus transfer where the two sub systems have acceptable differences in magnitude and phase. The IED performs phase shifting and voltage magnitude correction in anticipation for synchronizing power supplies on connection at the identified instance.

Abstract: Basic circuit of U phase includes first to fourth semiconductor elements (SU1.1 to SU1.4) connected between positive and negative ends of DC voltage source (DCC1), fifth semiconductor element (SU1.5) connected to a common connection point of the first and second semiconductor elements (SU1.1, SU1.2), and sixth semiconductor element (SU1.6) connected to a common connection point of the third and fourth semiconductor elements (SU1.3, SU1.4). Flying capacitor (FC1) is inserted between the fifth semiconductor element (SU1.5) and the sixth semiconductor element (SU1.6). Voltage selection circuits have the common connection points of the second and third semiconductor elements (SU1.2, SU1.3) of the respective basic circuits as input terminals, and includes semiconductor elements (SU1 to SU4) between the input terminals and output terminals (U, V, W).

Abstract: There is described a circuit to supply electric power to N electrical panels. The circuit comprises N+1 blockbars, each one of the blockbars being for connection to an automatic transfer switch (ATS) of a power source, each one of the blockbars being connected to at least two other ones of the N+1 blockbars via a segregating switchgear. The circuit further comprises N+1 UPS units, each one of the UPS units being for connection to a dedicated one of the blockbars via a dedicated switchgear. The circuit further comprises 2N power outputs, each one of the N electrical panels being connected to 2 of the 2N power outputs, each one of the 2N power outputs being connected to 2 of the N+1 UPS units. This configuration allows for N+1 redundancy at the generator and UPS levels to feed the electrical distribution with 2N redundancy.

Abstract: A circuit comprises an input terminal configured to receive an input signal. A high-side driver is configured to provide a high-side control signal to a high-side power transistor via a high-side terminal based on the input signal. A low-side driver is configured to provide a low-side control signal to a low-side power transistor based on the input signal. An interface is configured to couple the high-side terminal and the low-side terminal via a capacitor.

Abstract: A switching power supply circuit includes a switching element connected to a primary winding wire of a transformer in series, capacitors connected to secondary winding wires of the transformer via diodes, and an IC for power supply control that controls ON/OFF operation of the switching element on the basis of a charged voltage of the capacitors. Commanded voltages are charged in the capacitors after electric power is supplied to a main power supply, and further, after the elapse of a delay time set in advance, a control circuit, which controls the entire apparatus, controls a main circuit and a peripheral apparatus circuit to start operations.

Abstract: A level shifter includes a first and a second transistor coupled to a first power supply voltage terminal supplied with a second power supply voltage in parallel, the first transistor having a first gate connected to a drain of the second transistor and a first gate insulating film, and the second transistor having a second gate connected to a drain of the first transistor and a second gate insulating film, a third and a fourth transistor coupled to a reference voltage terminal in parallel, the third transistor having a third gate supplied with a first control signal and a third gate insulating film, and the fourth transistor having a fourth gate supplied with a second control signal and a fourth gate insulating film, a first and a second depression transistor, and a timing control unit placed between a second power supply voltage terminal and the reference voltage terminal.