Patents Examined by Jonathan C Langman
  • Patent number: 7651766
    Abstract: A carbon nanotube reinforced metal nanocomposite material includes a continuous metal phase, and a plurality of carbon nanotubes dispersed in the continuous metal phase. The metal phase extends throughout substantially an entire thickness of the nanocomposite material. The nanotubes are preferably single wall nanotubes (SWNTs). Carbon nanotube reinforced metal nanocomposites according to the invention provide thermal conductivity and electrical conductivity which are generally significantly higher than the pure metal continuous phase material, mechanical strength is 2 to 3 times greater than that of the pure metal, and a tailorable coefficient of thermal expansion obtainable through changing the percentage of nanotubes in the nanocomposite.
    Type: Grant
    Filed: May 19, 2006
    Date of Patent: January 26, 2010
    Assignee: University of Central Florida Research Foundation, Inc.
    Inventor: Quanfang Chen
  • Patent number: 7645526
    Abstract: A member for a plasma etching device, comprising a coating film of yttrium oxide or YAG having a coating film thickness of 10 ?m or more, a coating film thickness variance of 15% or less, preferably a surface roughness (Ra) of 1 ?m or less, formed on a surface of a member, comprising quartz glass which contains 1 to 10% by weight of yttrium oxide or YAG. The member for a plasma etching device has high plasma resistance, is not subjected to an abnormal etching on the basis of a partial change of electric properties and, accordingly, can be used for a long period of time. Even when the member is large enough to handle 12-inch Si wafers, the above-described advantageous properties are maintained and the member can be used for a long period of time.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: January 12, 2010
    Assignee: Shin-Etsu Quartz Products, Ltd.
    Inventors: Kyoichi Inaki, Itsuo Araki
  • Patent number: 7645517
    Abstract: Atomic layer epitaxy (ALE) is applied to the fabrication of new forms of rare-earth oxides, rare-earth nitrides and rare-earth phosphides. Further, ternary compounds composed of binary (rare-earth oxides, rare-earth nitrides and rare-earth phosphides) mixed with silicon and or germanium to form compound semiconductors of the formula RE—(O, N, P)—(Si,Ge) are also disclosed, where RE=at least one selection from group of rare-earth metals, O=oxygen, N=nitrogen, P=phosphorus, Si=silicon and Ge=germanium. The presented ALE growth technique and material system can be applied to silicon electronics, opto-electronic, magneto-electronics and magneto-optics devices.
    Type: Grant
    Filed: December 28, 2004
    Date of Patent: January 12, 2010
    Assignee: Translucent, Inc.
    Inventor: Petar B. Atanackovic
  • Patent number: 7641988
    Abstract: A self-supported nitride semiconductor substrate of 10 mm or more in diameter having an X-ray diffraction half width of 500 seconds or less in at least one of a {20-24} diffraction plane and a {11-24} diffraction plane.
    Type: Grant
    Filed: April 12, 2004
    Date of Patent: January 5, 2010
    Assignee: Hitachi Cable, Ltd.
    Inventor: Takayuki Suzuki
  • Patent number: 7625641
    Abstract: A method of forming a crystalline phase material includes: providing stress inducing material within or operatively adjacent a material of a first crystalline phase; and annealing under conditions effective to transform the material to a second crystalline phase. The stress inducing material preferably induces compressive stress during the anneal to lower the activation energy to produce a more dense second crystalline phase. Example compressive stress inducing materials are SiO2, Si3N4, Ge, W and Co. Where the compressive stress inducing material is provided on the same side of a wafer as the crystalline phase material, it is provided to have a thermal coefficient of expansion which is less than that of the first phase crystalline material. Where the compressive stress inducing material is provided on the opposite side of a wafer, it is provided to have a thermal coefficient of expansion which is greater than that of the first phase crystalline material.
    Type: Grant
    Filed: June 19, 2006
    Date of Patent: December 1, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Sujit Sharan
  • Patent number: 7625635
    Abstract: A transparent film-forming coating liquid is provided which is capable of forming a transparent film that is excellent not only in scratch resistance, film hardness, scratch strength and adhesion to a substrate but also in haze and anti-glare properties. Also provided is a display device having a front panel constituted of a substrate with such a transparent film applied thereto. The transparent film-forming coating liquid comprises inorganic oxide particle groups, in each of which 2 to 10 inorganic oxide particles on an average are linked in the form of a chain, and a polar solvent. In the transparent film-forming coating liquid, the inorganic oxide particles have an average particle diameter of 4 to 200 nm. The inorganic oxide particles are silica particles, and the silica particles are porous particles and/or hollow particles each having a cavity inside.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: December 1, 2009
    Assignee: JGC Catalysts and Chemicals Ltd.
    Inventors: Mitsuaki Kumazawa, Masayuki Matsuda, Toshiharu Hirai
  • Patent number: 7622196
    Abstract: The invented method of cladding a metal component includes creating a frit mixture in a defined ratio; wetting the mixture by adding a wetting agent in a defined volume; agitating the wetted mixture; applying the agitated mixture to a metal component by one or more processes; de-wetting the metal component having the applied mixture by gradually heating the same to a temperature from approximately 250 degrees Fahrenheit (° F.) up to a high of approximately 450° F.; and, fusing the de-wetted metal component at a temperature of no more than 125% of a defined withstand temperature for the clad metal component. Invented compositions can include one or more of liquid and/or colloidal sodium, potassium and/or lithium silicate, clay and/or clays, a compound of hollow micro-spheres (e.g.
    Type: Grant
    Filed: August 11, 2006
    Date of Patent: November 24, 2009
    Assignee: Applied Technology Laboratories LLC
    Inventor: Gary Wilson
  • Patent number: 7608335
    Abstract: A template article including a base substrate including: (i) a base material selected from the group consisting of polycrystalline substrates and amorphous substrates, and (ii) at least one layer of a differing material upon the surface of the base material; and, a buffer material layer upon the base substrate, the buffer material layer characterized by: (a) low chemical reactivity with the base substrate, (b) stability at temperatures up to at least about 800° C.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: October 27, 2009
    Assignee: Los Alamos National Security, LLC
    Inventors: Alp T. Findikoglu, Quanxi Jia, Paul N. Arendt, Vladimir Matias, Woong Choi
  • Patent number: 7582357
    Abstract: The present invention can provide a silicon semiconductor substrate used for and epitaxial wafer, in which uniform and high-level gettering ability is obtained irrespective of slicing positions from a silicon single crystal while generation of epitaxial defects can be suppressed, by doping carbon or carbon along with nitrogen during a pulling process of a CZ method or by performing appropriate heat treatment prior to the epitaxial process. Therefore, a crystal production yield can remarkably be improved because a permissible upper limit (concentration margin) of an oxygen concentration which is restricted by formation of a ring-shaped OSF region can be higher and also an excellent gettering ability is exhibited, while allowing an epitaxial wafer to be produced wherein epitaxial defects attributable to substrate crystal defects are not formed.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: September 1, 2009
    Assignee: Sumco Corporation
    Inventor: Yasuo Koike
  • Patent number: 7556855
    Abstract: An impact resistant device is provided comprising a support matrix and a plurality of energy absorbing elements operatively connected to the support matrix, each element comprising at least one ceramic material and at least one strain rate sensitive material. The impact resistant device can be worn as body armor to protect the wearer from high velocity projectiles.
    Type: Grant
    Filed: August 13, 2008
    Date of Patent: July 7, 2009
    Assignees: The Johns Hopkins University, University of North Texas
    Inventors: Paul J. Biermann, Jack C. Roberts, Richard Reidy
  • Patent number: 7553545
    Abstract: Compositions, inks and methods for forming a patterned silicon-containing film and patterned structures including such a film. The composition generally includes (a) passivated semiconductor nanoparticles and (b) first and second cyclic Group IVA compounds in which the cyclic species predominantly contains Si and/or Ge atoms. The ink generally includes the composition and a solvent in which the composition is soluble. The method generally includes the steps of (1) printing the composition or ink on a substrate to form a pattern, and (2) curing the patterned composition or ink. In an alternative embodiment, the method includes the steps of (i) curing either a semiconductor nanoparticle composition or at least one cyclic Group IVA compound to form a thin film, (ii) coating the thin film with the other, and (iii) curing the coated thin film to form a semiconducting thin film.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: June 30, 2009
    Assignee: Kovio, Inc.
    Inventors: Klaus Kunze, Scott Haubrich, Fabio Zurcher, Brent Ridley, Joerg Rockenberger
  • Patent number: 7541094
    Abstract: Described are methods and chemistries for preparing firepolished quartz parts for use in semiconductor processing. The quartz parts in need of preparation include newly manufactured parts as well as parts requiring refurbishment after previous use in semiconductor processing. The embodiments described avoid methods and chemistries that may damage the surfaces of the quartz parts and render the parts unfit for use in semiconductor processing. A method in accordance with one embodiment minimizes damage by limiting exposure of the quartz parts to hydrofluoric acid. A quartz part for use in semiconductor processing comprises a surface including a surface portion having a surface portion area to expose to a gas, wherein at least 95 percent of the surface portion area is free of defects and wherein the surface portion has less than E12 atoms per centimeter squared of aluminum.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: June 2, 2009
    Assignee: Quantum Global Technologies, LLC
    Inventors: David S. Zuck, Gregory H. Leggett
  • Patent number: 7534498
    Abstract: Provided is a laminated body (1) comprising a substrate (2) to be ground and a support (5), where the substrate (2) is ground to a very small thickness and can then be separated from the support (5) without damaging the substrate (2). One embodiment of the present invention is a laminated body (1) comprising a substrate (2) to be ground, a joining layer (3) in contact with the substrate (2) to be ground, a photothermal conversion layer (4) comprising a light absorbing agent and a heat decomposable resin, and a light transmitting support (5). After grinding the substrate surface which is opposite that in contact with the joining layer (3), the laminated body (1) is irradiated through the light transmitting support (5) and the photothermal conversion layer (4) decomposes to separate the substrate (2) and the light transmitting support (5).
    Type: Grant
    Filed: June 2, 2003
    Date of Patent: May 19, 2009
    Assignee: 3M Innovative Properties Company
    Inventors: Kazuki Noda, Masaru Iwasawa
  • Patent number: 7531240
    Abstract: A method of fabricating a large substrate with a locally integrated single crystalline silicon layer is provided. The method includes: forming a buffer layer on a support plate; separately fabricating a single crystalline silicon layer; attaching the single crystalline silicon layer having a predetermined thickness, which is separately fabricated, to a predetermined portion in the support plate; forming a non-single crystalline silicon layer having a predetermined thickness to cover the single crystalline silicon layer and the buffer layer; and processing the non-single crystalline silicon layer to expose a surface of the non-single crystalline silicon layer and to level the surface of the non-single crystalline silicon layer with a surface of the amorphous silicon layer.
    Type: Grant
    Filed: December 20, 2005
    Date of Patent: May 12, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Wenxu Xianyu, Takashi Noguchi, Young-soo Park, Hans S. Cho, Huaxiang Yin
  • Patent number: 7495317
    Abstract: A semiconductor device comprises at the wafer level one or more ferrite structures adapted to dampen high frequency noise potentially apparent at signal lines and termination points within the semiconductor device. Related methods of forming said ferrite structures are also disclosed.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: February 24, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Seok Song, Un-Byoung Kang, Si-Hoon Lee
  • Patent number: 7465499
    Abstract: A boron phosphide-based semiconductor device enhanced in properties includes a substrate (11) composed of a {111}-Si single crystal having a surface {111} crystal plane and a boron phosphide-based semiconductor layer formed on the surface of the substrate and composed of a polycrystal layer (12) that is an aggregate of a plurality of a triangular pyramidal single crystal entities (13) of the boron phosphide-based semiconductor crystal, where in each single crystal entity has a twining interface that forms an angle of 60° relative to a <110> crystal direction of the substrate.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: December 16, 2008
    Assignee: Showa Denko K.K.
    Inventors: Takashi Udagawa, Tamotsu Yamashita
  • Patent number: 7413809
    Abstract: An impact resistant device is provided comprising a flexible support matrix and a plurality of energy absorbing elements operatively connected to the support matrix, each element comprising at least one ceramic material and at least one strain rate sensitive material. The impact resistant device can be worn as body armor to protect the wearer from high velocity projectiles.
    Type: Grant
    Filed: August 24, 2007
    Date of Patent: August 19, 2008
    Assignee: The Johns Hopkins University
    Inventors: Paul J. Biermann, Jack C. Roberts, Richard Reidy