Abstract: The invention provides a low resistivity silicon carbide single crystal wafer for fabricating semiconductor devices having excellent characteristics. The low resistivity silicon carbide single crystal wafer has a specific volume resistance of 0.001 ?cm to 0.012 ?cm and 90% or greater of the entire wafer surface area is covered by an SiC single crystal surface of a roughness (Ra) of 1.0 nm or less.

Abstract: By using the PVD process, cutting tools are provided with a coating that is a mono-phase ternary or more complex oxide. By appropriately defining the involved major component and minor component in terms of atom percent, the distortions of the formed oxide can be controlled in a specific manner and in order to influence the properties of said oxide. Alternatively, the layer may contain an amorphous oxide phase with oxide crystallites embedded therein. The oxide crystallites may be binary, ternary or more complex. One or more different types of crystallites may be present adjacent to each other.

Abstract: Composites comprising an aluminum phosphate-based coating component and methods for sealing porous substrate surfaces.

Abstract: Methods and structures for monolithically integrating monocrystalline silicon and monocrystalline non-silicon materials and devices are provided. In one structure, a semiconductor structure includes a silicon substrate and a first monocrystalline semiconductor layer disposed over the silicon substrate, wherein the first monocrystalline semiconductor layer has a lattice constant different from a lattice constant of relaxed silicon. The semiconductor structure further includes an insulating layer disposed over the first monocrystalline semiconductor layer in a first region, a monocrystalline silicon layer disposed over the insulating layer in the first region, and a second monocrystalline semiconductor layer disposed over at least a portion of the first monocrystalline semiconductor layer in a second region and absent from the first region. The second monocrystalline semiconductor layer has a lattice constant different from the lattice constant of relaxed silicon.

Abstract: A two layer LTO backside seal for a wafer. The two layer LTO backside seal includes a low stress LTO layer having a first major side and a second major side, the first major5 side of the low stress LTO layer adjacent to one major side of the wafer. The two layer LTO backside seal further includes a high stress LTO layer having a first major side and second major side, the first major side of the high stress LTO layer adjacent the second major side of the low stress LTO layer.

Abstract: An epitaxial silicon wafer is provided in which an epitaxial layer is grown on a silicon wafer having a plane inclined from a {110} plane of a silicon single crystal as a main surface. In the silicon wafer for growing the epitaxial layer thereon, an inclination angle azimuth of the {110} plane is in the range of 0 to 45 degrees as measured from a <100> orientation parallel to the {110} plane toward a <110 > direction. With such an arrangement, LPDs of 100 nm or less can be measured from a {110} wafer that has a carrier mobility (including the hole and electron mobilities) higher than that of a {100 } wafer. Also, surface roughness degradation in the {110} wafer can be suppressed. Also, the surface state of the {110} wafer can be measured. Further, a quality evaluation can be performed on the {110} wafer.

Abstract: A dual-layer coating for application in a steam-generating device is disclosed. A impermeable first layer thermally insulates the heated surface, while a second, porous layer enlarges the contact area, leading to an efficient conversion of liquid into vapor.

Abstract: A method for preparing a high-temperature heat-resistant composite material by combining a mixture of submicron alumina powder and submicron silica powder, wherein the ratio of alumina to silica is from about 4:1 to about 5:1, submicron Group II metal oxide powder, and a Group I metal silicate solution to form a slurry, wherein the weight of the Group II metal oxide powder is an amount corresponding to about 5% to about 10% of the weight of the silicate solution; contacting reinforcing high-temperature resistant fibers with the slurry to form a composite precursor composition; and curing the composition at a temperature sufficient to produce the high-temperature heat-resistant composite material capable of resisting temperatures up to about 1400° C. Composite materials prepared according to the method and articles incorporating the material are also presented.

Abstract: Baffle wafers of polycrystalline silicon are placed in non-production slots of a support tower for thermal processing monocrystalline silicon wafers. The polycrystalline silicon is preferably randomly oriented Czochralski polysilicon grown using a randomly oriented seed, for example, CVD grown silicon. An all-silicon hot zone of a thermal furnace may include a silicon support tower placed within a silicon liner and supporting the polysilicon baffle wafers with silicon injector tube providing processing gas within the liner. The randomly oriented polysilicon may be used for other parts requiring a rugged member, for example, within a silicon processing chamber and for structural members.

Abstract: Silicon wafers in the entire volume of which crystal lattice vacancies are the prevalent point defect type, have a rotationally symmetric region whose width is at least 80% of the wafer radius, crystal lattice vacancy agglomerates of at least 30 nm in a density ?6·103 cm?3, crystal lattice vacancy agglomerates of from 10 nm to 30 nm in a density of 1·105 cm?3 to 3·107 cm?3, OSF seeds in a density of 0 to 10 cm?2, and an average bulk BMD density of 5·108 cm?3 to 5·109 cm?3, which varies at most by a factor of 10 radially over the entire silicon wafer, and a BMD-free layer on the front side, wherein the first BMD is found at a depth of at least 5 ?m and on average at a depth of at least 8 ?m.

Abstract: A semiconductor structure and method of manufacturing the semiconductor structure, and more particularly to a semiconductor structure having reduced metal line resistance and a method of manufacturing the same in back end of line (BEOL) processes. The method includes forming a first trench extending to a lower metal layer Mx+1 and forming a second trench remote from the first trench. The method further includes filling the first trench and the second trench with conductive material. The conductive material in the second trench forms a vertical wiring line extending orthogonally and in electrical contact with an upper wiring layer and electrically isolated from lower metal layers including the lower metal layer Mx+1. The vertical wiring line decreases a resistance of a structure.

Abstract: A coating material comprising a binding agent and at least one filler including particles having a size and/or surface roughness of about 100 ?m or less, and a photocatalytically active agent. The binding agent may be at least partially decomposed by a photocatalytic action, and a microstructured, self-cleaning surface may be formed.

Abstract: A method of reducing threading dislocation densities in non-polar such as a-{11-20} plane and m-{1-100} plane or semi-polar such as {10-1n} plane III-Nitrides by employing lateral epitaxial overgrowth from sidewalls of etched template material through a patterned mask. The method includes depositing a patterned mask on a template material such as a non-polar or semi polar GaN template, etching the template material down to various depths through openings in the mask, and growing non-polar or semi-polar III-Nitride by coalescing laterally from the tops of the sidewalls before the vertically growing material from the trench bottoms reaches the tops of the sidewalls. The coalesced features grow through the openings of the mask, and grow laterally over the dielectric mask until a fully coalesced continuous film is achieved.

Abstract: A composite ceramic body and a method thereof are provided. The composite ceramic body comprising a first bonding body comprising a ceramic containing Si ingredient, and a second bonding body bonded to the first bonding body through a bonding material containing, as main ingredient, a Si compound which includes the element common to the Si ingredient contained in the first bonding body. The first and second bonding bodies can be bonded strongly and uniformly without any adhesive. Since the composite ceramic body has high bonding strength, it is applicable to microchemical chips and reformers.

Abstract: The invention relates to a polysilicon rod for FZ applications obtainable by deposition of high-purity silicon from a silicon-containing reaction gas, which has been thermally decomposed or reduced by hydrogen, on a filament rod. The polysilicon rod contains, surrounding the filament rod, an inner zone having but few needle crystals, small in size, an outer zone having a relatively small amount of larger needle crystals, and a smooth transition zone between the inner and outer zones. The polysilicon rods are obtained in high yield and can be refined in one pass in an FZ process.

Abstract: A film stack includes an interlayer dielectric formed over one or more devices. The film stack further includes a first layer having a high extinction coefficient formed on the interlayer dielectric and a second layer having a low extinction coefficient formed on the first layer. The first and second layers prevent ultraviolet induced damage to the one or more devices while minimizing reflectivity for lithographic processes.

Abstract: Novel articles and methods to fabricate the same resulting in flexible, large-area, triaxially textured, single-crystal or single-crystal-like, semiconductor-based, electronic devices are disclosed. Potential applications of resulting articles are in areas of photovoltaic devices, flat-panel displays, thermophotovoltaic devices, ferroelectric devices, light emitting diode devices, computer hard disc drive devices, magnetoresistance based devices, photoluminescence based devices, non-volatile memory devices, dielectric devices, thermoelectric devices and quantum dot laser devices.

Abstract: An optically-responsive multilayer reflective article is formed by applying a dilute solution or suspension of metallic nanoparticles to an optically-responsive detection layer. The solution or suspension is allowed to dry to form a semicontinuous liquid- or vapor-permeable light-reflective layer that will permit a liquid or vapor analyte to pass through the light-reflective layer to cause an optically-responsive change in the detection layer in the presence of the analyte.

Abstract: A piezoelectric film formed above a Si substrate. The piezoelectric film is formed of a potassium sodium niobate expressed by a general formula (K,Na)NbO3 with perovskite structure. A film thickness of the piezoelectric film is within a range from 0.3 ?m to 10 ?m. An intermediate film is formed between the Si substrate and the piezoelectric film. The intermediate film generates a stress in a compressive direction in the piezoelectric film.

Abstract: A composite support designed to successfully receive a transfer layer made of a crystalline material so that the assembly forms an epitaxy substrate, with the support having a longitudinal plane of symmetry parallel to its principal surfaces and a plurality of layers. The support includes a central first layer having a first thermal expansion coefficient at a specified temperature T and extending transversely on either side of the plane of symmetry and at least one pair of lateral layers. The layers of each pair, one with respect to the other, have arrangements in the composite support that are substantially symmetrical with respect to the plane of symmetry; second thermal expansion coefficients at the temperature T that are substantially identical to one another; and thicknesses that are substantially identical to one another.