Patents Examined by Jonathan R Labud
  • Patent number: 9535740
    Abstract: A method, system and computer program product are provided for implementing dynamic adjustment of resources allocated to Single Root Input/Output Virtualization (SRIOV) Remote Direct Memory Access (RMDA) virtual functions (VFs) in Cloud Software Defined Server environments. A hardware management console (HMC), and a hypervisor are used to implement resource allocation to the SRIOV RDMA VFs based on resource usage. The hypervisor checks resource usage for the resource allocations of the SRIOV RDMA VF relative to lower and upper threshold values. Responsive to identifying the resource usage below the lower threshold or above the upper threshold, the hypervisor sends an event to the HMC, and the HMC starts a resource redistribution process.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: January 3, 2017
    Assignee: International Business Machines Corporation
    Inventors: Charles S. Graham, Prathima Kommineni, Timothy J. Schimke, Narsimha R. Challa
  • Patent number: 9529633
    Abstract: A virtualization host may implement variable timeslices for processing latency dependent workloads. Multiple virtual compute instances on a virtualization host may utilize virtual central processing units (vCPUs) to obtain physical processing resources, such as one or more central processing units (CPUs). A vCPU currently utilizing a CPU to performing processing work according to a scheduled timeslice may be preempted by a latency dependent vCPU before completion of the scheduled timeslice. The latency-dependent vCPU may complete processing work, and utilization of the CPU may be returned to the vCPU. A preemption compensation may be determined for the scheduled timeslice to increase the scheduled timeslice for the vCPU such that utilization for the vCPU is performed according to the increased scheduled timeslice.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: December 27, 2016
    Assignee: Amazon Technologies, Inc.
    Inventors: William John Earl, John Merrill Phillips
  • Patent number: 9529638
    Abstract: A computer determines that a utilization level of a resource has satisfied a threshold. The computer scales the allocation of the resource to the furthest of the current allocation of the resource plus a parameter and of a historical limit. The computer determines if the scaled allocation of the resource is outside the historical limit and if so, sets the historical limit equal to the scaled allocation of the resource. The computer determines whether the scaling of the allocation of the resource will result in an allocation oscillation. The computer determines if the scaled allocation of the resource is outside a boundary parameter and if so, sets the allocation of the resource equal to the boundary parameter.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: December 27, 2016
    Assignee: International Business Machines Corporation
    Inventors: Emad Attalla, Gerhard Widmayer
  • Patent number: 9513972
    Abstract: A method of prioritizing processing units in a system for task scheduling includes, for each processing unit of a plurality of processing units in the system, determining a value that represents a thermal condition of a location of the processing unit. It is determined which of the plurality of processing units is not fully loaded and is in a location with a most favorable thermal condition based on the value of the processing unit that represents thermal conditions of the location of the processing unit. A task is scheduled to the processing unit determined to be not fully loaded and in a location with a most favorable thermal condition based on the value of the processing unit that represents thermal conditions of the location of the processing unit.
    Type: Grant
    Filed: June 11, 2014
    Date of Patent: December 6, 2016
    Assignee: Lenovo Enterprise Solutions (Singapore) PTE. LTD.
    Inventors: Yuan Shan Hsiao, Po-Chun BJ Ko, Alex CP Lee, YuhHung Liaw
  • Patent number: 9507644
    Abstract: Provided is a computer system including a first processor disposed in a first zone, a second processor disposed in a second zone, a prioritizing unit, and a scheduling unit. The prioritizing unit prioritizes the first processor and the second processor based on the thermal conditions of the first zone and the second zone, respectively. The scheduling unit schedules a task to one of the first processor and the second processor according to the priority provided by the prioritizing unit.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: November 29, 2016
    Assignee: Lenovo Enterprise Solutions (Singapore) PTE. LTD.
    Inventors: Yuan Shan Hsiao, Po-Chun BJ Ko, Alex CP Lee, YuhHung Liaw
  • Patent number: 9501306
    Abstract: Virtual machines are allocated among servers in a virtual environment, whereby each virtual machine has a current placement. A current fitness score is calculated for each virtual machine based on its current placement. Proposed placement plans are then generated, each plan including a proposed placement of each virtual machine. For each plan, a plan score is created. Each plan score is created by calculating a proposed fitness score for each virtual machine based on a proposed placement of that virtual machine in accordance with that plan, generating a virtual machine score for each virtual machine based on a comparison of that virtual machine's current fitness score and proposed fitness score, and then combining the virtual machine scores. The plan scores are then compared, and a target plan is selected from among the plans. The virtual machines are then reallocated among the servers in accordance with the target proposed placement plan.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: November 22, 2016
    Assignee: International Business Machines Corporation
    Inventors: Jason L. Anderson, Jeffrey L. Coveyduc, Andrew D. Hately, Stefan A. G. van der Stockt
  • Patent number: 9495196
    Abstract: Virtual machines are allocated among servers in a virtual environment, whereby each virtual machine has a current placement. A current fitness score is calculated for each virtual machine based on its current placement. Proposed placement plans are then generated, each plan including a proposed placement of each virtual machine. For each plan, a plan score is created. Each plan score is created by calculating a proposed fitness score for each virtual machine based on a proposed placement of that virtual machine in accordance with that plan, generating a virtual machine score for each virtual machine based on a comparison of that virtual machine's current fitness score and proposed fitness score, and then combining the virtual machine scores. The plan scores are then compared, and a target plan is selected from among the plans. The virtual machines are then reallocated among the servers in accordance with the target proposed placement plan.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: November 15, 2016
    Assignee: International Business Machines Corporation
    Inventors: Jason L. Anderson, Jeffrey L. Coveyduc, Andrew D. Hately, Stefan A. G. van der Stockt
  • Patent number: 9448820
    Abstract: Systems and methods are described for analyzing and verifying distributed applications. In one embodiment, an application program is executed as independently executable components. During execution, redundant portions of application program data are aggregated. A property of the application program is verified using the aggregated application program data to represent code execution paths.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: September 20, 2016
    Assignee: Amazon Technologies, Inc.
    Inventor: Nicholas Alexander Allen
  • Patent number: 9448945
    Abstract: Method to perform an operation, the operation comprising processing a first logical partition on a shared processor for the duration of a dispatch cycle, issuing, by a hypervisor, at a predefined time prior to completion of the dispatch cycle, a lightweight hypervisor decrementer (HDEC) interrupt specifying a cache line address buffer location in a virtual processor, and responsive to the lightweight HDEC, writing, by the shared processor, a set of cache line addresses used by the first logical partition to the cache line address buffer location in the virtual processor.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: September 20, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stuart Z. Jacobs, David A. Larson, Michael J. Vance
  • Patent number: 9430280
    Abstract: Methods and systems for task timeouts as a function of input data size are disclosed. A definition of a task is received. The definition of the task indicates a set of input data for the task. A timeout duration for the task is determined based on the set of input data. The timeout duration varies with one or more characteristics of the set of input data. The execution of the task is initiated. The execution of the task is stopped if the execution of the task exceeds the timeout duration.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: August 30, 2016
    Assignee: Amazon Technologies, Inc.
    Inventors: Kathryn Marie Shih, Carl Louis Christofferson, Richard Jeffrey Cole, Peter Sirota, Vaibhav Aggarwal
  • Patent number: 9411625
    Abstract: An apparatus for a hypervisor to obtain a faulting instruction, wherein the hypervisor runs between a physical machine including a central processing unit (CPU) and a virtual machine includes a content addressable memory (CAM); a special-purpose register (SPR) which is accessible by the hypervisor; and a control logic circuit with an input terminal connected to the CPU and an output terminal connected to the CAM, the input terminal receiving data from an instruction fetching (IF) stage and a write-back (WB) stage of a CPU instruction pipeline respectively, the output terminal causing instructions from the IF stage of the CPU instruction pipeline to be stored into the CAM and triggering the CAM to output a faulting instruction among the instructions stored therein to the SPR.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: August 9, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Xiao Tao Chang, Yi Ge, Hao Li, Tao Liu, Kun Wang
  • Patent number: 9396011
    Abstract: In the various aspects, virtualization techniques may be used to improve performance and reduce the amount of power consumed by selectively enabling a hypervisor operating on a computing device during sandbox sessions. In the various aspects, a high-level operating system may allocate memory such that its intermediate physical addresses are equal to the physical addresses. When the hypervisor is disabled, the hypervisor may suspend second stage translations from intermediate physical addresses to physical addresses. During a sandbox session, the hypervisor may be enabled and resume performing second stage translations.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: July 19, 2016
    Assignee: QUALCOMM INCORPORATED
    Inventors: Thomas M. Zeng, Azzedine Touzni, Philip T. Mueller, Jr., Piyush Patel
  • Patent number: 9396020
    Abstract: An apparatus is described having multiple cores, each core having: a) an accelerator; and, b) a general purpose CPU coupled to the accelerator. The general purpose CPU has functional unit logic circuitry to execute an instruction that returns an amount of storage space to store context information of the accelerator.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: July 19, 2016
    Assignee: Intel Corporation
    Inventors: Boris Ginzburg, Ronny Ronen, Eliezer Weissmann, Karthikeyan Vaithianathan, Ehud Cohen
  • Patent number: 9389923
    Abstract: The present invention includes a plurality of computing units executing a plurality of threads including a communication control thread to which a receiving process by polling is assigned. In a CPU core, a computing unit executing the communication control thread performs polling in a memory region indicating notification of arrival of data and waits for execution of the receiving process until arrival of data, and when a computing unit executing an application thread executes a process assigned to the application thread, the computing unit executing the communication control thread moves to a resource-saving mode in which the use of physical resources is suppressed.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: July 12, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Kohta Nakashima, Akira Naruse
  • Patent number: 9389886
    Abstract: Systems and methods are described for analyzing and verifying distributed applications. In one embodiment, an application program is executed as independently executable components. During execution, redundant portions of application program data are aggregated. A property of the application program is verified using the aggregated application program data to represent code execution paths.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: July 12, 2016
    Assignee: Amazon Technologies, Inc.
    Inventor: Nicholas Alexander Allen
  • Patent number: 9378036
    Abstract: Methods and systems for routing frames are provided. A routing module of a network device stores a destination address for a virtual machine with a virtual bridge identifier associated with a virtual bridge. The virtual bridge identifier is associated with a queue pair that is used by the virtual machine to send and receive information using the virtual bridge. The network device also includes a port connected to a link for sending and receiving the information and the virtual bridge is associated with the port. The routing module is used to determine the destination of a frame whether the frame is sent by an external device or the virtual machine.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: June 28, 2016
    Assignee: QLOGIC, Corporation
    Inventors: Kanoj Sarcar, Winnie Yu
  • Patent number: 9378063
    Abstract: Embodiments include apparatuses, systems, and methods mobile coprocessing. A connection is established between a mobile device and an auxiliary computing device. The mobile device implements a CPU abstraction layer and a virtual CPU between a software stack and a CPU of the mobile device. The abstraction layer allows for the mobile device to offload tasks to the auxiliary computing device while the software stack interacts with the abstraction layer as if the tasks are being executed by the CPU of the mobile device. The mobile device of allocates tasks to the auxiliary computing device based on various parameters, including properties of the auxiliary computing device, metrics of the connection, and priorities of the tasks.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: June 28, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Michael-David Nakayoshi Canoy, Sisil Mehta, Kirtika Ruchandani
  • Patent number: 9372725
    Abstract: A method for dynamically adjusting an actual wait period associated with an operating system call, wherein the operating system call suspends execution of at least one thread in a plurality of threads associated with an operating environment is provided. The method may include determining a utilization factor function associated with the operating environment. The method may also include selecting at least one performance counter within a plurality of performance counters associated with the operating environment. The method may further include computing a utilization factor based on the determined utilization factor function and the selected at least one performance counter. Additionally, the method may include intercepting an operating system call, wherein the operating system call includes a requested wait period parameter.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: June 21, 2016
    Assignee: International Business Machines Corporation
    Inventors: Timothy S. Bartley, Gavin G. Bray, Elizabeth M. Hughes, Kalvinder P. Singh
  • Patent number: 9354918
    Abstract: Embodiments relate to migrating a local cache state with a virtual machine (VM) migration. An aspect includes detecting that a VM executing on a source host machine has been paused as part of a migration of the VM from the source host machine to a target host machine. A state of a first local cache associated with the VM is identified. The first local cache is accessible by the source host machine and includes data previously fetched from a shared storage. Pre-fetch hints that are based on the state of the first local cache are sent to the target host machine prior to the migration completing. The pre-fetch hints are utilized by the target host machine to fetch, from the shared storage, at least a subset of the data stored in the first local cache for storage in a second local cache accessible by the target host machine.
    Type: Grant
    Filed: February 10, 2014
    Date of Patent: May 31, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Aayush Gupta, James L. Hafner
  • Patent number: 9342340
    Abstract: A virtual runtime module that omits an internal functional implementation of an associated executable module and that includes a runtime-resolvable public interface of the associated executable module is obtained using a processor within a module-based system. The virtual runtime module within the module-based system is resolved, using the runtime-resolvable public interface of the virtual runtime module, to satisfy dependencies associated with the executable module within the module-based system. At least a portion of the internal functional implementation of the associated executable module within the module-based system is installed during runtime using the resolved virtual runtime module.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: May 17, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Graham C. Charters, David J. Vines, Timothy J. Ward