Abstract: Embodiments relate to building, by a computing device, a pseudo-random dynamic instruction stream that comprises instructions configured to perform a transaction execution, testing, by the computing device, the transaction execution in a uni-processing system based on the instruction stream, and outputting, by the computing device, a status of the test to one or more output devices. A determination may be made that an abort occurs in the transaction execution based on the testing.

Abstract: Subject matter disclosed herein relates to read and write processes of a memory device. During a write process to a particular partition in a memory array, a response to a read request of contents of the particular partition may be delayed. In some embodiments, the contents of the particular partition may be indirectly read during the write process without delaying the response to the read request. The contents of the particular partition can be indirectly read by determining the contents of the particular partition based, at least in part, on an error correction code based, at least in part, on contents of memory partitions of the memory array.

Abstract: A method of managing wear leveling in a data storage device includes determining whether a reliability measurement associated with a first portion of a first nonvolatile memory die satisfies a threshold. The first nonvolatile memory die is included in a plurality of memory dies. The method includes, in response to determining that the reliability measurement associated with the first portion of the first nonvolatile memory die satisfies the threshold, transferring first data from the first portion of the first nonvolatile memory die to a second nonvolatile memory die of the plurality of memory dies.

Abstract: Performing data management operations on replicated data in a computer network. Log entries are generated for data management operations of an application executing on a source system. Consistency point entries are used to indicate a time of a known good, or recoverable, state of the application. A destination system is configured to process a copy of the log and consistency point entries to replicate data in a replication volume, the replicated data being a copy of the application data on the source system. When the replicated data represents a known good state of the application, as determined by the consistency point entries, the destination system(s) may perform a storage operation (e.g., snapshot, backup) to copy the replicated data and to logically associate the copied data with a time information (e.g., time stamp) indicative of the source system time when the application was in the known good state.

Abstract: Embodiments include apparatuses, systems, and methods for reduced pin cross triggering to enhance a debug experience. A time-division packetizing (TDP) technique may be employed to facilitate communication of triggers between integrated circuits (ICs) connected in series forming a TDP communication ring. The ICs on the TDP communication ring may each include a cross trigger interconnect structure for interpreting between trigger signals and hardware core instructions. The serial TDP communication across the ICs on the TDP communication ring allows the ICs to be connected in a manner that each cross trigger interconnect structure on each IC may function as if it were part of a single cross trigger interconnect structure across all of the ICs on the TDP communication ring. The individual ICs may operate asynchronously and a trigger clock may be passed along with other trigger data to implement the debugging techniques uniformly on each IC.

Abstract: According to one embodiment, a memory system includes a NAND-type flash memory and a memory controller. A comparison module of the memory controller compares a first threshold voltage distribution of a first memory area with a second threshold voltage distribution of the first memory area acquired earlier than the first threshold voltage distribution, if an error is detected in data read from the first memory area. An error factor determination module of the memory controller determines a cause of the error based on the comparison result, and inhibits a data move operation of moving data of the first memory area to the second memory area based on the determination result.

Abstract: Embodiments relate to a computer for transmitting data in a network. The computer includes at least one data transmission port configured to be connected to at least one storage device via a plurality of paths of a network. The computer further includes a processor configured to detect recurring intermittent errors in one or more paths of the plurality of paths and to disable access to the one or more paths based on detecting the recurring intermittent errors.

Abstract: Failover in a clustered system is managed. The clustered system includes sub-clusters connected with one another by a first set of links. Each sub-cluster includes nodes connected with one another by a second set of links. At least one of the second set of links is used to determine that a suspect node within a same sub-cluster has stopped. In response, a lease relinquish message is transmitted on behalf of the suspect node.

Abstract: Embodiments enable recovery of push notification channels via session information associated with user identifiers. A proxy service creates session information describing push notification channels (e.g., subscriptions) for a user and associates the session information with a user identifier. The session information is stored in a cloud service or other storage area separate from the proxy service. After failure of a user computing device or the proxy service, the session information is obtained via the user identifiers and the push notification channels are re-created with the session information. In some embodiments, the proxy service enables delivery of the same notification to multiple computing devices associated with the user identifier.

Abstract: A data scrubbing apparatus corrects disturb data errors occurring in an array of memory cells such as SMT MRAM cells. The data scrubbing apparatus receives an error indication that an error has occurred during a read operation of a grouping of memory cells within the array of memory cells. The data scrubbing apparatus may generate an address describing the location of the memory cells to be scrubbed. The data scrubbing apparatus then commands the array of memory cells to write back the corrected data. Based on a scrub threshold value, the data scrubbing apparatus writes the corrected data back after a specific number of errors. The data scrubbing apparatus may further suspend writing back during a writing of data. The data scrubbing apparatus provides a busy indicator externally during a write back of corrected data.

Abstract: The CPU includes: a data transmission instruction output processor; a failure detection signal input processor to which a failure detection signal is input from a failure detection processor for detecting a failure of an input unit; a data storage memory for, each time an input data update processor of the input unit updates data, storing the updated data; and a CPU operation processor for obtaining input data from the data storage memory and obtaining a detection signal from the failure detection signal input processor to perform operation processing. The CPU operation processor obtains periodic data as of an amount of time given by the following expression ago: {ROUNDUP(T22/T1)}×T1 where T22 is the failure detection processing time of the failure detection processor, T1 is the data transmission instruction output period of the data transmission instruction output processor, and ROUNDUP is a function of rounding up to the nearest integer.

Abstract: In a memory diagnostic method, a fixed domain stores data that are not changed during process execution. A variable domain stores data that are subject to writing during process execution. A fixed domain diagnostic part adds an error-detecting code to data to be stored in the fixed domain. The fixed domain diagnostic part compares an error-detecting code calculated from data read from the fixed domain with the added error-detecting code to determine whether there is any data error. A variable domain diagnostic part temporarily stores data stored in the variable domain in a memory region different from the memory storing the data, and writes known data in the variable domain where the temporarily stored data were stored. The variable domain diagnostic part reads data from the region where the known data were written and determines whether the data is the same as the written known data.

Abstract: Avoiding failure repetition in data processing includes storing a sequence of circumstances leading up to a previous failure, monitoring circumstances in a current process, matching a sequence of circumstances in the current process to a stored sequence of circumstances, and applying rules to determine if the current process should proceed.

Abstract: A memory degeneracy method is executed by an information processing device in which a plurality of virtual machines operate. The memory degeneracy method includes storing, in a storage unit, a physical address or address information of a memory module, which corresponds to a virtual physical address relevant to a fault, in response to detecting the fault in a memory area assigned to a first virtual machine; changing an association relationship between virtual physical addresses and physical addresses relevant to the first virtual machine, before an operating system operating on the first virtual machine is rebooted in response to detecting the fault; and removing, from a usage target of the operating system, the virtual physical address corresponding to the physical address or the address information of the memory module stored in the storage unit.

Abstract: The present disclosure includes systems and techniques relating to management of bit line errors based on a stored set of data. In some implementations, a system can include a device including non-volatile solid state memory and a memory controller. The memory controller can be configured to identify, from the solid state memory of the device, one or more bit line errors for the device upon power up of the system, construct a set of data corresponding to the one or more bit line errors for the device, store the set of data, at least in part, in the device, and, upon a subsequent power up of the system, identify the one or more bit line errors for the device from the stored set of data.

Abstract: Methods and data processing systems for using a buffer to replace failed memory cells in a memory component are provided. Embodiments include determining that a first copy of data stored within a plurality of memory cells of a memory component contains one or more errors; in response to determining that the first copy contains one or more errors, determining whether a backup cache within the buffer contains a second copy of the data; and in response to determining that the backup cache contains the second copy of the data, transferring the second copy from the backup cache to a location within an error data queue (EDQ) within the buffer and updating the buffer controller to use the location within the EDQ instead of the plurality of memory cells within the memory component.

Abstract: A system for providing network element protection includes a backup network element (101) having a first configuration table storing first configuration data, an active network element (102) having a second configuration table storing second configuration data, and a controller (117) arranged to update the first configuration data according to changes of the second configuration data. The controller is arranged to carry out the updating when the active network element operates according to the second configuration data as a part of a data transfer network (100). Hence, the configuration data of the backup network element is maintained and managed as if backup network element were actively in use. Therefore, the switchover from the active network element to the backup network element can be quick and resilient in a case of a failure in the active network element or in a data transfer connection to or from the active network element.

Abstract: Systems and methods for providing automated problem reporting in elements used in conjunction with computer networks are disclosed. The system comprises a plurality of elements that perform data migration operations and a reporting manager or monitor agent which monitors the elements and data migration operations. Upon detection of hardware or software problems, the reporting manager or monitor agent automatically communicates with elements affected by the problem to gather selected hardware, software, and configuration information, analyzes the information to determine causes of the problem, and issues a problem report containing at least a portion of the selected information. The problem report is communicated to a remote monitor that does not possess access privileges to the elements, allowing automated, remote monitoring of the elements without compromising security of the computer network or elements.

Abstract: A distributed system for creating a checkpoint for a plurality of processes running on the distributed system. The distributed system includes a plurality of compute nodes with an operating system executing on each compute node. A checkpoint library resides at the user level on each of the compute nodes, and the checkpoint library is transparent to the operating system residing on the same compute node and to the other compute nodes. Each checkpoint library uses a windowed messaging logging protocol for checkpointing of the distributed system. Processes participating in a distributed computation on the distributed system may be migrated from one compute node to another compute node in the distributed system by re-mapping of hardware addresses using the checkpoint library.

Abstract: Embodiments relate to a computer for transmitting data in a network. The computer includes at least one data transmission port configured to be connected to at least one storage device via a plurality of paths of a network. The computer further includes a processor configured to detect recurring intermittent errors in one or more paths of the plurality of paths and to disable access to the one or more paths based on detecting the recurring intermittent errors.