Patents Examined by Joseph Schell
  • Patent number: 8880942
    Abstract: A method for ensuring guaranteed services for real-time traffic on an interconnect with errors is provided. The real-time traffic comprises a first and second traffic class (HRT, SRT). Real-time traffic of the first and/or second traffic class (HRT, SRT) is transmitted from a transmitter to a receiver. It is detected by the receiver whether an error has occurred during the transmission of the real-time traffic and the error is reported to the transmitter. At least part of the real-time traffic of the second traffic class (SRT) is re-transmitted by the transmitter if the transmitter has received an error report from the receiver within a predetermined time period.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: November 4, 2014
    Assignee: ST-Ericsson SA
    Inventors: Bipin Balakrishnan, Andrei Radulescu
  • Patent number: 8880935
    Abstract: A system for managing communications to add a first Remote Direct Memory Access (RDMA) link between a TCP server and a TCP client, where the first RDMA link references first remote memory buffer (RMB) and a second RMB, and further based on a first remote direct memory access network interface card (RNIC) associated with the TCP server and a second RNIC associated with the TCP client. The system determines whether a third RNIC is enabled. The system adds a second RDMA link, responsive to a determination that the third RNIC is enabled. The system detects a failure in a failed RDMA link. The system reconfigures the first RDMA link to carry at least one TCP message of a connection formerly assigned to the failed RDMA link, responsive to detecting the failure. The system communicates at least one message of the at least one connection on the first RDMA link.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: November 4, 2014
    Assignee: International Business Machines Corporation
    Inventors: Michael J. Fox, Jeffrey D. Haggar, David A. Herr, Hugh E. Hockett, Constantinos Kassimis, Benjamin P. Segal, Jerry W. Stevens
  • Patent number: 8874962
    Abstract: A diagnostic handling server is capable of supporting users without operator support, in which the proper handling of a problem, which users know through experience, can be reflected in the support. Preliminarily, data (e.g., dissatisfying item data) on the item with which a user feels dissatisfied and diagnostic data on the diagnoses of the electric appliances are collected from the electric appliances to be supported. The feature points of the respective electric appliances with which the user feels dissatisfied are then extracted from the collected diagnostic data. When the user feels dissatisfied with a specific electric appliance, the diagnostic data of the electric appliance is transmitted together with a search request for the proper handling, the transmitted diagnostic data is compared with the preliminarily extracted feature point, and information on the cause and the proper handling is provided to the user.
    Type: Grant
    Filed: January 10, 2012
    Date of Patent: October 28, 2014
    Assignee: OPTiM Corporation
    Inventor: Shunji Sugaya
  • Patent number: 8856606
    Abstract: A method for specifying a transport block-to-codeword mapping relationship and a method for transmitting a downlink signal using the same are described. If a swap flag has a first logic value, a first transport block is mapped to a first codeword and a second transport block is mapped to a second codeword. If the swap flag has a second logic value, the first transport block is mapped to the second codeword and the second transport block is mapped to the first codeword. If the size of any one of two transport blocks is 0, the swap flag is not used.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: October 7, 2014
    Assignee: LG Electronics Inc.
    Inventors: Moon Il Lee, Hyun Soo Ko, Bin Chul Ihm, Wook Bong Lee, Jae Hoon Chung
  • Patent number: 8832508
    Abstract: Apparatus and methods are provided for concurrently selecting multiple arrays of memory cells when accessing a memory element. A memory element includes a first array of one or more memory cells coupled to a first bit line node, a second array of one or more memory cells coupled to a second bit line node, access circuitry for accessing a first memory cell in the first array, a first transistor coupled between the first bit line node and the access circuitry, and a second transistor coupled between the second bit line node and the access circuitry. A controller is coupled to the first transistor and the second transistor, and the controller is configured to concurrently activate the first transistor and the second transistor to access the first memory cell in the first array.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: September 9, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Carson Henrion, Michael Dreesen
  • Patent number: 8826076
    Abstract: Methods, apparatus, and products for visually marking computing components within a computing system are disclosed that include: detecting that a particular computing component has failed, wherein the particular computing component has a physical surface that may be altered with the application of some physical stimulus; and applying a requisite physical stimulus to the physical surface such that the appearance of the physical service is altered, thereby visually identifying that the component has failed.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: September 2, 2014
    Assignee: International Business Machines Corporation
    Inventors: Michael G. Brinkman, Nathan C. Skalsky
  • Patent number: 8826077
    Abstract: Recovery processing is defined that matches the scope of an outage. A programmatic analysis of the resources that have been impacted, of implications of the failure and what degradations have occurred is performed to construct an appropriate level of recovery. This includes selecting the appropriate set of resources to be recovered. Recovery operations are selected based on the current state of the environment.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: September 2, 2014
    Assignee: International Business Machines Corporation
    Inventors: Mythili K. Bobak, Tim A. McConnell, Michael D. Swanson
  • Patent number: 8806278
    Abstract: The invention relates to a method and a device (72) for diagnosing and remotely controlling a host computer (74), in particular a computer which is incorporated in a network and has a local bus (50). The device (72) comprises a network connection (41) via which bidirectional data transmission from the network and into the network is carried out by the host computer (74).
    Type: Grant
    Filed: July 16, 2008
    Date of Patent: August 12, 2014
    Assignee: Certon Systems GmbH
    Inventor: Lord Hess
  • Patent number: 8799704
    Abstract: A method for correcting faults in semiconductor memory components provides an application system having a multichip module (1) which has a semiconductor memory component (2) containing a volatile memory and a diverting circuit (7). When the application system is being booted up, addresses of faulty memory cells in the semiconductor memory component (2) are loaded into the multichip module (1), with the result that the diverting circuit (7) diverts access to a memory cell in the replacement data memory if a faulty memory cell in the semiconductor memory component (2) is accessed.
    Type: Grant
    Filed: March 29, 2007
    Date of Patent: August 5, 2014
    Assignee: Infineon Technologies AG
    Inventor: Peter Ossimitz
  • Patent number: 8793536
    Abstract: Embodiments of the invention include methods, apparatuses, and systems for automatically identifying a synchronization sub-pattern associated with a test pattern. A test and measurement instrument is triggered in response to a first instance of a trigger pattern in a data stream. A trigger-to-trigger counter begins counting at the time of the first trigger event. The test and measurement instrument is again triggered in response to a second instance of the trigger pattern in the data stream. The count is ended at this time. The count is then compared to a predefined length of the test pattern, and if equal, it is automatically determined that the trigger pattern is the unique synchronization sub-pattern associated with the test pattern.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: July 29, 2014
    Assignee: Tektronix, Inc.
    Inventor: Que Thuy Tran
  • Patent number: 8775865
    Abstract: A data scrubbing apparatus corrects disturb errors occurring in a memory cell array, such as SMT MRAM cells. The data scrubbing apparatus activates scrubbing of the data and associated error correction bits based on a number of errors corrected, at a power up of the memory cell array, or a programmed time interval. The data scrubbing apparatus may generate an address describing the location of the memory cells to be scrubbed. The data scrubbing apparatus then commands the array of memory cells to write back the corrected data, the associated error correction bits, and reference bits. The data scrubbing apparatus provides a busy indicator externally during a write back of corrected data.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: July 8, 2014
    Assignee: Headway Technologies, Inc.
    Inventor: Hsu Kai Yang
  • Patent number: 8775868
    Abstract: A system and method for adaptive RAID geometries. A computer system comprises client computers and data storage arrays coupled to one another via a network. A data storage array utilizes solid-state drives and Flash memory cells for data storage. A storage controller within a data storage array is configured to determine a first RAID layout for use in storing data, and write a first RAID stripe to the device group according to the first RAID layout. In response to detecting a first condition, the controller is configured to determine a second RAID layout which is different from the first RAID layout, and write a second RAID stripe to the device group according to the second layout, whereby the device group concurrently stores data according to both the first RAID layout and the second RAID layout.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: July 8, 2014
    Assignee: PURE Storage, Inc.
    Inventors: John Colgrove, John Hayes, Bo Hong, Ethan Miller
  • Patent number: 8762788
    Abstract: A redundancy control system and method of transmitting computational data are provided, for detection of transmission errors and failure diagnosis, including generating first computational data and generating first generated data using a first generation algorithm for error detection; generating second computational data and generating second generated data using a second generation algorithm for error detection; comparing the first/second computational data; transmitting transmission data including coincident computational data and the first/second generated data; generating, in the receiving device, computational data and third/fourth generated data from preset first/second generation algorithms; and comparing the first/third generated data and the first/third generated data, and detecting the presence or absence of an error in the received computational data.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: June 24, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Nakatani, Naoya Ohnishi, Makoto Toko, Motohiko Okabe
  • Patent number: 8756462
    Abstract: Methods, systems, and computer program products for configurable alert delivery in a distributed processing system are provided. Embodiments include for each alert generated by an incident analyzer, applying active alert filters to the alert; wherein applying the active alert filters to the alert includes: creating a list of all active alert filters and a set of all active listeners; and for each active alert filter, running the active alert filter; if the active alert filter indicates that the alert should not go to one or more of the active listeners, removing the one or more active listeners from the set of all active listeners; if the active listeners set is empty, stopping processing of the alert; and if the active listeners set is not empty, selecting the next active alert filter from the active alert filter list.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: June 17, 2014
    Assignee: International Business Machines Corporation
    Inventors: James E. Carey, Philip J. Sanders
  • Patent number: 8751872
    Abstract: A system and method for handling exceptions in a multi-threaded computing environment. Information, such as that relating to an error state or pertaining to the propagation history of an exception, is stored in a separate object from the exception object itself. The separate propagation information object is accessible to the plurality of threads that are used to execute a user task. The separate object allows rich diagnostic information pertaining to the exception and its propagation through multiple threads to be presented to the developer of the software.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: June 10, 2014
    Assignee: Microsoft Corporation
    Inventors: Kumar Gaurav Khanna, Eric L. Eilebrecht, Melitta L. G. Andersen, Diana Milirud, Stephen H. Toub
  • Patent number: 8751914
    Abstract: Encoding method (1) and device associating p redundancy data bits with k information data bits to determine code words with a block length of n=p+k data bits. The code words are of tail-biting trellis low density parity check type. The method and the device implement a degree distribution profile of the n data bits defining a base code word including multiple replicas of the n data bits with respect to the degree distribution. This base code is represented by a two-states trellis formed of sections with positions accommodating data bits of the base code whereby the number of positions of a section is denoted as the degree of the section. The method and the device makes (2) a partition of the base code trellis into p intersecting regular parts of triple sections representing p parity check equations.
    Type: Grant
    Filed: September 15, 2008
    Date of Patent: June 10, 2014
    Assignee: Orange
    Inventor: Evangelos Papagiannis
  • Patent number: 8751860
    Abstract: The present disclosure includes methods, devices, and systems for object oriented memory in solid state devices. One embodiment of a method for object oriented memory in solid state devices includes accessing a defined set of data as a single object in an atomic operation manner, where the accessing is from a source other than a host. The embodiment also includes storing the defined set of data as the single object in a number of solid state memory blocks as formatted by a control component of a solid state device that includes the number of solid state memory blocks.
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: June 10, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Peter Feeley, Neal A. Galbo, James Cooke, Victor Y. Tsai, Robert N. Leibowitz, William H. Radke
  • Patent number: 8745439
    Abstract: Various embodiments of the present invention provide systems and methods for deriving data from a defective media region. As an example, a method for deriving data from a defective media region is disclosed that includes providing a storage medium and performing a media defect detection that indicates a defective region on the storage medium. A first data decode is performed on data corresponding to the defective region. The first data decode yields a first output. It is determined that the first output failed to converge and based at least in part on the failure of the first output to converge, a second data decode is performed on the data corresponding to the defective region. The second data decode includes zeroing out any soft data corresponding to the defective region and providing a second output.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: June 3, 2014
    Assignee: LSI Corporation
    Inventors: Shaohua Yang, Weijun Tan, Yuan Xing Lee
  • Patent number: 8738965
    Abstract: A test method for restarting a computing device communicating with a remote computer. The computing device is shut down and awakened by the remote computer. A second hardware information of the computing device after restarting the operating system of the computing device is compared with initial hardware information of the computing device when the computing device is initial started. Test results are stored to a predetermined storage path and displayed on a screen after the test ends.
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: May 27, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Hai-Li Wang, Yong-Qian Deng
  • Patent number: 8732524
    Abstract: Methods, systems and computing devices are provided for using a completed corrective action as evidence of a fault. The methods, systems and computing devices receive equipment status evidence and determine an equipment fault based on the equipment status evidence. The methods, systems and computing devices also create and rank a list of potential failure modes based at least in part on the determined equipment fault, recommend a corrective action to correct the equipment fault based at least in part on the ranking of the potential failure modes and receiving additional equipment status evidence indicating that the recommended corrective action failed to correct the equipment fault. The methods, systems and computing devices then associate a detection probability and a false negative rate with the failed corrective action to create additional status evidence, and re-rank the list of potential failure modes for subsequent performance based on the additional status evidence.
    Type: Grant
    Filed: August 3, 2011
    Date of Patent: May 20, 2014
    Assignee: Honeywell International Inc.
    Inventors: Bradley John Barton, David Michael Kolbet, Qingqiu Ginger Shao, Randy R. Magnuson