Abstract: A method of forming a flexible display apparatus includes: forming a flexible substrate on a support substrate; forming a light-emitting diode on the flexible substrate; forming a first encapsulation layer on the light-emitting diode; forming a second encapsulation layer; bonding the first encapsulation layer to the second encapsulation layer using an adhesive layer between the first encapsulation layer and the second encapsulation layer; separating the support substrate from the flexible substrate and cutting the flexible substrate to form the flexible display apparatus; and forming a polarizing plate on the second encapsulation layer.

Abstract: The present disclosure relates to an array substrate, a method of manufacturing the same and a display device. The array substrate comprises a gate line PAD region and a data line PAD region. In the gate line PAD region of the array substrate, gate-line wirings, which are parallel to the gate lines and are electrically insulated from the gate lines, are provided between adjacent gate lines. In the data line PAD region of the array substrate, data-line wirings, which are parallel to the data lines and are electrically insulated from the data lines, are provided between adjacent data lines. Both of the gate-line wirings and the data-line wirings are conductive wiring segments. By forming the gate-line wirings and the data-line wirings in the PAD region, the ability of resisting scratch of the product can be improved while not deteriorating performance of display of the product.

Abstract: Embodiments are directed to a method of forming a semiconductor device and resulting structures having an air spacer between a gate and a contact by forming a gate on a substrate and over a channel region of a semiconductor fin. A contact is formed on a doped region of the substrate such that a space between the contact and the gate defines a trench. A first dielectric layer is formed over the gate and the contact such that the first dielectric layer partially fills the trench. A second dielectric layer is formed over the first dielectric layer such that an air spacer forms in the trench between the gate and the contact.

Abstract: Embodiments are directed to a method of forming a semiconductor device and resulting structures having an air spacer between a gate and a contact by forming a gate on a substrate and over a channel region of a semiconductor fin. A contact is formed on a doped region of the substrate such that a space between the contact and the gate defines a trench. A first dielectric layer is formed over the gate and the contact such that the first dielectric layer partially fills the trench. A second dielectric layer is formed over the first dielectric layer such that an air spacer forms in the trench between the gate and the contact.

Abstract: A an organic light-emitting display apparatus, including a first substrate, a display unit having a plurality of organic light-emitting devices that is formed on the first substrate, a second substrate disposed on the display unit, and a filler included between the first substrate and the second substrate. The organic light-emitting device includes a first electrode formed on the first substrate, an intermediate layer that is disposed on the first electrode and includes an organic emission layer, and a porous second electrode disposed on the intermediate layer.

Abstract: A method of making a dual isolation fin comprises applying a mask to a substrate and etching the exposed areas of the substrate to form a mandrel; forming a dielectric layer on the surface of the substrate and adjacent to the mandrel; forming a first epitaxially formed material on the exposed portions of the mandrel; forming a second epitaxially formed material on the first epitaxially formed material; forming a first isolation layer on the dielectric layer and adjacent to the second epitaxially formed material; removing the mask and mandrel after forming the first isolation layer; removing the first epitaxially formed material after removing the mask and mandrel; and forming a second isolation layer.

Abstract: A an organic light-emitting display apparatus, including a first substrate, a display unit having a plurality of organic light-emitting devices that is formed on the first substrate, a second substrate disposed on the display unit, and a filler included between the first substrate and the second substrate. The organic light-emitting device includes a first electrode formed on the first substrate, an intermediate layer that is disposed on the first electrode and includes an organic emission layer, and a porous second electrode disposed on the intermediate layer.

Abstract: A display device includes a first substrate having a first lower column spacer disposed in a peripheral area, extending in a direction, and including first and second opposing slanted sides, a second substrate opposing the first substrate, the second substrate including a first upper column spacer disposed in the first peripheral area, extending in the same direction, including a slanted side, and disposed adjacent to the first side of the first lower column spacer, and a second upper column spacer having substantially a same shape as the first upper column spacer and disposed adjacent to the second side of the first lower column spacer, where the first peripheral area is disposed outside a display area of the display device.

Abstract: A method for manufacturing a semiconductor device includes forming a plurality of fins on a substrate, wherein a hardmask is formed on each of the plurality of fins, forming a gate structure around the plurality of fins, selectively depositing a dummy dielectric on the hardmask on each of the plurality of fins, depositing a dielectric layer on the gate structure and around the dummy dielectrics, selectively removing the dummy dielectrics and the hardmasks with respect to the dielectric layer and the gate structure to create a plurality of openings exposing portions of the gate structure, and selectively removing the exposed portions of the gate structure through the plurality of the openings.

Abstract: Interposer and semiconductor package embodiments provide for the isolation and suppression of electronic noise such as EM emissions in the semiconductor package. The interposer includes shield structures in various embodiments, the shield structures blocking the electrical noise from the noise source, from other electrical signals or devices. The shields include solid structures and some embodiments and decoupling capacitors in other embodiments. The coupling structures includes multiple rows of solder balls included in strips that couple the components and surround and contain the source of electrical noise.

Abstract: A photoelectric conversion portion, a charge holding portion, a transfer portion, and a sense node are formed in a P-type well. The charge holding portion is configured to include an N-type semiconductor region, which is a first semiconductor region holding charges in a portion different from the photoelectric conversion portion. A P-type semiconductor region having a higher concentration than the P-type well is disposed under the N-type semiconductor region.

Abstract: Embodiments are directed to a method of forming a semiconductor device and resulting structures having an air spacer between a gate and a contact by forming a gate on a substrate and over a channel region of a semiconductor fin. A contact is formed on a doped region of the substrate such that a space between the contact and the gate defines a trench. A first dielectric layer is formed over the gate and the contact such that the first dielectric layer partially fills the trench. A second dielectric layer is formed over the first dielectric layer such that an air spacer forms in the trench between the gate and the contact.

Abstract: A method for forming a backside illuminated (BSI) image sensor device structure is provided. The BSI image sensor includes a first substrate having a top surface and a bottom surface, and a plurality of pixel regions formed at the top surface of the first substrate. The BSI image sensor also includes a grid structure through the first substrate and between two adjacent pixel regions. The grid structure extends continuously through the first substrate in a vertical direction and has a top surface and a bottom surface, the top surface of the grid structure protrudes above the bottom surface of the first substrate, and the bottom surface is leveled with the top surface of the first substrate.

Abstract: An apparatus comprises a first semiconductor chip including a first substrate, a plurality of first inter-metal dielectric layers and a plurality of first metal lines, a second semiconductor chip having a surface in contact with a surface of the first semiconductor chip, wherein the second semiconductor chip comprises a second substrate, a plurality of second inter-metal dielectric layers and a plurality of second metal lines and a conductive plug coupled between the first metal lines and the second metal lines, wherein the conductive plug comprises a first portion over a first side of a hard mask layer and a second portion over a second side of the hard mask layer, wherein the hard mask layer is a ring-shaped layer, and wherein the conductive plug is formed in a center opening of the ring-shaped layer.

Abstract: A light emitting arrangement is suggested for generating directional projections of light with sharply defined beam profile. Light from a top-emitting solid state light source (12), having reflective side-coating (34), is pre-collimated via a beam-shaping optic (16), before being propagated through a secondary collimating funnel (18), capturing any light rays with still too great an escape angle. Chip-scale package dimensions may be achieved through the use of a thin-film side-coating and undersized phosphor layers. Substrate level process flow further allows for parallel processing of a plurality of devices.

Abstract: A low dynamic resistance, low capacitance diode of a semiconductor device includes a heavily-doped n-type substrate. A lightly-doped n-type layer 1 micron to 5 microns thick is disposed on the n-type substrate. A lightly-doped p-type layer 3 microns to 8 microns thick is disposed on the n-type layer. The low dynamic resistance, low capacitance diode, of the semiconductor device includes a p-type buried layer, with a peak dopant density above 1×1017 cm?3, extending from the p-type layer through the n-type layer to the n-type substrate. The low dynamic resistance, low capacitance diode also includes an n-type region disposed in the p-type layer, extending to a top surface of the p-type layer.

Abstract: Resistive memory having confined filament formation is described herein. One or more method embodiments include forming an opening in a stack having a silicon material and an oxide material on the silicon material, and forming an oxide material in the opening adjacent the silicon material, wherein the oxide material formed in the opening confines filament formation in the resistive memory cell to an area enclosed by the oxide material formed in the opening.

Abstract: A semiconductor device includes a base including a substrate and a first insulating layer formed thereon. The base has a first surface and a second surface that is opposite to the first surface, and has an opening that passes through from the first surface to the second surface. A first width of the opening at the first surface is greater than a second width of the opening at the second surface. An electrode formed on the second surface of the base and covers the opening. A metal layer fills the opening and is electrically connected to the electrode.

Abstract: A display substrate, a method of manufacturing the same, and a display device including the display substrate disclosed. In one aspect, the display substrate includes a pixel circuit disposed over a base substrate, an insulation layer disposed over the base substrate and overlapping the pixel circuit in the depth dimension of the display substrate, and a pixel electrode disposed over the insulation layer and electrically connected to the pixel circuit. The display substrate also includes a pixel defining layer disposed over the insulation layer, the pixel defining layer formed over a portion of the pixel electrode, and a spacer structure including a first spacer and a second spacer disposed over the first spacer, the first spacer being separated from the pixel circuit and disposed over the insulation layer.

Abstract: A method for fabricating a semiconductor device includes the steps of: providing a substrate having a cell region and a peripheral region; forming a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, and a fourth semiconductor layer on the substrate; forming a thyristor on the cell region; removing the first semiconductor layer, the second semiconductor layer, the third semiconductor layer, and the fourth semiconductor layer on the peripheral region; and forming a metal oxide semiconductor (MOS) transistor on the peripheral region.