Abstract: A voltage regulator including an amplifier, a start signal generator and a power transistor is provided. The amplifier has a first positive input terminal, a second positive input terminal, and a negative input terminal to receive a start signal, a reference voltage and a feedback voltage respectively. An output terminal of the amplifier generates a driving voltage. The start signal generator is coupled to the first positive input terminal of the amplifier and generates the start signal, which is incremental, during a startup time interval in a voltage bypass mode. The power transistor generates an output voltage according to the driving voltage based on an operating power. In the voltage bypass mode, the reference voltage is equal to the operating power. A soft-start effect can be effectively achieved by the voltage regulator in the voltage bypass mode.

Abstract: Examples of the present disclosure provides a BUCK topological circuit for power supply including a rectification circuit, a first filter energy-storage circuit, a step-down constant-current driver chip, an output current setting circuit, a freewheeling circuit, a transformer, and a second filter energy-storage circuit. An external power supply capacitor is not required in the step-down constant-current driver chip.

Abstract: Disclosed is a digital LDO regulator capable of performing asynchronous binary search using a binary-weighted PMOS array. The digital LDO regulator includes a PMOS array unit including a binary-weighted PMOS array and that binary searches the PMOS array asynchronously, and a mode determining unit that operates in at least one of a fine mode, a coarse mode, and a medium mode, based on an output voltage of the PMOS array unit.

Abstract: A method for balancing thermal stresses in semiconductor switching devices may include (a) monitoring temperatures of the semiconductor switching devices to provide a temperature difference between two of the switching devices; and (b) based on the temperature difference, providing a zero-sequence component to be used for adjusting conduction times of each of the semiconductor devices.

Abstract: According to one embodiment, a voltage generation circuit includes a first boost circuit, a voltage division circuit, a first detection circuit, a capacitor and a first switch. The first boost circuit outputs a first voltage. The voltage division circuit divides the first voltage. The first detection circuit is configured to detect a first monitor voltage supplied to the first input terminal, based on a reference voltage which is supplied to a second input terminal of the first detection circuit, and to control an operation of the first boost circuit. The capacitor is connected between an output terminal of the first boost circuit and the first input terminal of the first detection circuit. The first switch cuts off a connection between the capacitor and the first detection circuit, based on an output signal of the first detection circuit, until the first voltage is output from the first boost circuit.

Abstract: A method includes comparing a ramp signal with an output signal of an error amplifier to determine an initial turn-on time of a boost converter, generating a turn-on time of the boost converter through multiplying the initial turn-on time by a predetermined constant greater than or equal to 1, and maintaining a switching frequency of the boost converter substantially constant through varying a value of the predetermined constant.

Abstract: A magnetically geared apparatus comprising a rotor, the rotor comprising: a ring structure; and at least one pole piece mounted relative to the ring structure; wherein at least a portion of the ring structure forms a continuous ring radially inner to the at least one pole piece, wherein the at least one pole piece is received in a pole piece-receiving portion, the pole piece receiving portion being open at a radially outer end.

Abstract: To provide a power converter and a breaking mechanism which can break a DC current and can suppress that a fused material scatter to other circuits at fusing, in the case where the breaking mechanism of excess current is formed by a circuit pattern of a circuit board. In a power converter, a supporting member is provided with a support body part; a fixation projection part which projected from the support body part and to which the multilayer circuit board was fixed; and a support projection part which projected from the support body part and supports an one side circuit board face, wherein the fuse pattern is provided in an inner layer, and the support projection part overlaps with at least one part of a fusing part of the fuse pattern, viewing in a normal direction of the circuit board face of the multilayer circuit board.

Abstract: A voltage converter circuit includes a capacitor having a first end selectively connected to an input power source through a first input switch and a second end selectively connected to the input power source through a second input switch, and a single inductor configured to generate an output voltage in response to a voltage of a node between the single inductor and the first input switch, selectively connect the input power source through the first input switch at the node, and connect the first end of the capacitor at the node.

Abstract: An electronic device may include an inverter. The inverter may convert direct current (DC) power to alternating current (AC) power. The inverter may use a clock signal at a given frequency to output corresponding alternating current signals at the given frequency. The inverter may receive a dithered clock signal that is frequency dithered using a modulating signal. The dithered clock signal may have at least three different frequency levels during a repeated cycle of the modulating signal. The at least three different frequency levels may include a fundamental frequency, a first frequency that is lower than the fundamental frequency, and a second frequency that is higher than the fundamental frequency. The dithered clock signal may be, during the repeated cycle of the modulating signal, at the fundamental frequency for fewer total periods than at the first frequency and for fewer total periods than at the second frequency.

Abstract: There is provided a switching valve for a voltage source converter.

Abstract: A deadtime control scheme for improving buck converter light load efficiency.

Abstract: An integrated single stage ac-dc driver for powering LED loads includes a boost converter operating in a Discontinuous Conduction Mode, DCM, comprising a half-bridge, and a Zeta Asymmetrical Half Bridge, ZAHB, integrated with the boost converter such that the boost converter and the ZAHB share the half-bridge to perform power factor control, PFC, with a fixed duty cycle and control an output voltage.

Abstract: A controller of a switching converter includes an error amplifying circuit, a first comparison circuit, a valley detection circuit, a valley selection circuit and a frequency control circuit. The error amplifying circuit generates a compensation signal based on the difference between a reference signal and a feedback signal. The first comparison circuit compares the compensation signal with a modulation signal and generates a pulse frequency modulation signal. The valley detection circuit detects valleys of a resonant voltage of the switching converter and generates a valley pulse signal. The valley selection circuit generates a valley enable signal corresponding to a target valley number based on the pulse frequency modulation signal and the valley pulse signal. The frequency control circuit generates a frequency control signal to control the switching frequency of the first switch based on the valley enable signal and the valley pulse signal.

Abstract: A transmitter is provided. the transmitter includes a hybrid feedback circuit and a hybrid driving circuit. The hybrid feedback circuit compares a reference voltage with a feedback voltage in closed-loop, determines whether to perform polarity reversal according to a mode control signal, controls power output according to a comparison result and the mode control signal, and generates a first output signal. The hybrid driving circuit, coupled to the hybrid feedback circuit, receives the first output signal of the hybrid feedback circuit, generates a transmitter output signal according to an input data, and generates a second output signal according to the transmitter output signal. The first output signal and the second output signal are transmitted back to the hybrid feedback circuit.

Abstract: A controller of a power converter is coupled to a switch assembly and configured to perform a hold-up time procedure that causes the controller to control first and second switching elements into opposite conducting states during a first period of time of a pulse cycle and into alternate opposite conducting states during a second period of time of the pulse cycle. The hold-up time procedure also causes the controller to control a first pair of synchronous rectifier switching devices into a conducting state during a third period of time overlapping less than all of the first period of time and into the conducting state during a fourth period of time overlapping less than all of the second period of time. A second pair of synchronous rectifier switching devices is controlled into a non-conducting state during the first and second periods of time.

Abstract: A voltage source converter as well as a method and computer program product for controlling the converter. The converter includes at least one phase leg connected between a first DC terminal having a first voltage and a second DC terminal having a second voltage, the phase leg including an upper arm and a lower arm with cells, where a junction between the arms is connected to a corresponding AC terminal. The converter also includes a control unit configured to control the cells to output a train of pulses of trapezoidal shape where the generation of a first control signal for a first cell used to initiate a transition between two levels of a pulse coincides with the decision that a transition is to be made.

Abstract: Systems and methods for a capacitive coupler for high-voltage step-down include an actively-controlled current-steering circuit connected in series with a current-limiting capacitor in order to transform a higher and potentially variable AC voltage to a lower regulated DC voltage. The actively-controlled current-steering circuit includes a switching element which, during operation, is predominantly either fully open or fully closed, and comparatively spends only a small fraction of operating time in a transition-state between the open and closed positions.

Abstract: The invention relates to a method for setting a dead time between the opening of a first switching element (31) of a half bridge (2) and the closing of a second switching element (32) of the half bridge (2), comprising the steps: reducing the dead time of a switching cycle relative to the dead time of a preceding switching cycle, and determining a temperature of at least one of the switching elements (31, 32); wherein the steps of reducing the dead time and of determining the temperature are repeated for subsequent switching cycles until a critical dead time is reached, in the case of which a termination condition, which depends on the determined temperature, is fulfilled; and wherein the dead time is set using the critical dead time.

Abstract: A gate drive adapter circuit includes an input circuit, an output circuit, and a charge pump circuit. The input circuit is configured to receive pulses suitable for controlling a silicon power transistor. The output circuit is coupled to the input circuit. The output circuit is configured to translate the pulses to voltages suitable for controlling a silicon-carbide power transistor. The charge pump circuit is coupled to the input circuit and to the output circuit. The charge pump circuit is configured to generate a negative voltage. The output circuit is configured to apply the negative voltage to translate the pulses.