Abstract: An electronic system includes a controller configured to output a clock, a command, and an address, and configured to receive and transmit data. The electronic system also includes a semiconductor device including an error calculation circuit. The semiconductor device is configured to generate, by the error calculation circuit, a parity including information on an error included in transfer data generated from the data, in a write operation initiated by the command, and to generate, by the error calculation circuit, a syndrome including information on an error included in transfer data generated from internal data, in a read operation initiated by the command.

Abstract: A technique for correcting errors in a data storage system operates while the data storage system remains online. The technique includes identifying an object for validation, scanning a plurality of pointers, and counting a number of pointers that point to the object. The technique further includes repairing a discrepancy between the count of pointers and a reference count stored in connection with the object.

Abstract: A decompression apparatus is provided. The decompression apparatus includes a memory configured to store compressed data decompressed and used in neural network processing of an artificial intelligence model, a decoder configured to include a plurality of logic circuits related to a compression method of the compressed data, decompress the compressed data through the plurality of logic circuits based on an input of the compressed data, and output the decompressed data, and a processor configured to obtain data of a neural network processible form from the data output from the decoder.

Abstract: Provided are systems and methods for convergent error vector indexing and retransmission in wireless data verifications. An example method includes transmitting a network packet to a receiver; receiving a further network packet being a copy of the network packet as received by the receiver, determining, based on the network packet and the further network packet, an error vector and locations of errors in the further network packet; sending, to the receiver, a first indexing packet including the locations of the errors; receiving a second indexing packet being a copy of the first indexing packet as received by the receiver; determining, based on the error vector and the second indexing packet, the locations of the errors in the second indexing packet; and sending a third indexing packet including the locations of the errors to the receiver, where the receiver corrects the further network packet using the third indexing packet.

Abstract: Numerous embodiments are disclosed for accessing redundant non-volatile memory cells in place of one or more rows or columns containing one or more faulty non-volatile memory cells during a program, erase, read, or neural read operation in an analog neural memory system used in a deep learning artificial neural network.

Abstract: A method for execution by a computing device of a dispersed storage network includes obtaining resource information for a subset of storage units of a storage unit pool. W available storage units of the storage unit pool are identified in response to receiving a store data request. W choose S combinations of selecting S number of storage units of the W available storage units are identified. A plurality of rating levels is calculated based on the resource information, where each of the plurality of rating levels are assigned to a corresponding combination of the W choose S combinations. One combination of the W choose S combinations is selected based on the plurality of rating levels. Storage of data of the store data request is facilitated utilizing the S number of storage units of the selected one combination.

Abstract: A storage unit includes an interface configured to interface and communicate with a dispersed storage network (DSN), a memory that stores operational instructions, and processing circuitry. The storage unit receives a set of read slice requests for a set of encoded data slices (EDSs) associated with a data object stored within a first set of storage units, where the storage the first set of storage units includes the storage unit. When at least a read threshold number of EDSs and fewer than all of the set of EDSs can be successfully retrieved from the first set of storage units, the storage unit identifies at least one EDS associated with a data object that is stored in a second set of storage units, obtains the at least one EDS and stores the at least one EDS in the storage unit.

Abstract: Systems, methods, and instrumentalities are described herein for supporting CBG-based retransmission with variable CBG size using variable length HARQ-ACK. A WTRU may receive a configuration to use a first table. The first table may be associated with a maximum number of code block groups per transport block (maxCBG/TB). The WTRU may determine a number of HARQ-ACK bits to send for code blocks. The determination may depend on whether an indication is received to switch from the first table to a second table. On a condition that the indication to switch from the first table to the second table is received, the WTRU may send a number of HARQ-ACK bits that is equal to two times the maxCBG/TB. The WTRU may receive a retransmission of a number of code blocks, wherein a code block group size depends on a sent number of HARQ-ACK bits.

Abstract: A signal analysis apparatus for analyzing an input signal is described. The input signal includes a symbol sequence. The symbol sequence includes data information and redundant data information. The signal analysis apparatus includes one or more circuits composed of a decoder module, an error correction module, and a processing module. The decoder module is configured to decode the input signal, thereby obtaining a decoded input signal. The error correction module is configured to identify at least one error in the decoded input signal. The processing module is configured to generate a data set. The data set includes information on the at least one identified error. The data set further includes information on at least one of a portion of the input signal being associated with the error and a portion of the decoded input signal being associated with the error. Further, a signal analysis device and a signal analysis method are described.

Abstract: Techniques for using erasure coding in a single region to reduce the likelihood of losing objects in a cloud object storage platform are provided. In one set of embodiments, a computer system can upload a plurality of data objects to a region of a cloud object storage platform, where the plurality of data objects including modifications to a data set. The computer system can further compute a parity object based on the plurality of data objects, where the parity object encodes parity information for the plurality of data objects. The computer system can then upload the parity object to the same region where the plurality of data objects was uploaded.

Abstract: According to one embodiment, a semiconductor storage device includes a first memory cell capable of storing n-bit data (n is a natural number not less than 4). When receiving first data, including first and second bits of the n-bit data, from a controller, the semiconductor storage device writes the received first data to the first memory cell. After receiving the first data, when the semiconductor storage device receives second data including third and fourth bits of the n-bit data, the semiconductor storage device reads the first and second bits from the first memory cell and writes the n-bit data to the first memory cell based on the read first and second bits and the received second data.

Abstract: A memory system may include: a nonvolatile memory device comprising a plurality of memory blocks, each block having a plurality of pages, each page having a plurality of memory cells, wherein the plurality of memory block includes an SLC (Single Level Cell) block and an MLC (Multi-Level Cell) block; and a controller suitable for programming input data transmitted from a host to both the SLC block and the MLC block in response to a first program command, and invalidating the input data programmed in the SLC block at a time point when the program operation for the MLC block is completed, when the memory system is powered on after an SPO (Sudden Power-Off) occurred while the program operation was performed on both the SLC block and the MLC block, the controller may perform a recovery operation to the MLC block based on valid data programmed in the SLC block.

Abstract: A method for adjustable error correction in a storage cluster is provided. The method includes determining health of a non-volatile memory of a non-volatile solid-state storage unit of each of a plurality of storage nodes in a storage cluster on a basis of per flash package, per flash die, per flash plane, per flash block, or per flash page. The determining is performed by the storage cluster. The plurality of storage nodes is housed within a chassis that couples the storage nodes as the storage cluster. The method includes adjusting erasure coding across the plurality of storage nodes based on the health of the non-volatile memory and distributing user data throughout the plurality of storage nodes through the erasure coding. The user data is accessible via the erasure coding from a remainder of the plurality of storage nodes if any of the plurality of storage nodes are unreachable.

Abstract: An error correction and fault tolerance method and system for an array of disks is presented. The array comprises k+5 disks, where k disks store user data and 5 disks store computed parity. The present invention further comprises a method and a system for reconstituting the original content of each of the k+5 disks, when up to 5 disks have been lost, wherein the number of disks at unknown locations is E and the number of disks wherein the location of the disks is known is Z. All combinations of faulty disks wherein Z+2×E?4 are reconstituted. Some combinations of faulty disks wherein Z+2×E?5 are either reconstituted, or errors are limited to a small list.

Abstract: A method for channel-coding information bits using a code generation matrix including 32 rows and A columns corresponding to length of the information bits includes, channel-coding the information bits having “A” length using basis sequences having 32-bit length corresponding to columns of the code generation matrix, and outputting the channel-coded result as an output sequence. If “A” is higher than 10, the code generation matrix is generated when (A?10) additional basis sequences were added as column-directional sequences to a first or second matrix. The first matrix is a TFCI code generation matrix composed of 32 rows and 10 columns used for TFCI coding. The second matrix is made when at least one of an inter-row location or an inter-column location of the first matrix was changed. The additional basis sequences satisfy a value 10 of a minimum Hamming distance.

Abstract: This disclosure provides a data retransmission method and apparatus. The method includes: A transmitting device obtains information to be transmitted for a tth time, where the information to be transmitted for the tth time includes Rt extension locations and information to be transmitted for a (t?1)th time, and the extension locations include Mt information bits and Lt check bits corresponding to the Mt information bits. The transmitting device then performs Polar encoding on the information to be transmitted for the tth time, to obtain a codeword after the Polar encoding, obtains a codeword for (t?1)th retransmission based on the codeword after the Polar encoding, and transmits the codeword for (t?1)th retransmission. A receiving device performs polar decoding after receiving the codeword for (t?1)th retransmission, to obtain a decoding result of codewords for t times of transmission.

Abstract: A method includes determining, by a computing device of a storage network, a pillar width to decode threshold ratio of a dispersed storage error encoding function based on routing path performance information of a set of routing paths with respect to a set of storage units of the storage network. The method further includes dispersed storage error encoding a data object in accordance with the pillar width to decode threshold ratio to produce a plurality of sets of encoded data slices. The method further includes sending the plurality of sets of encoded data slices to the set of storage units via the set of routing paths for storage therein.

Abstract: A quantum computing system computes soft information quantifying an effect of soft noise on multiple rounds of a syndrome measurement that is output by a quantum measurement circuit. The soft noise arises due to imperfections in a readout device that introduce variability in repeated measurements of ancilla qubits and is distinct from quantum noise arising from bit-flips in data qubits that are indirectly measured by the ancilla qubits. The quantum computing system applying decoding logic to identify fault locations within the quantum measurement circuit based on the computed soft information.

Abstract: Disclosed herein are techniques to provide forward error correction for a high-speed interconnect symbol stream, such as, DisplayPort. The symbol stream may be split into FEC blocks and parity bits generated for each of the FEC blocks. The parity bits may be interleaved, encoded, and transmitted over an interconnect along with the symbol stream to provide forward error correction for the symbol stream.

Abstract: [Problem] To propose a technology capable of appropriately demodulating, in a receiving device, a plurality of pieces of data multiplexed through the quasi-synchronous LDM method. [Solution] A transmission device generates a UL modulated signal by using an IFFT process of NUL points, generates an LL modulated signal by using an IFFT process of NLL points different from the NUL points, and transmits signals obtained by timing-adjusting the modulated signals such that the start timings thereof coincide with each other in a predetermined cycle, and combining the timing-adjusted signals at a predetermined power ratio. In addition, the receiving device performs an NUL point FFT process on the reception signal from the transmitting device, reproduces UL and generates UL reception replica, on the basis of the result, and performs an NLL point FFT process on a signal obtained by subtracting the UL reception replica from the reception signal, and reproduces LL on the basis of the result.